| #
32b51586 |
| 09-Jun-2026 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: tegra: PINCTRL_TEGRA264 should depend on ARCH_TEGRA
The NVIDIA Tegra264 MAIN, AON, and UPHY pin controllers are only present on NVIDIA Tegra264 SoCs. Hence add a dependency on ARCH_TEGRA,
pinctrl: tegra: PINCTRL_TEGRA264 should depend on ARCH_TEGRA
The NVIDIA Tegra264 MAIN, AON, and UPHY pin controllers are only present on NVIDIA Tegra264 SoCs. Hence add a dependency on ARCH_TEGRA, to prevent asking the user about this driver when configuring a kernel without NVIDIA Tegra SoC support.
Fixes: c98506206912dd0d ("pinctrl: tegra: Add Tegra264 pinmux driver") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| #
5f899621 |
| 09-Jun-2026 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: tegra: PINCTRL_TEGRA238 should depend on ARCH_TEGRA
The NVIDIA Tegra238 MAIN and AON pin controllers are only present on NVIDIA Tegra238 SoCs. Hence add a dependency on ARCH_TEGRA, to prev
pinctrl: tegra: PINCTRL_TEGRA238 should depend on ARCH_TEGRA
The NVIDIA Tegra238 MAIN and AON pin controllers are only present on NVIDIA Tegra238 SoCs. Hence add a dependency on ARCH_TEGRA, to prevent asking the user about this driver when configuring a kernel without NVIDIA Tegra SoC support.
Fixes: 25cac7292d49f4fc ("pinctrl: tegra: Add Tegra238 pinmux driver") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| #
c9850620 |
| 27-Apr-2026 |
Prathamesh Shete <pshete@nvidia.com> |
pinctrl: tegra: Add Tegra264 pinmux driver
Add support for the three pin controllers (MAIN, UPHY and AON) found on Tegra264.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Jon Hun
pinctrl: tegra: Add Tegra264 pinmux driver
Add support for the three pin controllers (MAIN, UPHY and AON) found on Tegra264.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| #
25cac729 |
| 27-Apr-2026 |
Prathamesh Shete <pshete@nvidia.com> |
pinctrl: tegra: Add Tegra238 pinmux driver
Add support for the two pin controllers (MAIN and AON) found on Tegra238.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Jon Hunter <jon
pinctrl: tegra: Add Tegra238 pinmux driver
Add support for the two pin controllers (MAIN and AON) found on Tegra238.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| #
38eec41d |
| 10-Apr-2026 |
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> |
pinctrl: tegra: Enable easier compile testing
Currently NVIDIA Tegra pin controller drivers cannot be compile tested, unless ARCH_TEGRA is selected. That partially defeats the purpose of compile te
pinctrl: tegra: Enable easier compile testing
Currently NVIDIA Tegra pin controller drivers cannot be compile tested, unless ARCH_TEGRA is selected. That partially defeats the purpose of compile testing, since ARCH_TEGRA is pulled when building platform kernels. Solve it and allow compile testing independently of ARCH_TEGRA choice which requires few less usual changes:
1. Descent in Makefile in to drivers/pinctrl/tegra/ unconditionally, because there is no menu option.
2. Depend on COMMON_CLK for PINCTRL_TEGRA20, because it uses clk_register_mux().
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| #
542baf77 |
| 12-Aug-2025 |
Aaron Kling <webgeek1234@gmail.com> |
pinctrl: tegra: Add Tegra186 pinmux driver
This is based on Nvidia's downstream 5.10 driver, rewritten to match the mainline Tegra194 pinmux driver.
Signed-off-by: Aaron Kling <webgeek1234@gmail.co
pinctrl: tegra: Add Tegra186 pinmux driver
This is based on Nvidia's downstream 5.10 driver, rewritten to match the mainline Tegra194 pinmux driver.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com> Link: https://lore.kernel.org/20250812-tegra186-pinctrl-v3-2-115714eeecb1@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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| #
6d8257ca |
| 05-Jun-2023 |
Prathamesh Shete <pshete@nvidia.com> |
pinctrl: tegra: Add Tegra234 pinmux driver
This change adds support for the two pin controllers found on Tegra234.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Signed-off-by: Thierry Reding
pinctrl: tegra: Add Tegra234 pinmux driver
This change adds support for the two pin controllers found on Tegra234.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230605154230.2910847-3-thierry.reding@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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| #
43c95d36 |
| 14-Jul-2019 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.3 k
Merge tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v5.3 kernel cycle:
Core changes:
- Device links can optionally be added between a pin control producer and its consumers. This will affect how the system power management is handled: a pin controller will not suspend before all of its consumers have been suspended.
This was necessary for the ST Microelectronics STMFX expander and need to be tested on other systems as well: it makes sense to make this default in the long run.
Right now it is opt-in per driver.
- Drive strength can be specified in microamps. With decreases in silicon technology, milliamps isn't granular enough, let's make it possible to select drive strengths in microamps.
Right now the Meson (AMlogic) driver needs this.
New drivers:
- New subdriver for the Tegra 194 SoC.
- New subdriver for the Qualcomm SDM845.
- New subdriver for the Qualcomm SM8150.
- New subdriver for the Freescale i.MX8MN (Freescale is now a product line of NXP).
- New subdriver for Marvell MV98DX1135.
Driver improvements:
- The Bitmain BM1880 driver now supports pin config in addition to muxing.
- The Qualcomm drivers can now reserve some GPIOs as taken aside and not usable for users. This is used in ACPI systems to take out some GPIO lines used by the BIOS so that noone else (neither kernel nor userspace) will play with them by mistake and crash the machine.
- A slew of refurbishing around the Aspeed drivers (board management controllers for servers) in preparation for the new Aspeed AST2600 SoC.
- A slew of improvements over the SH PFC drivers as usual.
- Misc cleanups and fixes"
* tag 'pinctrl-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (106 commits) pinctrl: aspeed: Strip moved macros and structs from private header pinctrl: aspeed: Fix missed include pinctrl: baytrail: Use GENMASK() consistently pinctrl: baytrail: Re-use data structures from pinctrl-intel.h pinctrl: baytrail: Use defined macro instead of magic in byt_get_gpio_mux() pinctrl: qcom: Add SM8150 pinctrl driver dt-bindings: pinctrl: qcom: Add SM8150 pinctrl binding dt-bindings: pinctrl: qcom: Document missing gpio nodes pinctrl: aspeed: Add implementation-related documentation pinctrl: aspeed: Split out pinmux from general pinctrl pinctrl: aspeed: Clarify comment about strapping W1C pinctrl: aspeed: Correct comment that is no longer true MAINTAINERS: Add entry for ASPEED pinctrl drivers dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema dt-bindings: pinctrl: aspeed: Split bindings document in two pinctrl: qcom: Add irq_enable callback for msm gpio pinctrl: madera: Fixup SPDX headers pinctrl: qcom: sdm845: Fix CONFIG preprocessor guard pinctrl: tegra: Add bitmask support for parked bits ...
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| #
61438428 |
| 16-May-2019 |
Krishna Yarlagadda <kyarlagadda@nvidia.com> |
pinctrl: tegra: Add Tegra194 pinmux driver
Tegra194 has PCIE L5 rst and clkreq pins which need to be controlled dynamically at runtime. This driver supports change pinmux for these pins. Pinmux for
pinctrl: tegra: Add Tegra194 pinmux driver
Tegra194 has PCIE L5 rst and clkreq pins which need to be controlled dynamically at runtime. This driver supports change pinmux for these pins. Pinmux for rest of the pins is set statically by bootloader and will not be changed by this driver
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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| #
ec8f24b7 |
| 19-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project
treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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| #
25cbac77 |
| 23-Jan-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
pinctrl: tegra: move Tegra pinctrl drivers to sub-directory
Tegra has several pinctrl drivers. Now it is reasonable enough to move them into drivers/pinctrl/tegra/.
Signed-off-by: Masahiro Yamada
pinctrl: tegra: move Tegra pinctrl drivers to sub-directory
Tegra has several pinctrl drivers. Now it is reasonable enough to move them into drivers/pinctrl/tegra/.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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