Merge tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
"Core changes:

- Use the non-blocking mux_state_try

Merge tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
"Core changes:

- Use the non-blocking mux_state_try_select() in the generic MUX pin
control back-end

- Free pin maps on pinctrl_generic_to_map() failure in the core
helpers

New hardware pin control:

- Qualcomm Maili TLMM SoC, PMG1110 PMIC, and Eliza LPASS LPI TLMM SoC
(this is for the low power audio, LPASS = Low Power Audio SubSystem
portions)

- Upboard support on top of the Intel pin controller

- Apple T6030 and T6031 support (just compatible strings)

- Samsung Exynos 8855 SoC

- Mediatek MT6858 SoC

- Rockchip RK3308B and RV1106 SoCs

- Airoha EN7523 and AN7563 SoCs

Improvements:

- Qualcomm TLMM GPIOs are unconditionally marked as wakeup capable

- Qualcomm improvements on top of the Qualcomm PDC (power domain
controller) irqchip improvements from tglx:s tree

- Qualcomm IPQ806x and IPQ9650 non-urgent pin grop fixups

- The NPCM8xx driver has been put into shape fixing many pin and
group definitions

- Some non-urgent Tegra 264 pin assignments are fixed up

- Some non-urgent fixups to Airoha AN7581 and AN7583 registers and
pin assignments, missing features etc"

* tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (130 commits)
dt-bindings: pinctrl: Convert TI DA850 pupd to DT schema
pinctrl: meson: sync some modify from A4
pinctrl: meson: a4: Add input enable pin configuration
pinctrl: realtek: rtd1625: remove unused group name spdif_sel
pinctrl: realtek: rtd1625: fix base_bit for VE4 GPIO 13
dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema
Revert "Merge branch 'ib-rsk7204' into devel"
pinctrl: rockchip: Add RV1106 pinctrl support
dt-bindings: pinctrl: rockchip: Add RV1106 compatible
pinctrl: rockchip: Decode drive strength in the get function
pinctrl: fix PINCTRL_GENERIC_MUX not always being selectable
pinctrl: airoha: add support of an7563 SoC
dt-bindings: pinctrl: airoha: add support of an7563 pin controller
pinctrl: airoha: try to find chip scu node by phandle first
pinctrl: airoha: add support of en7523 SoC
dt-bindings: pinctrl: airoha: add support of en7523 pin controller
pinctrl: airoha: an7583: add support for olt pinmux
pinctrl: airoha: an7583: add support for pon_alt pinmux
pinctrl: airoha: an7583: add support for npu_uart pinmux
dt-bindings: pinctrl: airoha: an7583: add missed features
...

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Merge tag 'pinctrl-qcom-updates-for-v7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel

Qualcomm pinctrl updates for v7.3-rc1

New drivers:
- add pinctrl drivers for Mai

Merge tag 'pinctrl-qcom-updates-for-v7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel

Qualcomm pinctrl updates for v7.3-rc1

New drivers:
- add pinctrl drivers for Maili TLMM and Elize LPASS LPI TLMM controllers

Driver updates:
- acknowledge interrupts for the PDC interrupt controller in pinctrl-msm
- implement irq_get/set_irqchip_state() for pinctrl-msm
- add support for a new model to Qualcomm pinctrl-spmi-gpio
- drop some dead code from qcom pinctrl modules

Devicetree bindings:
- document new TLMM controllers and the new model for the SPMI GPIO

Signed-off-by: Linus Walleij <linusw@kernel.org>

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pinctrl: qcom: Add the tlmm driver for Maili platform

Add support for Maili TLMM configuration and control via the pinctrl
framework.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.co

pinctrl: qcom: Add the tlmm driver for Maili platform

Add support for Maili TLMM configuration and control via the pinctrl
framework.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Acked-by: Linus Walleij <linusw@kernel.org>
Link: https://patch.msgid.link/20260622-maili-pinctrl-v3-2-9724e1000471@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

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