| 87b42c8b | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: add support of an7563 SoC
This patch adds support of Airoha an7563 SoC pin controller.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walle
pinctrl: airoha: add support of an7563 SoC
This patch adds support of Airoha an7563 SoC pin controller.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 18c510ba | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: try to find chip scu node by phandle first
The "airoha,en7581-chip-scu" is not a good compatible string in the en7523 case. Let's search chip scu regmap with "airoha,chip-scu" phang
pinctrl: airoha: try to find chip scu node by phandle first
The "airoha,en7581-chip-scu" is not a good compatible string in the en7523 case. Let's search chip scu regmap with "airoha,chip-scu" phangle first and fallback to SoC specific chip scu compatible string on failure.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 3b824705 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: add support of en7523 SoC
This patch adds support of Airoha en7523 SoC pin controller.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walle
pinctrl: airoha: add support of en7523 SoC
This patch adds support of Airoha en7523 SoC pin controller.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 13243f41 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: an7583: add support for olt pinmux
Add support for olt pin function for olt pin group.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walle
pinctrl: airoha: an7583: add support for olt pinmux
Add support for olt pin function for olt pin group.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 1594233e | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: an7583: add support for pon_alt pinmux
Add support for pon pin function for pon_alt pin group.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Lin
pinctrl: airoha: an7583: add support for pon_alt pinmux
Add support for pon pin function for pon_alt pin group.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 24cde06b | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: an7583: add support for npu_uart pinmux
Add support for uart pin function for npu_uart pin group.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by:
pinctrl: airoha: an7583: add support for npu_uart pinmux
Add support for uart pin function for npu_uart pin group.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| c4776d20 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: an7583: rename registers to match its an7583 names
In the an7581 case the register at 0x1FA20214 is called RG_GPIO_2ND_I2C_MODE. The same register in the an7583 case is called RG_SW
pinctrl: airoha: an7583: rename registers to match its an7583 names
In the an7581 case the register at 0x1FA20214 is called RG_GPIO_2ND_I2C_MODE. The same register in the an7583 case is called RG_SW_TOD_1PPS_MODE.
Let's rename this register to avoid potential confuse.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| bf3cdf90 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: an7583: remove an7583 prefix from variable names and definitions
We have only an7583 specific code in the pinctrl-an7583 kernel module, so an7583 prefix is not necessary anymore. Re
pinctrl: airoha: an7583: remove an7583 prefix from variable names and definitions
We have only an7583 specific code in the pinctrl-an7583 kernel module, so an7583 prefix is not necessary anymore. Remove it.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| cb9b160d | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: an7581: remove en7581 prefix from variable names
We have only an7581 specific code in the pinctrl-an7581 kernel module, so 'en7581_' prefix is not necessary anymore. Remove it.
Sig
pinctrl: airoha: an7581: remove en7581 prefix from variable names
We have only an7581 specific code in the pinctrl-an7581 kernel module, so 'en7581_' prefix is not necessary anymore. Remove it.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 900b49e6 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: split driver on shared code and SoC specific drivers
Split combined an7581/an7583 source file on a * shared pinctrl code (pinctrl-airoha.c) * an7581 specific pinctrl driver (pinct
pinctrl: airoha: split driver on shared code and SoC specific drivers
Split combined an7581/an7583 source file on a * shared pinctrl code (pinctrl-airoha.c) * an7581 specific pinctrl driver (pinctrl-an7581.c) * an7583 specific pinctrl driver (pinctrl-an7583.c)
Ininialization code was adapted a bit to work properly for shared and SoC specific cases.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 3f263f76 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: move common definitions to the separate header
Let's move the SoC independent definitions and declarations of structures required for Airoha SoC-specific pinctrl drivers to a common
pinctrl: airoha: move common definitions to the separate header
Let's move the SoC independent definitions and declarations of structures required for Airoha SoC-specific pinctrl drivers to a common header. Later we'll have several SoC-specific drivers, so this step is necessary.
We will not move to the common header file other register addresses, register bitfields definitions and macroses that use SoC specific information. We will keep SoC specific definitions inside SoC specific files.
No functional changes.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| e3a62553 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: statically allocate gpio regs structure
just a small refactoring to collect all gpio register information in the one statically allocated structure.
Signed-off-by: Mikhail Kshevets
pinctrl: airoha: statically allocate gpio regs structure
just a small refactoring to collect all gpio register information in the one statically allocated structure.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| ad1a8fd4 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: remove not needed irq_type[] array
irq_type[] array inside airoha_pinctrl_gpiochip structure is not actually necessary. Use trigger type from 'struct irq_data' instead.
Signed-off-
pinctrl: airoha: remove not needed irq_type[] array
irq_type[] array inside airoha_pinctrl_gpiochip structure is not actually necessary. Use trigger type from 'struct irq_data' instead.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 3de4686c | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: fix edge-triggered interrupts handling
Edge-triggered interrupts are handled incorrectly because of * no irq_ack() handler was defined, * no handle_level_irq() handler was used,
pinctrl: airoha: fix edge-triggered interrupts handling
Edge-triggered interrupts are handled incorrectly because of * no irq_ack() handler was defined, * no handle_level_irq() handler was used,
This patch probably fixes an issue
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 20b99628 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: fix IRQ mask/unmask code
When using IRQCHIP_IMMUTABLE, airoha_irq_unmask() must manually call gpiochip_enable_irq() and airoha_irq_mask() must call gpiochip_disable_irq(). Without t
pinctrl: airoha: fix IRQ mask/unmask code
When using IRQCHIP_IMMUTABLE, airoha_irq_unmask() must manually call gpiochip_enable_irq() and airoha_irq_mask() must call gpiochip_disable_irq(). Without these calls, gpiolib never sets the GPIOD_FLAG_IRQ_IS_ENABLED bit. Because this bit is missing, gpiod_direction_output() will not realize the pin is actively used as an interrupt.
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| a02fa031 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: add missed IRQ resource helpers
Without hooking .irq_request_resources, gpiolib cannot set GPIOD_FLAG_USED_AS_IRQ. This breaks pin direction locking and can allow userspace or anoth
pinctrl: airoha: add missed IRQ resource helpers
Without hooking .irq_request_resources, gpiolib cannot set GPIOD_FLAG_USED_AS_IRQ. This breaks pin direction locking and can allow userspace or another driver to reconfigure an active IRQ pin as an output
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| b8dd3055 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: fix getting gpiochip/pinctrl pointers in the IRQ handling code
airoha_irq_unmask(), airoha_irq_mask(), airoha_irq_type() functions impements brain damaged logic to retrieve gpiochip
pinctrl: airoha: fix getting gpiochip/pinctrl pointers in the IRQ handling code
airoha_irq_unmask(), airoha_irq_mask(), airoha_irq_type() functions impements brain damaged logic to retrieve gpiochip and pinctrl pointers.
Details:
gpiochip = irq_data_get_irq_chip_data(data);
will initialize gpiochip variable with data->chip_data value. This value initialized inside gpiochip_irq_map() function
static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) { struct gpio_chip *gc = d->host_data; ... irq_set_chip_data(irq, gc); ... }
Thus gpiochip variable of 'struct airoha_pinctrl_gpiochip *' type will be initialized with a pointer to a variable of 'struct gpio_chip' type.
Luckily, gpio_chip is the first element of airoha_pinctrl_gpiochip, so gpiochip pointer will get a correct value.
This patch implements correct logic of getting gpiochip and pinctrl pointers.
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 0d3b5e7b | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: minor improvements
Changes: * use field_get() macro instead of direct bit operations * improve error handling
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> S
pinctrl: airoha: minor improvements
Changes: * use field_get() macro instead of direct bit operations * improve error handling
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 62b1dd7e | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: add set_direction() helper for gpio_chip
The patch creates set_direction() helper for gpio_chip abstraction. It also implements/reimplements some function using newly defined helper
pinctrl: airoha: add set_direction() helper for gpio_chip
The patch creates set_direction() helper for gpio_chip abstraction. It also implements/reimplements some function using newly defined helper.
This is cosmetic patch used to place gpio_chip specific code together. No functional changes.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| d6392502 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: add missed get_direction() function for gpio_chip
This patch adds missed get_direction() function for gpio_chip. Also it reimplements pinconf's get_direction() function using newly
pinctrl: airoha: add missed get_direction() function for gpio_chip
This patch adds missed get_direction() function for gpio_chip. Also it reimplements pinconf's get_direction() function using newly defined function.
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| ccc41d25 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: an7583: fix spi group pins
pcm pins were used insted of spi pins. This patch fixes an issue.
Thanks to Daniel Schwierzeck for noticing it.
Fixes: 3ffeb17a9a27 ("pinctrl: airoha: a
pinctrl: airoha: an7583: fix spi group pins
pcm pins were used insted of spi pins. This patch fixes an issue.
Thanks to Daniel Schwierzeck for noticing it.
Fixes: 3ffeb17a9a27 ("pinctrl: airoha: add support for Airoha AN7583 PINs") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 239fd716 | 07-Aug-2026 |
Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
pinctrl: airoha: fix AN7583 MDIO pin mux config
an7583_mdio_pins[] pointed at pins 43/44 (I2C1_SDA/I2C1_SCL) instead of pins 53/54 (MDC_0/MDIO_0 respectively GPIO 51/52). Also the MDIO function grou
pinctrl: airoha: fix AN7583 MDIO pin mux config
an7583_mdio_pins[] pointed at pins 43/44 (I2C1_SDA/I2C1_SCL) instead of pins 53/54 (MDC_0/MDIO_0 respectively GPIO 51/52). Also the MDIO function group wrote GPIO_SGMII_MDIO_MODE_MASK (bit 13 of REG_GPIO_PON_MODE, an unrelated SGMII MDIO mode) and GPIO_MDC_IO_MASTER_MODE_MODE (BIT(14), an EN7581 specific bit from REG_GPIO_2ND_I2C_MODE).
Fix both by setting an7583_mdio_pins[] to { 53, 54 } and rewriting the function group to clear AN7583_MDC_0_GPIO_MODE_MASK (bit 25) and AN7583_MDIO_0_GPIO_MODE_MASK (bit 26) of REG_GPIO_PON_MODE. Both bits are cleared by the hwinit at probe.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| 0562b05f | 07-Aug-2026 |
Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
pinctrl: airoha: fix I2C pin mux config for AN7583
On AN7583 both I2C busses have a pin sharing with GPIO. Also the pin mux setting is done in REG_GPIO_PON_MODE instead of REG_GPIO_2ND_I2C_MODE.
Ad
pinctrl: airoha: fix I2C pin mux config for AN7583
On AN7583 both I2C busses have a pin sharing with GPIO. Also the pin mux setting is done in REG_GPIO_PON_MODE instead of REG_GPIO_2ND_I2C_MODE.
Add dedicated I2C pin groups and function groups for AN7583. The new groups must support i2c0 and i2c1.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| bf76a61c | 07-Aug-2026 |
Daniel Schwierzeck <daniel.schwierzeck@gmail.com> |
pinctrl: airoha: fix I2C1 pin mux config for AN7581
The pin mux on GPIOs 1 and 2 on AN7581 supports I2C in master and slave mode. When selecting I2C the according bits (bit 13 for master, bit 11 for
pinctrl: airoha: fix I2C1 pin mux config for AN7581
The pin mux on GPIOs 1 and 2 on AN7581 supports I2C in master and slave mode. When selecting I2C the according bits (bit 13 for master, bit 11 for slave) must be set in REG_GPIO_2ND_I2C_MODE.
Fix the i2c1 pin group to set bits 0 and 13 to set I2C1 master mode by default.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
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| aaa41d80 | 07-Aug-2026 |
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> |
pinctrl: airoha: an7583: fix muxing of non-gpio default pins
Current an7583 pinmux implementation have following issues: * pins 51 and 52 can't be set as pcie_reset, current pcie_reset code will
pinctrl: airoha: an7583: fix muxing of non-gpio default pins
Current an7583 pinmux implementation have following issues: * pins 51 and 52 can't be set as pcie_reset, current pcie_reset code will sets pins to gpio mode instead. * there is no proper way to set pins 41--54 to gpio mode. * pins 41--53 can't be actually set as pwm pins. These pins must be muxed to gpio mode as well.
This patch fixes above issues.
Fixes: 3ffeb17a9a27 ("pinctrl: airoha: add support for Airoha AN7583 PINs") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
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