Merge tag 'kvmarm-fixes-6.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

KVM/arm64 fixes for 6.12, take #1

- Fix pKVM error path on init, making sure we do not chang

Merge tag 'kvmarm-fixes-6.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD

KVM/arm64 fixes for 6.12, take #1

- Fix pKVM error path on init, making sure we do not change critical
system registers as we're about to fail

- Make sure that the host's vector length is at capped by a value
common to all CPUs

- Fix kvm_has_feat*() handling of "negative" features, as the current
code is pretty broken

- Promote Joey to the status of official reviewer, while James steps
down -- hopefully only temporarly

show more ...

Merge tag 'asoc-fix-v6.12-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v6.12

A bunch of fixes here that came in during the merge window and t

Merge tag 'asoc-fix-v6.12-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v6.12

A bunch of fixes here that came in during the merge window and the first
week of release, plus some new quirks and device IDs. There's nothing
major here, it's a bit bigger than it might've been due to there being
no fixes sent during the merge window due to your vacation.

show more ...

Merge remote-tracking branch 'drm/drm-fixes' into drm-misc-fixes

Required for a panthor fix that broke when
FOP_UNSIGNED_OFFSET was added in place of FMODE_UNSIGNED_OFFSET.

Signed-off-by: Maarten L

Merge remote-tracking branch 'drm/drm-fixes' into drm-misc-fixes

Required for a panthor fix that broke when
FOP_UNSIGNED_OFFSET was added in place of FMODE_UNSIGNED_OFFSET.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

show more ...

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Cross-merge networking fixes after downstream PR.

No conflicts and no adjacent changes.

Signed-off-by: Paolo Abeni <pabeni@redhat.com>

Merge branch 'next' into for-linus

Prepare input updates for 6.12 merge window.

Merge branch 'ib/6.11-rc6-matrix-keypad-spitz' into next

Bring in changes removing support for platform data from matrix-keypad
driver.

Merge tag 'v6.11-rc1' into clk-meson-next

Linux 6.11-rc1

Merge tag 'v6.11-rc3' into trace/ring-buffer/core

The "reserve_mem" kernel command line parameter has been pulled into
v6.11. Merge the latest -rc3 to allow the persistent ring buffer memory to
be a

Merge tag 'v6.11-rc3' into trace/ring-buffer/core

The "reserve_mem" kernel command line parameter has been pulled into
v6.11. Merge the latest -rc3 to allow the persistent ring buffer memory to
be able to be mapped at the address specified by the "reserve_mem" command
line parameter.

Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>

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Merge tag 'v6.11-rc1' into for-6.12

Linux 6.11-rc1

Merge drm/drm-next into drm-xe-next

Get drm-xe-next on v6.11-rc2 and synchronized with drm-intel-next for
the display side. This resolves the current conflict for the
enable_display module parameter

Merge drm/drm-next into drm-xe-next

Get drm-xe-next on v6.11-rc2 and synchronized with drm-intel-next for
the display side. This resolves the current conflict for the
enable_display module parameter and allows further pending refactors.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

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Merge drm/drm-next into drm-misc-next

Get drm-misc-next to the state of v6.11-rc2.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-intel-next

Sync with v6.11-rc1 in general, and specifically get the new
BACKLIGHT_POWER_ constants for power states.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Merge tag 'mtd/for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
"MTD changes:

- No particularly important patchset this cycle, but we ha

Merge tag 'mtd/for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
"MTD changes:

- No particularly important patchset this cycle, but we have a few
usual improvements: like using a better/more recent helper or
checking a return value.

Raw NAND changes:

- The use of for_each_child_of_node_scoped() has been spread into the
subsystem drivers

- a couple of exit path have been fixed (mtk, denali)

- TI GPMC bindings have been enhanced to comply with up-to-date
partition descriptions

- a load of small and misc fixes

SPI-NAND changes:

- The most impacting series this cycle is bringing support for
continuous reads in the SPI-NAND subsystem.

This is a feature already merged in the raw NAND subsystem which
allows optimizing the internal fetch times in the chip while
reading sequential pages within an eraseblock.

For now only Macronix NANDs benefit from this feature. While we are
talking about Macronix, some of their chip need an explicit action
for selecting a different plane, and support for it has also been
brought.

- The bitflip threshold has also been set to the same arbitrary level
as in the raw NAND subsystem to optimize wear leveling decisions

- Add upport for a new Winbond chip

SPI NOR changes:

- Add Write Protect support for N25Q064A.

- New flash support for Zetta ZD25Q128C and Spansion S28HS256T.

- Fix a NULL dereference in probe path for flashes without a name.

The probe path tries to access the name without checking its
existence first. S28HS256T is the first flash to define its entry
without a name, uncovering this issue"

* tag 'mtd/for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (41 commits)
mtd: spi-nor: fix flash probing
mtd: spi-nor: spansion: Add support for S28HS256T
mtd: spi-nor: winbond: add Zetta ZD25Q128C support
mtd: spi-nor: micron-st: Add n25q064a WP support
mtd: spi-nor: sst: Factor out common write operation to `sst_nor_write_data()`
mtd: spinand: macronix: Flag parts needing explicit plane select
mtd: spinand: Add support for setting plane select bits
dt-bindings: mtd: ti, gpmc-nand: support partitions node
mtd: rawnand: mtk: Fix init error path
mtd: powernv: Add check devm_kasprintf() returned value
mtd: rawnand: mtk: Factorize out the logic cleaning mtk chips
mtd: rawnand: atmel: Add message on DMA usage
mtd: rawnand: meson: Fix typo in function name
mtd: spi-nand: macronix: Continuous read support
mtd: spi-nand: macronix: Add a possible bitflip status flag
mtd: spi-nand: macronix: Extract the bitflip retrieval logic
mtd: spi-nand: macronix: Fix helper name
mtd: spi-nand: Expose spinand_write_reg_op()
mtd: spi-nand: Add continuous read support
mtd: spi-nand: Isolate the MTD read logic in a helper
...

show more ...

Merge tag 'nand/for-6.12' into mtd/next

* Raw NAND changes

The use of for_each_child_of_node_scoped() has been spread into the
subsystem drivers. Aside from that, a couple of exit path have been
fi

Merge tag 'nand/for-6.12' into mtd/next

* Raw NAND changes

The use of for_each_child_of_node_scoped() has been spread into the
subsystem drivers. Aside from that, a couple of exit path have been
fixed (mtk, denali), the TI GPMC bindings have been enhanced to comply
with up-to-date partition descriptions and as always there is a load of
small and misc fixes.

* SPI-NAND changes

The most impacting series this cycle is bringing support for continuous
reads in the SPI-NAND subsystem. This is a feature already merged in the
raw NAND subsystem which allows optimizing the internal fetch times in
the chip while reading sequential pages within an eraseblock. For now
only Macronix NANDs benefit from this feature. While we are talking
about Macronix, some of their chip need an explicit action for selecting
a different plane, and support for it has also been brought.

The bitflip threshold has also been set to the same arbitrary level as
in the raw NAND subsystem to optimize wear leveling decisions, and
finally support for a new Winbond chip has been added.

show more ...

mtd: spinand: macronix: Flag parts needing explicit plane select

Macronix serial NAND flash with a two-plane structure requires
insertion of the Plane Select bit into the column address during
the w

mtd: spinand: macronix: Flag parts needing explicit plane select

Macronix serial NAND flash with a two-plane structure requires
insertion of the Plane Select bit into the column address during
the write_to_cache operation.

Additionally, for MX35{U,F}2G14AC and MX35LF2GE4AB, insertion of
the Plane Select bit into the column address is required during
the read_from_cache operation.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240909092643.2434479-3-linchengming884@gmail.com

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mtd: spi-nand: macronix: Continuous read support

Enabling continuous read support implies several changes which must be
done atomically in order to keep the code base consistent and
bisectable.

1/

mtd: spi-nand: macronix: Continuous read support

Enabling continuous read support implies several changes which must be
done atomically in order to keep the code base consistent and
bisectable.

1/ Retrieving bitflips differently

Improve the helper retrieving the number of bitflips to support the case
where many pages have been read instead of just one. In this case, if
there is one page with bitflips, we cannot know the detail and just get
the information of the maximum number of bitflips corrected in the most
corrupted chunk. Compatible Macronix flashes return:
- the ECC status for the last page read (bits 0-3),
- the amount of bitflips for the whole read operation (bits 4-7).
Hence, when reading two consecutive pages, if there was 2 bits corrected
at most in one chunk, we return this amount times (arbitrary) the number
read pages. It is probably a very pessimistic calculation in most cases,
but still less pessimistic than if we multiplied this amount by the
number of chunks. Anyway, this is just for statistics, the important
data is the maximum amount of bitflips, which leads to wear leveling.

2/ Configuring, enabling and disabling the feature

Create an init function for allocating a vendor structure. Use this
vendor structure to cache the internal continuous read state. The state
is being used to discriminate between the two bitflips retrieval
methods. Finally, helpers for enabling and disabling sequential reads
are also created.

3/ Fill the chips table

Flag all the chips supporting the feature with the ->set_cont_read()
helper.

In order to validate the changes, I modified the mtd-utils test suite
with extended versions of nandbiterrs, nanddump and flash_speed in order
to support, test and benchmark continuous reads. I also ran all the UBI
tests successfully.

The nandbiterrs tool allows to track the ECC efficiency and
feedback. Here is its default output (stripped):

Successfully corrected 0 bit errors per subpage
Read reported 1 corrected bit errors
Successfully corrected 1 bit errors per subpage
Read reported 2 corrected bit errors
Successfully corrected 2 bit errors per subpage
Read reported 3 corrected bit errors
Successfully corrected 3 bit errors per subpage
Read reported 4 corrected bit errors
Successfully corrected 4 bit errors per subpage
Read reported 5 corrected bit errors
Successfully corrected 5 bit errors per subpage
Read reported 6 corrected bit errors
Successfully corrected 6 bit errors per subpage
Read reported 7 corrected bit errors
Successfully corrected 7 bit errors per subpage
Read reported 8 corrected bit errors
Successfully corrected 8 bit errors per subpage
Failed to recover 1 bitflips
Read error after 9 bit errors per page

The output using the continuous option over two pages (the second page
is kept intact):

Successfully corrected 0 bit errors per subpage
Read reported 2 corrected bit errors
Successfully corrected 1 bit errors per subpage
Read reported 4 corrected bit errors
Successfully corrected 2 bit errors per subpage
Read reported 6 corrected bit errors
Successfully corrected 3 bit errors per subpage
Read reported 8 corrected bit errors
Successfully corrected 4 bit errors per subpage
Read reported 10 corrected bit errors
Successfully corrected 5 bit errors per subpage
Read reported 12 corrected bit errors
Successfully corrected 6 bit errors per subpage
Read reported 14 corrected bit errors
Successfully corrected 7 bit errors per subpage
Read reported 16 corrected bit errors
Successfully corrected 8 bit errors per subpage
Failed to recover 1 bitflips
Read error after 9 bit errors per page

Regarding the throughput improvements, tests have been conducted in
1-1-1 and 1-1-4 modes, reading a full block X pages at a
time, X ranging from 1 to 64 (size of a block with the tested device).
The percent value on the right is the comparison of the same test
conducted without the continuous read feature, ie. reading X pages in
one single user request, which got naturally split by the core whit the
continuous read optimization disabled into single-page reads.

* 1-1-1 result:
1 page read speed is 2634 KiB/s
2 page read speed is 2704 KiB/s (+3%)
3 page read speed is 2747 KiB/s (+5%)
4 page read speed is 2804 KiB/s (+7%)
5 page read speed is 2782 KiB/s
6 page read speed is 2826 KiB/s
7 page read speed is 2834 KiB/s
8 page read speed is 2821 KiB/s
9 page read speed is 2846 KiB/s
10 page read speed is 2819 KiB/s
11 page read speed is 2871 KiB/s (+10%)
12 page read speed is 2823 KiB/s
13 page read speed is 2880 KiB/s
14 page read speed is 2842 KiB/s
15 page read speed is 2862 KiB/s
16 page read speed is 2837 KiB/s
32 page read speed is 2879 KiB/s
64 page read speed is 2842 KiB/s

* 1-1-4 result:
1 page read speed is 7562 KiB/s
2 page read speed is 8904 KiB/s (+15%)
3 page read speed is 9655 KiB/s (+25%)
4 page read speed is 10118 KiB/s (+30%)
5 page read speed is 10084 KiB/s
6 page read speed is 10300 KiB/s
7 page read speed is 10434 KiB/s (+35%)
8 page read speed is 10406 KiB/s
9 page read speed is 10769 KiB/s (+40%)
10 page read speed is 10666 KiB/s
11 page read speed is 10757 KiB/s
12 page read speed is 10835 KiB/s
13 page read speed is 10976 KiB/s
14 page read speed is 11200 KiB/s
15 page read speed is 11009 KiB/s
16 page read speed is 11082 KiB/s
32 page read speed is 11352 KiB/s (+45%)
64 page read speed is 11403 KiB/s

This work has received support and could be achieved thanks to
Alvin Zhou <alvinzhou@mxic.com.tw>.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-10-miquel.raynal@bootlin.com

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mtd: spi-nand: macronix: Add a possible bitflip status flag

Macronix SPI-NANDs encode the ECC status into two bits. There are three
standard situations (no bitflip, bitflips, error), and an addition

mtd: spi-nand: macronix: Add a possible bitflip status flag

Macronix SPI-NANDs encode the ECC status into two bits. There are three
standard situations (no bitflip, bitflips, error), and an additional
possible situation which is only triggered when configuring the 0x10
configuration register, allowing to know, if there have been bitflips,
whether the maximum amount of bitflips was above a configurable
threshold or not. In all cases, for now, s this configuration register
is unset, it means the same as "there are bitflips".

This value is maybe standard, maybe not. For now, let's define it in the
Macronix driver, we can safely move it to a shared place later if that
is relevant.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-9-miquel.raynal@bootlin.com

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mtd: spi-nand: macronix: Extract the bitflip retrieval logic

With GET_STATUS commands, SPI-NAND devices can tell the status of the
last read operation, in particular if there was:
- no bitflips
- co

mtd: spi-nand: macronix: Extract the bitflip retrieval logic

With GET_STATUS commands, SPI-NAND devices can tell the status of the
last read operation, in particular if there was:
- no bitflips
- corrected bitflips
- uncorrectable bitflips

The next step then to read an ECC status register and retrieve the
amount of bitflips, when relevant, if possible. The logic used here
works well for now, but will no longer apply to continuous reads. In
order to prepare the introduction of continuous reads, let's factorize
out the code that is specific to single-page reads.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-8-miquel.raynal@bootlin.com

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mtd: spi-nand: macronix: Fix helper name

Use "macronix_" instead of "mx35lf1ge4ab_" as common prefix for the
->get_status() callback name. This callback is used by many different
families, there is

mtd: spi-nand: macronix: Fix helper name

Use "macronix_" instead of "mx35lf1ge4ab_" as common prefix for the
->get_status() callback name. This callback is used by many different
families, there is no variation in the implementation so far.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240826101412.20644-7-miquel.raynal@bootlin.com

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Merge branch 'linus' into x86/mm

Bring x86 and selftests up to date

Merge drm/drm-fixes into drm-misc-fixes

Let's start the new drm-misc-fixes cycle by bringing in 6.11-rc1.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge tag 'mtd/for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
"Nothing stands out for this merge window, mostly minor fixes, such as
mod

Merge tag 'mtd/for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull MTD updates from Miquel Raynal:
"Nothing stands out for this merge window, mostly minor fixes, such as
module descriptions, the use of debug macros and Makefile
improvements.

Raw NAND changes;

- The Freescale MXC driver has been converted to the newer
'->exec_op()' interface

- The meson driver now supports handling the boot ROM area with very
specific ECC needs

- Support for the iMX8QXP has been added to the GPMI driver

- The lpx32xx driver now can get the DMA channels using DT entries

- The Qcom binding has been improved to be more future proof by Rob

- And then there is the usual load of misc and minor changes

SPI-NAND changes:

- The Macronix vendor driver has been improved to support an extended
ID to avoid conflicting with older devices after an ID reuse issue

SPI NOR changes:

- Drop support for Xilinx S3AN flashes. These flashes are for the
very old Xilinx Spartan 3 FPGAs and they need some awkward code in
the core to support.

Drop support for these flashes, along with the special handling we
needed for them in the core like non-power-of-2 page size handling
and the .setup() callback.

- Fix regression for old w25q128 flashes without SFDP tables.

Commit 83e824a4a595 ("mtd: spi-nor: Correct flags for Winbond
w25q128") dropped support for such devices under the assumption
that they aren't being used anymore. Users have now surfaced [0] so
fix the regression by supporting both kind of devices.

- Core cleanups including removal of SPI_NOR_NO_FR flag and
simplification of spi_nor_get_flash_info()"

Link: https://lore.kernel.org/r/CALxbwRo_-9CaJmt7r7ELgu+vOcgk=xZcGHobnKf=oT2=u4d4aA@mail.gmail.com/ [0]

* tag 'mtd/for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (28 commits)
mtd: rawnand: lpx32xx: Fix dma_request_chan() error checks
mtd: spinand: macronix: Add support for serial NAND flash
mtd: spinand: macronix: Add support for reading Device ID 2
mtd: rawnand: lpx32xx: Request DMA channels using DT entries
dt-bindings: mtd: qcom,nandc: Define properties at top-level
mtd: rawnand: intel: use 'time_left' variable with wait_for_completion_timeout()
mtd: rawnand: mxc: use 'time_left' variable with wait_for_completion_timeout()
mtd: rawnand: gpmi: add iMX8QXP support.
mtd: rawnand: gpmi: add 'support_edo_timing' in gpmi_devdata
mtd: cmdlinepart: Replace `dbg()` macro with `pr_debug()`
mtd: add missing MODULE_DESCRIPTION() macros
mtd: make mtd_test.c a separate module
dt-bindings: mtd: gpmi-nand: Add 'fsl,imx8qxp-gpmi-nand' compatible string
mtd: rawnand: cadence: remove unused struct 'ecc_info'
mtd: rawnand: mxc: support software ECC
mtd: rawnand: mxc: implement exec_op
mtd: rawnand: mxc: separate page read from ecc calc
mtd: spi-nor: winbond: fix w25q128 regression
mtd: spi-nor: simplify spi_nor_get_flash_info()
mtd: spi-nor: get rid of SPI_NOR_NO_FR
...

show more ...

Merge tag 'nand/for-6.11' into mtd/next

Raw NAND changes;

The Freescale MXC driver has been converted to the newer ->exec_op()
interface. The meson driver now supports handling the boot ROM area wi

Merge tag 'nand/for-6.11' into mtd/next

Raw NAND changes;

The Freescale MXC driver has been converted to the newer ->exec_op()
interface. The meson driver now supports handling the boot ROM area with
very specific ECC needs. Support for the iMX8QXP has been added to the
GPMI driver. The lpx32xx driver now can get the DMA channels using DT
entries. The Qcom binding has been improved to be more future proof by
Rob. And then there is the usual load of misc and minor changes.

SPI-NAND changes:

The Macronix vendor driver has been improved to support an extended ID
to avoid conflicting with older devices after an ID reuse issue.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

show more ...

mtd: spinand: macronix: Add support for serial NAND flash

MX35{U,L}F{2,4}G24AD-Z4I8 are Macronix serial NAND flashes.

Their main difference from MX35{U,L}F{2,4}G24AD lies in
the plane number. The p

mtd: spinand: macronix: Add support for serial NAND flash

MX35{U,L}F{2,4}G24AD-Z4I8 are Macronix serial NAND flashes.

Their main difference from MX35{U,L}F{2,4}G24AD lies in
the plane number. The plane number for those with the
postfix Z4I8 is 1.

These flashes have been validated on Xilinx zynq-picozed
board which include Macronix SPI Host.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240704024839.241101-3-linchengming884@gmail.com

show more ...

mtd: spinand: macronix: Add support for reading Device ID 2

Adding the Device ID 2 on Macronix serial NAND flash.

When the number of flashes increases, we need to utilize
Device ID 2 to distinguish

mtd: spinand: macronix: Add support for reading Device ID 2

Adding the Device ID 2 on Macronix serial NAND flash.

When the number of flashes increases, we need to utilize
Device ID 2 to distinguish between different flashes.

These flashes have been validated on Xilinx zynq-picozed
board which included Macronix SPI Host.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240704024839.241101-2-linchengming884@gmail.com

show more ...