| 1d46b8d4 | 29-Jul-2026 |
Even Xu <even.xu@intel.com> |
HID: Intel-thc-hid: Intel-thc: Add API to reset read DMA
Add a helper function thc_rxdma_reset() to do read DMA reset, it can be called when fatal DMA error happens.
Signed-off-by: Even Xu <even.xu
HID: Intel-thc-hid: Intel-thc: Add API to reset read DMA
Add a helper function thc_rxdma_reset() to do read DMA reset, it can be called when fatal DMA error happens.
Signed-off-by: Even Xu <even.xu@intel.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| dcb2ccb9 | 14-May-2025 |
Even Xu <even.xu@intel.com> |
HID: Intel-thc-hid: Intel-thc: Add Wake-on-Touch support
Wake-on-Touch (WoT) feature gives system the capability to wake from sleep state by user touch event, it requires platform providing wake GPI
HID: Intel-thc-hid: Intel-thc: Add Wake-on-Touch support
Wake-on-Touch (WoT) feature gives system the capability to wake from sleep state by user touch event, it requires platform providing wake GPIO through ACPI resource.
Intel UEFI provides a user setting to enable or disable THC device WoT feature. If it's enabled, UEFI assigns an additional wake GPIO resource to THC device ACPI configuration, facilitating system wakeup.
This patch provides helper APIs for THC device driver to query wake GPIO resource, enable WoT feature and unconfigure WoT.
APIs added: - thc_wot_config(): Query and configure wake-on-touch feature. - thc_wot_unconfig(): Unconfig wake-on-touch feature.
Signed-off-by: Even Xu <even.xu@intel.com> Tested-by: Chong Han <chong.han@intel.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| 22da60f0 | 14-May-2025 |
Even Xu <even.xu@intel.com> |
HID: Intel-thc-hid: Intel-thc: Introduce interrupt delay control
This patch adds support for a new feature, named "Interrupt Delay", allowing driver to set a specific delay time for next interrupt d
HID: Intel-thc-hid: Intel-thc: Introduce interrupt delay control
This patch adds support for a new feature, named "Interrupt Delay", allowing driver to set a specific delay time for next interrupt detection. It gives driver a capability to control THC waiting time for the next interrupt, to reduce the likelihood of spurious readings.
APIs added: - thc_i2c_set_rx_int_delay(): Set I2C Rx input interrupt delay value - thc_i2c_rx_int_delay_enable(): Enable or disable I2C Rx interrupt delay
As this interrupt delay feature is only applicable to RxDMA and must remain disabled during SWDMA operations, it also involves a change in SWDMA code to record the max input size control feature state before SWDMA and restore the state after SWDMA.
Signed-off-by: Even Xu <even.xu@intel.com> Tested-by: Chong Han <chong.han@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| 45e92a09 | 14-May-2025 |
Even Xu <even.xu@intel.com> |
HID: Intel-thc-hid: Intel-thc: Introduce max input size control
This patch adds support for a new feature, named "Max Input Size Control", allowing driver to set a maximum input size for RxDMA. This
HID: Intel-thc-hid: Intel-thc: Introduce max input size control
This patch adds support for a new feature, named "Max Input Size Control", allowing driver to set a maximum input size for RxDMA. This enhancement aims to prevent RxDMA buffer overruns caused by data corruption on the I2C bus, thereby improving overall system stability.
APIs added: - thc_i2c_set_rx_max_size(): Set the maximum input size for I2C RxDMA. - thc_i2c_rx_max_size_enable(): Enable or disable the max input size control.
As this max input size control feature is only applicable to RxDMA and must remain disabled during SWDMA operations, it also involves a change in SWDMA code to record the max input size control feature state before SWDMA and restore the state after SWDMA.
Signed-off-by: Even Xu <even.xu@intel.com> Tested-by: Chong Han <chong.han@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| 13dd6094 | 14-May-2025 |
Even Xu <even.xu@intel.com> |
HID: Intel-thc-hid: Intel-thc: Refine code comments
Align capitalization of the first characters for THC structure definition comments in header files.
Signed-off-by: Even Xu <even.xu@intel.com> Si
HID: Intel-thc-hid: Intel-thc: Refine code comments
Align capitalization of the first characters for THC structure definition comments in header files.
Signed-off-by: Even Xu <even.xu@intel.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| 4228966d | 06-Jan-2025 |
Even Xu <even.xu@intel.com> |
HID: intel-thc-hid: intel-thc: Add THC I2C config interfaces
Add I2C bus related APIs to initialize I2C sub-system parameters, such as bus speed, slave address, address bit. As I2C sub-system hasn't
HID: intel-thc-hid: intel-thc: Add THC I2C config interfaces
Add I2C bus related APIs to initialize I2C sub-system parameters, such as bus speed, slave address, address bit. As I2C sub-system hasn't auto register save and restore support, provide APIs to do it manually.
Co-developed-by: Xinpeng Sun <xinpeng.sun@intel.com> Signed-off-by: Xinpeng Sun <xinpeng.sun@intel.com> Signed-off-by: Even Xu <even.xu@intel.com> Tested-by: Rui Zhang <rui1.zhang@intel.com> Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca> Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca> Tested-by: Aaron Ma <aaron.ma@canonical.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| f02bcaba | 06-Jan-2025 |
Xinpeng Sun <xinpeng.sun@intel.com> |
HID: intel-thc-hid: intel-thc: Add THC SPI config interfaces
Add SPI bus related APIs to configure SPI operation parameters, such as port type, bus frequency, bus IO mode, read/write OPcode, and sla
HID: intel-thc-hid: intel-thc: Add THC SPI config interfaces
Add SPI bus related APIs to configure SPI operation parameters, such as port type, bus frequency, bus IO mode, read/write OPcode, and slave register addresses.
Co-developed-by: Even Xu <even.xu@intel.com> Signed-off-by: Even Xu <even.xu@intel.com> Signed-off-by: Xinpeng Sun <xinpeng.sun@intel.com> Tested-by: Rui Zhang <rui1.zhang@intel.com> Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca> Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca> Tested-by: Aaron Ma <aaron.ma@canonical.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| 4e682ea6 | 06-Jan-2025 |
Xinpeng Sun <xinpeng.sun@intel.com> |
HID: intel-thc-hid: intel-thc: Add THC interrupt handler
Add common interrupt handler to clear interrupt status and return interrupt type to caller for future handling.
Co-developed-by: Even Xu <ev
HID: intel-thc-hid: intel-thc: Add THC interrupt handler
Add common interrupt handler to clear interrupt status and return interrupt type to caller for future handling.
Co-developed-by: Even Xu <even.xu@intel.com> Signed-off-by: Even Xu <even.xu@intel.com> Signed-off-by: Xinpeng Sun <xinpeng.sun@intel.com> Tested-by: Rui Zhang <rui1.zhang@intel.com> Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca> Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca> Tested-by: Aaron Ma <aaron.ma@canonical.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| e86df907 | 06-Jan-2025 |
Xinpeng Sun <xinpeng.sun@intel.com> |
HID: intel-thc-hid: intel-thc: Add THC LTR interfaces
THC supports LTR configuration and runtimely mode switching. There are two LTR modes: Active LTR and Low Power LTR.
THC hardware layer provides
HID: intel-thc-hid: intel-thc: Add THC LTR interfaces
THC supports LTR configuration and runtimely mode switching. There are two LTR modes: Active LTR and Low Power LTR.
THC hardware layer provides APIs for LTR configuration and mode switching.
Co-developed-by: Even Xu <even.xu@intel.com> Signed-off-by: Even Xu <even.xu@intel.com> Signed-off-by: Xinpeng Sun <xinpeng.sun@intel.com> Tested-by: Rui Zhang <rui1.zhang@intel.com> Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca> Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca> Tested-by: Aaron Ma <aaron.ma@canonical.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| a688404b | 06-Jan-2025 |
Even Xu <even.xu@intel.com> |
HID: intel-thc-hid: intel-thc: Add THC DMA interfaces
As THC PIO only has 64 bytes FIFO length, THC DMAs are introduced to send/receive large data packets.
THC has three types of DMA channels: Read
HID: intel-thc-hid: intel-thc: Add THC DMA interfaces
As THC PIO only has 64 bytes FIFO length, THC DMAs are introduced to send/receive large data packets.
THC has three types of DMA channels: Read DMA channel (RxDMA), Write DMA channel (TxDMA) and Software DMA (SWDMA).
In addition to basic DMA functions, THC RxDMA also includes an auto hardware sequence which can handle external touch device's interrupt automatically without software involved. THC RxDMA channel usually is used for handling touch input reports.
THC TxDMA is very similar with general IO TxDMA, and usually is used for sending command/request to exteranl touch device.
THC SWDMA can perform read, write followed by read operation according to different configurations. Unlike RxDMA triggered by bus activity, SWDMA can be triggered by SW driver at any time, for example: - Retrieving an input report without interrupt - Sending command followed by reading response
THC DMA operation flow includes 4 steps: 1. Allocate DMA buffers 2. Configure opcode, fill PRD table with DMA buffers, enable DMA channel 3. Wait for completion, read out DMA buffers and update buffer pointers 4. Stop DMA and release DMA buffers
THC Hardware layer driver provides APIs for all above DMA Steps.
Co-developed-by: Xinpeng Sun <xinpeng.sun@intel.com> Signed-off-by: Xinpeng Sun <xinpeng.sun@intel.com> Signed-off-by: Even Xu <even.xu@intel.com> Tested-by: Rui Zhang <rui1.zhang@intel.com> Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca> Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca> Tested-by: Aaron Ma <aaron.ma@canonical.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| 86f5f4ab | 06-Jan-2025 |
Xinpeng Sun <xinpeng.sun@intel.com> |
HID: intel-thc-hid: intel-thc: Add APIs for interrupt
Add THC interrupt operation interfaces, such as interrupt configure, global interrupt enable/disable, external touch device GPIO interrupt quies
HID: intel-thc-hid: intel-thc: Add APIs for interrupt
Add THC interrupt operation interfaces, such as interrupt configure, global interrupt enable/disable, external touch device GPIO interrupt quiesce and unquiesce.
Co-developed-by: Even Xu <even.xu@intel.com> Signed-off-by: Even Xu <even.xu@intel.com> Signed-off-by: Xinpeng Sun <xinpeng.sun@intel.com> Tested-by: Rui Zhang <rui1.zhang@intel.com> Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca> Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca> Tested-by: Aaron Ma <aaron.ma@canonical.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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| e584b135 | 06-Jan-2025 |
Xinpeng Sun <xinpeng.sun@intel.com> |
HID: intel-thc-hid: intel-thc: Add THC PIO operation APIs
THC PIO (programmed I/O) operations are very similar with general SPI/I2C read/write operation to access external slave device on the bus th
HID: intel-thc-hid: intel-thc: Add THC PIO operation APIs
THC PIO (programmed I/O) operations are very similar with general SPI/I2C read/write operation to access external slave device on the bus through internal FIFO.
THC PIO operations are split into 4 steps: 1. prepare: configure hardware with correct opcode, slave address, and fill the PIO FIFO 2. start: set start bit to issue a bus send/receive 3. wait: wait for bus sending/receiving completion 4. complete: check send/receive data in FIFO and return
Co-developed-by: Even Xu <even.xu@intel.com> Signed-off-by: Even Xu <even.xu@intel.com> Signed-off-by: Xinpeng Sun <xinpeng.sun@intel.com> Tested-by: Rui Zhang <rui1.zhang@intel.com> Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca> Reviewed-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca> Tested-by: Aaron Ma <aaron.ma@canonical.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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