Merge branch 'next' into for-linus

Prepare input updates for 7.1 merge window.

Merge tag 'v7.0-rc3' into next

Sync up with the mainline to brig up the latest changes, specifically
changes to ALPS driver.

Merge branch 'for-7.1-printf-kunit-build' into for-linus

Merge branch 'for-7.1/core-v2' into for-linus

- fixed handling of 0-sized reports (Dmitry Torokhov)
- convert core code to __free() (Dmitry Torokhov)
- support for multiple batteries per HID device

Merge branch 'for-7.1/core-v2' into for-linus

- fixed handling of 0-sized reports (Dmitry Torokhov)
- convert core code to __free() (Dmitry Torokhov)
- support for multiple batteries per HID device (Lucas Zampieri)

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Merge drm/drm-next into drm-xe-next

Backmerging to bring in 7.00-rc3. Important ahead GPU SVM merging THP
support.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>

Merge drm/drm-next into drm-intel-next

Sync with v7.0-rc1 which contains a few treewide changes affecting i915.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Merge drm/drm-next into drm-misc-next

Let's merge 7.0-rc1 to start the new drm-misc-next window

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf before 7.0-rc1

Cross-merge BPF and other fixes after downstream PR.

No conflicts.

Signed-off-by: Alexei Starovoitov <ast@kernel.org>

Merge drm/drm-fixes into drm-misc-fixes

7.0-rc1 was just released, let's merge it to kick the new release cycle.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Not much changed in the clk framework this time except the clk.h
consumer

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Not much changed in the clk framework this time except the clk.h
consumer API moved the context saving APIs around to fix a build error
in certain configurations.

There was a change to the core framework for CLK_OPS_PARENT_ENABLE
behavior during registration, but it wrecked existing drivers that
didn't expect things to be turned off during clk registration so it
got reverted.

This cycle is really a large collection of new clk drivers, primarily
for Qualcomm SoCs but also for Amlogic, SpacemiT, Google, and Aspeed.
Another big change in here is support for automatic hardware clock
gating on Samsung SoCs where the clks turn on and off when needed.
Ideally more vendors move to this method for better power savings. The
highlights are in the updates section below.

Beyond all the new drivers we have a bunch of cleanups like converting
drivers from divider_round_rate() to divider_determine_rate() and
using scoped for each OF child loops. Otherwise it's the usual data
fixes and plugging reference leaks, etc. that's all pretty ordinary
but not critical enough to fix until the next release.

New Drivers:
- Qualcomm Kaanapali global, tcsr, rpmh, display, gpu, camera, and
video clk controllers
- Qualcomm SM8750 camera clk controllers
- Qualcomm MSM8940 and SDM439 global clk controllers
- Google GS101 Display Process Unit (DPU) clk controllers
- SpacemiT K3 clk controllers
- Amlogic t7 clk controllers
- Aspeed AST2700 clk controllers

Updates:
- Convert clock dividers from round_rate() to determine_rate()
- Fix sparse warnings, kernel-doc warnings, and plug leaked OF refs
- Automatic hardware clk gating on Google GS101 SoCs
- Amlogic s4 video clks
- CAN-FD clks and resets on Renesas RZ/T2H, RZ/N2H, RZ/V2H, and
RZ/V2N
- Expanded Serial Peripheral Interface (xSPI) clocks and resets on
Renesas RZ/T21H and RZ/N2H
- DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks and
resets on Renesas RZ/V2N
- More serial (RSCI) clocks and resets on Renesas RZ/V2H and RZ/V2N
- CPU frequency scaling on T-HEAD TH1520"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (165 commits)
clk: aspeed: Add reset for HACE/VIDEO
dt-bindings: clock: aspeed: Add VIDEO reset definition
clk: aspeed: add AST2700 clock driver
MAINTAINERS: Add entry for ASPEED clock drivers.
clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory.
Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc"
clk: Disable KUNIT_UML_PCI
dt-bindings: clk: rs9: Fix DIF pattern match
clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS()
clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841
clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc
clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc
clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc
clk: mediatek: Fix error handling in runtime PM setup
clk: mediatek: don't select clk-mt8192 for all ARM64 builds
clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks
clk: mediatek: Refactor pllfh registration to pass device
clk: mediatek: Pass device to clk_hw_register for PLLs
clk: mediatek: Refactor pll registration to pass device
clk: Respect CLK_OPS_PARENT_ENABLE during recalc
...

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Merge branches 'clk-renesas', 'clk-cleanup', 'clk-spacemit' and 'clk-tegra' into clk-next

* clk-renesas: (25 commits)
dt-bindings: clk: rs9: Fix DIF pattern match
clk: rs9: Convert to DEFINE_SIM

Merge branches 'clk-renesas', 'clk-cleanup', 'clk-spacemit' and 'clk-tegra' into clk-next

* clk-renesas: (25 commits)
dt-bindings: clk: rs9: Fix DIF pattern match
clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS()
clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841
clk: renesas: Add missing log message terminators
clk: renesas: rzg2l: Remove DSI clock rate restrictions
clk: renesas: rzv2h: Deassert reset on assert timeout
clk: renesas: rzg2l: Deassert reset on assert timeout
clk: renesas: cpg-mssr: Unlock before reset verification
clk: renesas: r9a09g056: Add entries for CANFD
clk: renesas: r9a09g057: Add entries for CANFD
clk: renesas: r9a09g077: Add CANFD clocks
clk: renesas: cpg-mssr: Handle RZ/T2H register layout in PM callbacks
dt-bindings: clock: renesas,r9a09g077/87: Add PCLKCAN ID
clk: renesas: cpg-mssr: Simplify pointer math in cpg_rzt2h_mstp_read()
clk: renesas: r9a09g056: Add clock and reset entries for TSU
clk: renesas: r9a09g057: Add entries for RSCIs
clk: renesas: r9a09g056: Add entries for RSCIs
clk: renesas: r9a09g056: Add entries for the RSPIs
clk: renesas: r9a09g056: Add entries for ICU
clk: renesas: r9a09g056: Add entries for the DMACs
...

* clk-cleanup:
clk: Disable KUNIT_UML_PCI
clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc
clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc
clk: tegra: tegra124-emc: fix device leak on set_rate()
clk: Annotate #else and #endif
clk: Merge prepare and unprepare sections
clk: Move clk_{save,restore}_context() to COMMON_CLK section
clk: clk-apple-nco: Add "apple,t8103-nco" compatible
clk: versatile: impd1: Simplify with scoped for each OF child loop
clk: scpi: Simplify with scoped for each OF child loop
clk: lmk04832: Simplify with scoped for each OF child loop

* clk-spacemit:
clk: spacemit: k3: add the clock tree
clk: spacemit: k3: extract common header
clk: spacemit: ccu_pll: add plla type clock
clk: spacemit: ccu_mix: add inverted enable gate clock
dt-bindings: soc: spacemit: k3: add clock support
clk: spacemit: add platform SoC prefix to reset name
clk: spacemit: extract common ccu functions
reset: spacemit: fix auxiliary device id
clk: spacemit: prepare common ccu header
clk: spacemit: Hide common clock driver from user controller
clk: spacemit: Respect Kconfig setting when building modules

* clk-tegra:
clk: tegra30: Add CSI pad clock gates
clk: tegra: Set CSUS as vi_sensor's gate for Tegra20, Tegra30 and Tegra114
clk: tegra20: Reparent dsi clock to pll_d_out0
clk: tegra: tegra124-emc: Simplify with scoped for each OF child loop
clk: tegra: Adjust callbacks in tegra_clock_pm
clk: tegra: tegra124-emc: Fix potential memory leak in tegra124_clk_register_emc()

show more ...

Merge tag 'spacemit-clk-for-6.20-1' of https://github.com/spacemit-com/linux into clk-spacemit

Pull SpacemiT clock driver updates from Yixun Lan:

- Allow SpacemiT driver to be built as module
- R

Merge tag 'spacemit-clk-for-6.20-1' of https://github.com/spacemit-com/linux into clk-spacemit

Pull SpacemiT clock driver updates from Yixun Lan:

- Allow SpacemiT driver to be built as module
- Refactor SpacemiT driver to extract common code
- Add support for SpacemiT K3 SoC clk hardware

* tag 'spacemit-clk-for-6.20-1' of https://github.com/spacemit-com/linux:
clk: spacemit: k3: add the clock tree
clk: spacemit: k3: extract common header
clk: spacemit: ccu_pll: add plla type clock
clk: spacemit: ccu_mix: add inverted enable gate clock
dt-bindings: soc: spacemit: k3: add clock support
clk: spacemit: add platform SoC prefix to reset name
clk: spacemit: extract common ccu functions
reset: spacemit: fix auxiliary device id
clk: spacemit: prepare common ccu header
clk: spacemit: Hide common clock driver from user controller
clk: spacemit: Respect Kconfig setting when building modules

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clk: spacemit: k3: add the clock tree

Add clock support to SpacemiT K3 SoC, the clock tree consist of several
blocks which are APBC, APBS, APMU, DCIU, MPUM.

Link: https://lore.kernel.org/r/20260108

clk: spacemit: k3: add the clock tree

Add clock support to SpacemiT K3 SoC, the clock tree consist of several
blocks which are APBC, APBS, APMU, DCIU, MPUM.

Link: https://lore.kernel.org/r/20260108-k3-clk-v5-5-42a11b74ad58@gentoo.org
Signed-off-by: Yixun Lan <dlan@gentoo.org>

show more ...

clk: spacemit: Respect Kconfig setting when building modules

Currently, the SPACEMIT_CCU entry is only a switch for enabling entry
SPACEMIT_K1_CCU. It does not guide the build for common clock codes

clk: spacemit: Respect Kconfig setting when building modules

Currently, the SPACEMIT_CCU entry is only a switch for enabling entry
SPACEMIT_K1_CCU. It does not guide the build for common clock codes
even if it is a tristate entry. This makes this entry useless.

Change the Makefile to add a separate build for common clock logic,
so the SPACEMIT_CCU entry takes effect, also add necessary
MODULE_LICENSE()/MODULE_DESCRIPTION()/EXPORT_SYMBOL() for the module
build.

Fixes: 1b72c59db0ad ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20251219012819.440972-2-inochiama@gmail.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>

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Merge drm/drm-next into drm-intel-gt-next

Backmerge in order to get the commit:

048832a3f400 ("drm/i915: Refactor shmem_pwrite() to use kiocb and write_iter")

To drm-intel-gt-next as there are f

Merge drm/drm-next into drm-intel-gt-next

Backmerge in order to get the commit:

048832a3f400 ("drm/i915: Refactor shmem_pwrite() to use kiocb and write_iter")

To drm-intel-gt-next as there are followup fixes to be applied.

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

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Merge branch 'next' into for-linus

Prepare input updates for 6.17 merge window.

Merge tag 'ib-mfd-gpio-input-pwm-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into next

Merge an immutable branch between MFD, GPIO, Input and PWM to resolve
conflicts for the mer

Merge tag 'ib-mfd-gpio-input-pwm-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into next

Merge an immutable branch between MFD, GPIO, Input and PWM to resolve
conflicts for the merge window pull request.

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Merge remote-tracking branch 'drm/drm-next' into msm-next

Back-merge drm-next to (indirectly) get arm-smmu updates for making
stall-on-fault more reliable.

Signed-off-by: Rob Clark <robin.clark@oss

Merge remote-tracking branch 'drm/drm-next' into msm-next

Back-merge drm-next to (indirectly) get arm-smmu updates for making
stall-on-fault more reliable.

Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>

show more ...

Merge drm/drm-next into drm-misc-next

Backmerging to forward to v6.16-rc1

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-xe-next

Backmerging to bring in 6.16

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>

Merge drm/drm-next into drm-intel-next

Sync to v6.16-rc1, among other things to get the fixed size GENMASK_U*()
and BIT_U*() macros.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This has been a semi-quiet cycle. The core framework remains unchanged
th

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This has been a semi-quiet cycle. The core framework remains unchanged
this time around.

In terms of shiny new code though, we have support for the SpacemiT K1
SoC, Sophgo SG2044, and T-HEAD TH1520 VO clk drivers joining the usual
silicon players like Qualcomm, Samsung, Allwinner, and Renesas.

Surprisingly, the Qualcomm pile was smaller than usual but that is
likely because they put one SoC support inside a driver for a
different SoC that is very similar.

Other than all those new clk drivers there are the usual clk data
updates to fix parents, frequency tables, and add missing clks along
with some Kconfig changes to make compile testing simpler and even
more DT binding conversions to boot.

The exciting part is still the new SoC support like SpacemiT and
Sophgo support though, which really dominate the diffstat because they
introduce a whole new silicon vendor clk driver.

New Drivers:
- Camera clock controller driver for Qualcomm QCS8300
- DE (display engine) 3.3 clocks on Allwinner H616
- Samsung ExynosAutov920 CPU cluster CL0, CL1 and CL2 clock controllers
- Video Output (VO) subsystem clk controller in the T-HEAD TH1520 SoC
- Clock driver for Sophgo SG2044
- Clock driver for SpacemiT K1 SoC
- Renesas RZ/V2N (R9A09G056) SoC clk driver

Updates:
- Correct data in various SoC clk drivers
- Allow clkaN to be optional in the Qualcomm RPMh clock controller
driver if command db doesn't define it
- Change Kconfig options to not enable by default during compile
testing
- Add missing clks in various SoC clk drivers
- Remove some duplicate clk DT bindings and convert some more to
YAML"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits)
clk: qcom: gcc-x1e80100: Set FORCE MEM CORE for UFS clocks
clk: qcom: gcc: Set FORCE_MEM_CORE_ON for gcc_ufs_axi_clk for 8650/8750
clk: qcom: rpmh: make clkaN optional
clk: qcom: Add support for Camera Clock Controller on QCS8300
clk: rockchip: rk3528: add slab.h header include
clk: rockchip: rk3576: add missing slab.h include
clk: meson: Do not enable by default during compile testing
clk: meson-g12a: add missing fclk_div2 to spicc
clk: qcom: gcc-msm8939: Fix mclk0 & mclk1 for 24 MHz
clk: rockchip: rename gate-grf clk file
clk: rockchip: rename branch_muxgrf to branch_grf_mux
clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support
dt-bindings: allwinner: add H616 DE33 clock binding
clk: samsung: correct clock summary for hsi1 block
dt-bindings: clock: add SM6350 QCOM video clock bindings
clk: rockchip: Pass NULL as reg pointer when registering GRF MMC clocks
clk: sunxi-ng: h616: Add LVDS reset for LCD TCON
dt-bindings: clock: sun50i-h616-ccu: Add LVDS reset
clk: rockchip: rk3036: mark ddrphy as critical
clk: rockchip: rk3036: fix implementation of usb480m clock mux
...

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Merge branches 'clk-bindings', 'clk-renesas', 'clk-spacemit' and 'clk-cleanup' into clk-next

* clk-bindings:
dt-bindings: clock: Drop st,stm32h7-rcc.txt
dt-bindings: clock: convert bcm2835-aux-c

Merge branches 'clk-bindings', 'clk-renesas', 'clk-spacemit' and 'clk-cleanup' into clk-next

* clk-bindings:
dt-bindings: clock: Drop st,stm32h7-rcc.txt
dt-bindings: clock: convert bcm2835-aux-clock to yaml
dt-bindings: clock: Drop maxim,max77686.txt
dt-bindings: clock: convert vf610-clock.txt to yaml format

* clk-renesas: (26 commits)
clk: renesas: r9a09g047: Add XSPI clock/reset
clk: renesas: r9a09g047: Add support for xspi mux and divider
dt-bindings: clock: renesas,r9a09g047-cpg: Add XSPI and GBETH PTP core clocks
clk: renesas: Use str_on_off() helper
clk: renesas: r9a09g057: Add clock and reset entries for USB2
dt-bindings: clock: renesas,r9a09g057-cpg: Add USB2 PHY and GBETH PTP core clocks
clk: renesas: rzv2h: Use both CLK_ON and CLK_MON bits for clock state validation
clk: renesas: rzv2h: Use str_on_off() helper in rzv2h_mod_clock_endisable()
clk: renesas: rzv2h: Support static dividers without RMW
clk: renesas: rzv2h: Add macro for defining static dividers
clk: renesas: rzv2h: Add support for static mux clocks
clk: renesas: r9a09g047: Add clock and reset entries for GE3D
clk: renesas: rzv2h: Fix a typo
clk: renesas: rzv2h: Add support for RZ/V2N SoC
clk: renesas: rzv2h: Sort compatible list based on SoC part number
dt-bindings: pinctrl: renesas: Document RZ/V2N SoC
dt-bindings: clock: renesas: Document RZ/V2N SoC CPG
dt-bindings: soc: renesas: Document SYS for RZ/V2N SoC
dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants and EVK
clk: renesas: rzv2h: Simplify rzv2h_cpg_assert()/rzv2h_cpg_deassert()
...

* clk-spacemit:
clk: spacemit: k1: Add TWSI8 bus and function clocks
clk: spacemit: Add clock support for SpacemiT K1 SoC
dt-bindings: clock: spacemit: Add spacemit,k1-pll
dt-bindings: soc: spacemit: Add spacemit,k1-syscon

* clk-cleanup:
clk: test: Forward-declare struct of_phandle_args in kunit/clk.h
clk: davinci: Use of_get_available_child_by_name()
clk: bcm: rpi: Add NULL check in raspberrypi_clk_register()
clk: bcm: rpi: Drop module alias
clk: bcm: kona: Remove unused scaled_div_build

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Merge tag 'spacemit-clk-for-6.16-1' of https://github.com/spacemit-com/linux into clk-spacemit

Pull SpacemiT clk driver updates from Yixun Lan:

- Add clock driver for SpacemiT K1 SoC
- Add TWSI8

Merge tag 'spacemit-clk-for-6.16-1' of https://github.com/spacemit-com/linux into clk-spacemit

Pull SpacemiT clk driver updates from Yixun Lan:

- Add clock driver for SpacemiT K1 SoC
- Add TWSI8 clock, workaround the read quirk

* tag 'spacemit-clk-for-6.16-1' of https://github.com/spacemit-com/linux:
clk: spacemit: k1: Add TWSI8 bus and function clocks
clk: spacemit: Add clock support for SpacemiT K1 SoC
dt-bindings: clock: spacemit: Add spacemit,k1-pll
dt-bindings: soc: spacemit: Add spacemit,k1-syscon

show more ...

clk: spacemit: Add clock support for SpacemiT K1 SoC

The clock tree of K1 SoC contains three main types of clock hardware
(PLL/DDN/MIX) and has control registers split into several multifunction
dev

clk: spacemit: Add clock support for SpacemiT K1 SoC

The clock tree of K1 SoC contains three main types of clock hardware
(PLL/DDN/MIX) and has control registers split into several multifunction
devices: APBS (PLLs), MPMU, APBC and APMU.

All register operations are done through regmap to ensure atomicity
between concurrent operations of clock driver and reset,
power-domain driver that will be introduced in the future.

Signed-off-by: Haylen Chu <heylenay@4d2.org>
Reviewed-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250416135406.16284-4-heylenay@4d2.org
Signed-off-by: Yixun Lan <dlan@gentoo.org>

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