#
7f9f8792 |
| 06-Nov-2021 |
Arnaldo Carvalho de Melo <acme@redhat.com> |
Merge remote-tracking branch 'torvalds/master' into perf/core
To pick up some tools/perf/ patches that went via tip/perf/core, such as:
tools/perf: Add mem_hops field in perf_mem_data_src structu
Merge remote-tracking branch 'torvalds/master' into perf/core
To pick up some tools/perf/ patches that went via tip/perf/core, such as:
tools/perf: Add mem_hops field in perf_mem_data_src structure
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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#
7ddb58cb |
| 04-Nov-2021 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "The usual collection of clk driver updates and new driver additions. In t
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "The usual collection of clk driver updates and new driver additions. In terms of lines it's mainly Qualcomm and Mediatek code, supporting various SoCs and their multitude of clk controllers.
New Drivers: - GCC and RPMcc support for Qualcomm QCM2290 SoCs - GCC support for Qualcomm MSM8994/MSM8992 SoCs - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs - Support for Mediatek MT8195 SoCs - Initial clock driver for the Exynos850 SoC - Add i.MX8ULP clock driver and related bindings
Updates: - Clock power management for new SAMA7G5 SoC - Updates to the master clock driver and sam9x60-pll to be able to use cpufreq-dt driver and avoid overclocking of CPU and MCK0 domains while changing the frequency via DVFS - Use ARRAY_SIZE in qcom clk drivers - Remove some impractical fallback parent names in qcom clk drivers - Make Mediatek clk drivers tristate - Refactoring of the CPU clock code and conversion of Samsung Exynos5433 CPU clock driver to the platform driver - A few conversions to devm_platform_ioremap_resource() - Updates of the Samsung Kconfig help text - Update video path realted clocks for Amlogic meson8 - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N - Remove unused helpers from i.MX specific clock header - Rework all i.MX clk based helpers to use clk_hw based ones - Rework i.MX gate/mux/divider wrappers - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers - Update i.MX pllv4 and composite clocks to support i.MX8ULP - Disable i.MX7ULP composite clock during initialization - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite - Disable the i.MX pfd when set pfdv2 clock rate - Add support for i.MX8ULP in pfdv2 - Add the pcc reset controller support on i.MX8ULP - Fix the build break when clk-imx8ulp is built as module - Move csi_sel mux to correct base register in i.MX6UL clock drivr - Fix csi clk gate register in i.MX6UL clock driver - Fix build bug making CLK_IMX8ULP select MXC_CLK - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U - Add Ethernet clocks on Renesas RZ/G2L - Move Rockchip to use module_platform_probe - Enable usage of Coresight related clocks on Rockchip rk3399"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (170 commits) clk: use clk_core_get_rate_recalc() in clk_rate_get() clk: at91: sama7g5: set low limit for mck0 at 32KHz clk: at91: sama7g5: remove prescaler part of master clock clk: at91: clk-master: add notifier for divider clk: at91: clk-sam9x60-pll: add notifier for div part of PLL clk: at91: clk-master: fix prescaler logic clk: at91: clk-master: mask mckr against layout->mask clk: at91: clk-master: check if div or pres is zero clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL clk: at91: pmc: add sama7g5 to the list of available pmcs clk: at91: clk-master: improve readability by using local variables clk: at91: clk-master: add register definition for sama7g5's master clock clk: at91: sama7g5: add securam's peripheral clock clk: at91: pmc: execute suspend/resume only for backup mode clk: at91: re-factor clocks suspend/resume clk: ux500: Add driver for the reset portions of PRCC dt-bindings: clock: u8500: Rewrite in YAML and extend clk: composite: Use rate_ops.determine_rate when also a mux is available clk: samsung: describe drivers in Kconfig clk: samsung: exynos5433: update apollo and atlas clock probing ...
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#
b43e2d55 |
| 02-Nov-2021 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-leak', 'clk-rockchip', 'clk-renesas' and 'clk-at91' into clk-next
- Clock power management for new SAMA7G5 SoC - Updates to the master clock driver and sam9x60-pll to be able t
Merge branches 'clk-leak', 'clk-rockchip', 'clk-renesas' and 'clk-at91' into clk-next
- Clock power management for new SAMA7G5 SoC - Updates to the master clock driver and sam9x60-pll to be able to use cpufreq-dt driver and avoid overclocking of CPU and MCK0 domains while changing the frequency via DVFS - Power management refinement with the use of save_context()/restore_context() on each clock driver to specify their use in case of Backup mode only
* clk-leak: clk: mvebu: ap-cpu-clk: Fix a memory leak in error handling paths
* clk-rockchip: clk: rockchip: use module_platform_driver_probe clk: rockchip: rk3399: expose PCLK_COREDBG_{B,L} clk: rockchip: rk3399: make CPU clocks critical
* clk-renesas: clk: renesas: r8a779[56]x: Add MLP clocks clk: renesas: r9a07g044: Add SDHI clock and reset entries clk: renesas: rzg2l: Add SDHI clk mux support clk: renesas: r8a779a0: Add RPC support clk: renesas: cpg-lib: Move RPC clock registration to the library clk: renesas: r9a07g044: Add clock and reset entries for SPI Multi I/O Bus Controller clk: renesas: r8a779a0: Add Z0 and Z1 clock support clk: renesas: r9a07g044: Add GbEthernet clock/reset clk: renesas: rzg2l: Add support to handle coupled clocks clk: renesas: r9a07g044: Add ethernet clock sources clk: renesas: rzg2l: Add support to handle MUX clocks clk: renesas: r8a779a0: Add TPU clock clk: renesas: rzg2l: Fix clk status function clk: renesas: r9a07g044: Mark IA55_CLK and DMAC_ACLK critical
* clk-at91: clk: at91: sama7g5: set low limit for mck0 at 32KHz clk: at91: sama7g5: remove prescaler part of master clock clk: at91: clk-master: add notifier for divider clk: at91: clk-sam9x60-pll: add notifier for div part of PLL clk: at91: clk-master: fix prescaler logic clk: at91: clk-master: mask mckr against layout->mask clk: at91: clk-master: check if div or pres is zero clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL clk: at91: pmc: add sama7g5 to the list of available pmcs clk: at91: clk-master: improve readability by using local variables clk: at91: clk-master: add register definition for sama7g5's master clock clk: at91: sama7g5: add securam's peripheral clock clk: at91: pmc: execute suspend/resume only for backup mode clk: at91: re-factor clocks suspend/resume clk: at91: check pmc node status before registering syscore ops
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Revision tags: v5.15, v5.15-rc7, v5.15-rc6 |
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#
bada0389 |
| 15-Oct-2021 |
Stephen Boyd <sboyd@kernel.org> |
Merge tag 'renesas-clk-for-v5.16-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add SPI Mu
Merge tag 'renesas-clk-for-v5.16-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add SPI Multi I/O Bus and SDHI clocks and resets on RZ/G2L - Add SPI Multi I/O Bus (RPC) clocks on R-Car V3U - Add MediaLB clocks on R-Car H3, M3-W/W+, and M3-N
* tag 'renesas-clk-for-v5.16-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: r8a779[56]x: Add MLP clocks clk: renesas: r9a07g044: Add SDHI clock and reset entries clk: renesas: rzg2l: Add SDHI clk mux support clk: renesas: r8a779a0: Add RPC support clk: renesas: cpg-lib: Move RPC clock registration to the library clk: renesas: r9a07g044: Add clock and reset entries for SPI Multi I/O Bus Controller
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Revision tags: v5.15-rc5 |
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#
6f21d145 |
| 06-Oct-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
clk: renesas: cpg-lib: Move RPC clock registration to the library
We want to reuse this code for V3U soon. Because its RPCCKCR register is at a different offset, the moved functions do not use the b
clk: renesas: cpg-lib: Move RPC clock registration to the library
We want to reuse this code for V3U soon. Because its RPCCKCR register is at a different offset, the moved functions do not use the base register as an argument anymore but the RPCCKCR register itself. Verified that an Eagle board with R-Car V3M still works.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20211006085836.42155-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Revision tags: v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1 |
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#
8be98d2f |
| 06-Sep-2021 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge branch 'next' into for-linus
Prepare input updates for 5.15 merge window.
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Revision tags: v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3 |
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#
320424c7 |
| 19-Jul-2021 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge tag 'v5.13' into next
Sync up with the mainline to get the latest parport API.
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Revision tags: v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6 |
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#
c441bfb5 |
| 09-Jun-2021 |
Mark Brown <broonie@kernel.org> |
Merge tag 'v5.13-rc3' into asoc-5.13
Linux 5.13-rc3
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Revision tags: v5.13-rc5 |
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#
942baad2 |
| 02-Jun-2021 |
Joonas Lahtinen <joonas.lahtinen@linux.intel.com> |
Merge drm/drm-next into drm-intel-gt-next
Pulling in -rc2 fixes and TTM changes that next upcoming patches depend on.
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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Revision tags: v5.13-rc4, v5.13-rc3 |
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#
c37fe6af |
| 18-May-2021 |
Mark Brown <broonie@kernel.org> |
Merge tag 'v5.13-rc2' into spi-5.13
Linux 5.13-rc2
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#
85ebe5ae |
| 18-May-2021 |
Tony Lindgren <tony@atomide.com> |
Merge branch 'fixes-rc1' into fixes
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#
d22fe808 |
| 17-May-2021 |
Rodrigo Vivi <rodrigo.vivi@intel.com> |
Merge drm/drm-next into drm-intel-next
Time to get back in sync...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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Revision tags: v5.13-rc2 |
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#
fd531024 |
| 11-May-2021 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-next into drm-misc-next
Backmerging to get v5.12 fixes. Requested for vmwgfx.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
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#
c55b44c9 |
| 11-May-2021 |
Maxime Ripard <maxime@cerno.tech> |
Merge drm/drm-fixes into drm-misc-fixes
Start this new release drm-misc-fixes branch
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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Revision tags: v5.13-rc1 |
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#
d0034a7a |
| 04-May-2021 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge branch 'next' into for-linus
Prepare input updates for 5.13 merge window.
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#
35655ceb |
| 29-Apr-2021 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "Here's a collection of largely clk driver updates. The usual suspects are
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "Here's a collection of largely clk driver updates. The usual suspects are here: i.MX, Qualcomm, Renesas, Allwinner, Samsung, and Rockchip, but it feels pretty light on commits.
There's only one real commit to the framework core and that's to consolidate code. Otherwise the diffstat is dominated by many Qualcomm clk driver patches that modernize the driver for the proper way of speciying clk parents. That's shifting data around, which could subtly break things so I'll be on the lookout for fixes.
New Drivers: - Proper clk driver for Mediatek MT7621 SoCs - Support for the clock controller on the new Rockchip rk3568
Updates: - Simplify Zynq Kconfig dependencies - Use clk_hw pointers in socfpga driver - Cleanup parent data in qcom clk drivers - Some cleanups for rk3399 modularization - Fix reparenting of i.MX UART clocks by initializing only the ones associated to stdout - Correct the PCIE clocks for i.MX8MP and i.MX8MQ - Make i.MX LPCG and SCU clocks return on registering failure - Kernel doc fixes - Add DAB hardware accelerator clocks on Renesas R-Car E3 and M3-N - Add timer (TMU) clocks on Renesas R-Car H3 ES1.0 - Add Timer (TMU & CMT) and thermal sensor (TSC) clocks on Renesas R-Car V3U - Sigma-delta modulation on Allwinner V3s audio PLL"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (82 commits) MAINTAINERS: add MT7621 CLOCK maintainer staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk' staging: mt7621-dts: make use of new 'mt7621-clk' clk: ralink: add clock driver for mt7621 SoC clk: uniphier: Fix potential infinite loop clk: qcom: rpmh: add support for SDX55 rpmh IPA clock clk: qcom: gcc-sdm845: get rid of the test clock clk: qcom: convert SDM845 Global Clock Controller to parent_data dt-bindings: clock: separate SDM845 GCC clock bindings clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE dt: bindings: add mt7621-sysc device tree binding documentation dt-bindings: clock: add dt binding header for mt7621 clocks clk: samsung: Remove redundant dev_err calls clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback clk: zynqmp: Drop dependency on ARCH_ZYNQMP clk: zynqmp: Enable the driver if ZYNQMP_FIRMWARE is selected clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents ...
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#
c3ad3219 |
| 28-Apr-2021 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-cleanup', 'clk-renesas', 'clk-socfpga', 'clk-allwinner' and 'clk-qcom' into clk-next
- Use clk_hw pointers in socfpga driver - Cleanup parent data in qcom clk drivers
* clk-cl
Merge branches 'clk-cleanup', 'clk-renesas', 'clk-socfpga', 'clk-allwinner' and 'clk-qcom' into clk-next
- Use clk_hw pointers in socfpga driver - Cleanup parent data in qcom clk drivers
* clk-cleanup: clk: Drop double "if" in clk_core_determine_round_nolock() comment clk: at91: Trivial typo fixes in the file sama7g5.c clk: use clk_core_enable_lock() a bit more
* clk-renesas: clk: renesas: Zero init clk_init_data clk: renesas: Couple of spelling fixes clk: renesas: r8a779a0: Add CMT clocks clk: renesas: r8a7795: Add TMU clocks clk: renesas: r8a779a0: Add TSC clock clk: renesas: r8a779a0: Add TMU clocks clk: renesas: r8a77965: Add DAB clock clk: renesas: r8a77990: Add DAB clock
* clk-socfpga: clk: socfpga: remove redundant initialization of variable div clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return clk: socfpga: Fix code formatting clk: socfpga: Convert to s10/agilex/n5x to use clk_hw clk: socfpga: arria10: convert to use clk_hw clk: socfpga: use clk_hw_register for a5/c5
* clk-allwinner: clk: sunxi: Demote non-conformant kernel-doc headers clk: sunxi-ng: v3s: use sigma-delta modulation for audio-pll
* clk-qcom: (45 commits) clk: qcom: rpmh: add support for SDX55 rpmh IPA clock clk: qcom: gcc-sdm845: get rid of the test clock clk: qcom: convert SDM845 Global Clock Controller to parent_data dt-bindings: clock: separate SDM845 GCC clock bindings clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents clk: qcom: gcc-sm8250: use ARRAY_SIZE instead of specifying num_parents clk: qcom: gcc-sm8150: use ARRAY_SIZE instead of specifying num_parents clk: qcom: gcc-sc8180x: use ARRAY_SIZE instead of specifying num_parents clk: qcom: gcc-sc7180: use ARRAY_SIZE instead of specifying num_parents clk: qcom: videocc-sm8250: use parent_hws where possible clk: qcom: videocc-sm8150: use parent_hws where possible clk: qcom: gpucc-sm8250: use parent_hws where possible clk: qcom: gpucc-sm8150: use parent_hws where possible clk: qcom: gcc-sm8350: use parent_hws where possible clk: qcom: gcc-sm8250: use parent_hws where possible clk: qcom: gcc-sm8150: use parent_hws where possible clk: qcom: gcc-sdx55: use parent_hws where possible ...
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Revision tags: v5.12 |
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#
b7f8f259 |
| 19-Apr-2021 |
Tyler Hicks <code@tyhicks.com> |
Merge tag 'v5.12-rc7' into ecryptfs/next
Required to pick up idmapped mount changes which changed some function parameters.
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Revision tags: v5.12-rc8, v5.12-rc7, v5.12-rc6 |
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#
3338fe50 |
| 03-Apr-2021 |
Stephen Boyd <sboyd@kernel.org> |
Merge tag 'renesas-clk-for-v5.13-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Spelling f
Merge tag 'renesas-clk-for-v5.13-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Spelling fixes - Zero init clk_init_data
* tag 'renesas-clk-for-v5.13-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: Zero init clk_init_data clk: renesas: Couple of spelling fixes
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Revision tags: v5.12-rc5 |
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#
f2fb4fe6 |
| 26-Mar-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
clk: renesas: Zero init clk_init_data
As clk_core_populate_parent_map() checks clk_init_data.num_parents first, and checks clk_init_data.parent_names[] before clk_init_data.parent_data[] and clk_ini
clk: renesas: Zero init clk_init_data
As clk_core_populate_parent_map() checks clk_init_data.num_parents first, and checks clk_init_data.parent_names[] before clk_init_data.parent_data[] and clk_init_data.parent_hws[], leaving the latter uninitialized doesn't do harm for now. However, it is better to play it safe, and initialize all clk_init_data structures to zeroes, to avoid any current and future members containing uninitialized data.
Remove a few explicit zero initializers, which are now superfluous.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20210326105434.1574796-1-geert+renesas@glider.be
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#
5acac83b |
| 25-Mar-2021 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge tag 'v5.12-rc4' into next
Sync up with the mainline to bring in newest APIs.
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Revision tags: v5.12-rc4 |
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#
f8bade6c |
| 16-Mar-2021 |
Maxime Ripard <maxime@cerno.tech> |
Merge drm/drm-next into drm-misc-next
Noralf needs some patches in 5.12-rc3, and we've been delaying the 5.12 merge due to the swap issue so it looks like a good time.
Signed-off-by: Maxime Ripard
Merge drm/drm-next into drm-misc-next
Noralf needs some patches in 5.12-rc3, and we've been delaying the 5.12 merge due to the swap issue so it looks like a good time.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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Revision tags: v5.12-rc3 |
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#
b470ebc9 |
| 14-Mar-2021 |
Thomas Gleixner <tglx@linutronix.de> |
Merge tag 'irqchip-fixes-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip fixes from Marc Zyngier:
- More compatible strings for the Ingenic
Merge tag 'irqchip-fixes-5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip fixes from Marc Zyngier:
- More compatible strings for the Ingenic irqchip (introducing the JZ4760B SoC) - Select GENERIC_IRQ_MULTI_HANDLER on the ARM ep93xx platform - Drop all GENERIC_IRQ_MULTI_HANDLER selections from the irqchip Kconfig, now relying on the architecture to get it right - Drop the debugfs_file field from struct irq_domain, now that debugfs can track things on its own
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#
35bb28ec |
| 11-Mar-2021 |
Jani Nikula <jani.nikula@intel.com> |
Merge drm/drm-next into drm-intel-next
Sync up with upstream.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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#
4c9f4865 |
| 08-Mar-2021 |
Tony Lindgren <tony@atomide.com> |
Merge branch 'fixes-rc2' into fixes
|