Merge drm/drm-next into drm-xe-next

Get drm-xe-next on v6.11-rc2 and synchronized with drm-intel-next for
the display side. This resolves the current conflict for the
enable_display module parameter

Merge drm/drm-next into drm-xe-next

Get drm-xe-next on v6.11-rc2 and synchronized with drm-intel-next for
the display side. This resolves the current conflict for the
enable_display module parameter and allows further pending refactors.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

show more ...

Merge drm/drm-next into drm-misc-next

Get drm-misc-next to the state of v6.11-rc2.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-intel-next

Sync with v6.11-rc1 in general, and specifically get the new
BACKLIGHT_POWER_ constants for power states.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Merge branch 'linus' into x86/mm

Bring x86 and selftests up to date

Merge drm/drm-fixes into drm-misc-fixes

Let's start the new drm-misc-fixes cycle by bringing in 6.11-rc1.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This a large collection of clk driver updates and a handful of new SoC
cl

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This a large collection of clk driver updates and a handful of new SoC
clk driver support.

We have the usual Qualcomm clk drivers, along with clk drivers for the
Sophgo and T-Head vendors, all to support some new SoCs.

Nothing in particular stands out to me in the updates. There's the
interconnect clk driver which exposes clks as interconnects, crossing
subsystems. There's a bunch of janitorial things that are improving
drivers in general like kmemdup_array() or fixing error paths. But
overall the updates look normal to fix the description data which is
usually the stuff that's wrong and/or untested.

Core:
- Skip gate basic type KUnit tests on s390 due to lack of MMIO
emulation

New Drivers:
- AP sub-system clock controller in the T-Head TH1520
- Sophgo Sophon sg2042 clk driver
- Qualcomm SM7150 camera, display and video clk drivers
- Qualcomm QCM2290 GPU clk driver
- Qualcomm QCS8386/QCS8084 NSS clk driver
- Qualcomm SM8650 camera and video drivers

Updates:
- Add reset support to Airoha EN7581 clk driver
- Add MODULE_DESCRIPTIONs to various clk drivers
- Introduce helper logic to expose clock controllers as simple
interconnect providers
- Use the interconnect helper above on Qualcomm ipq9574
- Add CLK_SET_RATE_PARENT to the remaining USB pipe clocks on
Qualcomm X1Elite
- Improve error handling in Qualcomm kpss-xcc driver
- Mark Qualcomm SC8280XP LPASS clock controller regmap_config const
- Export more clocks for Rockchip rk3128 peripherals
- Convert Rockchip clk drivers to use kmemdup_array()
- Drop CLK_NR_CLKS from Rockchip rk3128 and rk3188 binding headers
- Make qcom_cc_really_probe() take a struct device to allow reuse in
non-platform-drivers
- Introduce prepare-only branch clock ops in the qcom clk driver to
support clocks on buses that take locks
- Describe parent/child relationship for Qualcomm SC7280 camera GDSCs
- Support Qualcomm Huayra 2290 alpha PLL
- Adjust the highest SDCC clock frequency on Qualcomm IPQ6018 to
match HS200 support
- Add missing PCIe PIPE clocks on Qualcomm IPQ9574
- Fix various configurations and properties in the Qualcomm SA8775P,
X1E80100 and SM7280 drivers
- Park Qualcomm SM8350 GPU RCGs on XO while disabled
- Remove unused CONFIG_QCOM_RPMCC Kconfig symbol
- exynos-clkout: Remove usage of of_device_id table as
.of_match_table, because the driver is instantiated as MFD cell,
not as standalone platform driver. Populated .of_match_table
confused people few times to convert the code to
device_get_match_data(), which broke the driver
- Mark one Samsung UFS clock as critical, because having it off stops
the system from shutdown
- Use kmemdup_array() when applicable
- Remove unused 'struct gates_data' from old sunxi driver library
- Add GPADC clock and reset for Allwinner H616
- Minor Amlogic S4 clock fixes
- DT bindings Yaml conversion of the Amlogic AXG audio controller
- Amlogic C3 clock controllers support
- Amlogic clk flag added to skip init of already enabled PLLs and
avoid relocking
- Amlogic A1 DT bindings updates for system pll support
- Add missing MODULE_DESCRIPTION where necessary
- Remove obsolete clock DT binding header files
- Add Battery Backup (VBATTB) and I2C clocks, resets, and power
domains on Renesas RZ/G3S
- Add audio clocks on Renesas R-Car V4M
- Add video capture (ISPCS, CSI-2, VIN) clocks on Renesas R-Car V4M"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (135 commits)
clk: thead: Add support for T-Head TH1520 AP_SUBSYS clocks
dt-bindings: clock: Document T-Head TH1520 AP_SUBSYS controller
clk: sophgo: Avoid -Wsometimes-uninitialized in sg2042_clk_pll_set_rate()
clk/sophgo: Using BUG() instead of unreachable() in mmux_get_parent_id()
clk: mxs: Use clamp() in clk_ref_round_rate() and clk_ref_set_rate()
clk: sunxi-ng r40: Constify struct regmap_config
clk: en7523: fix rate divider for slic and spi clocks
clk: lpc32xx: Constify struct regmap_config
clk: xilinx: Constify struct regmap_config
clk: en7523: Remove PCIe reset open drain configuration for EN7581
clk: en7523: Remove pcie prepare/unpreare callbacks for EN7581 SoC
clk: en7523: Add reset-controller support for EN7581 SoC
dt-bindings: clock: airoha: Add reset support to EN7581 clock binding
dt-bindings: clock: mediatek: Document reset cells for MT8188 sys
clk: mediatek: mt8173-infracfg: Handle unallocated infracfg when module
dt-bindings: clock: mediatek: add syscon compatible for mt7622 pciesys
dt-bindings: clock: sprd,sc9860-clk: convert to YAML
dt-bindings: clock: qoriq-clock: convert to yaml format
clk: qcom: Park shared RCGs upon registration
clk: qcom: ipq9574: Use icc-clk for enabling NoC related clocks
...

show more ...

Merge branches 'clk-renesas', 'clk-amlogic', 'clk-allwinner' and 'clk-samsung' into clk-next

* clk-renesas:
clk: renesas: r9a08g045: Add clock, reset and power domain support for I2C
clk: renesa

Merge branches 'clk-renesas', 'clk-amlogic', 'clk-allwinner' and 'clk-samsung' into clk-next

* clk-renesas:
clk: renesas: r9a08g045: Add clock, reset and power domain support for I2C
clk: renesas: r8a779h0: Add Audio clocks
clk: renesas: r9a08g045: Add clock, reset and power domain support for the VBATTB IP
dt-bindings: clock: rcar-gen2: Remove obsolete header files
dt-bindings: clock: r8a7779: Remove duplicate newline
clk: renesas: Drop "Renesas" from individual driver descriptions
clk: renesas: r8a779h0: Fix PLL2/PLL4 multipliers in comments
clk: renesas: r8a779h0: Add VIN clocks
dt-bindings: clock: renesas,rzg2l-cpg: Update description for #reset-cells
clk: renesas: rcar-gen2: Use DEFINE_SPINLOCK() for static spinlock
clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlock
clk: renesas: r8a77970: Use common cpg_lock
clk: renesas: r8a779h0: Add CSI-2 clocks
clk: renesas: r8a779h0: Add ISPCS clocks

* clk-amlogic:
clk: meson: add missing MODULE_DESCRIPTION() macros
dt-bindings: clock: meson: a1: peripherals: support sys_pll input
dt-bindings: clock: meson: a1: pll: introduce new syspll bindings
clk: meson: add 'NOINIT_ENABLED' flag to eliminate init for enabled PLL
clk: meson: c3: add c3 clock peripherals controller driver
clk: meson: c3: add support for the C3 SoC PLL clock
dt-bindings: clock: add Amlogic C3 peripherals clock controller
dt-bindings: clock: add Amlogic C3 SCMI clock controller support
dt-bindings: clock: add Amlogic C3 PLL clock controller
dt-bindings: clock: meson: Convert axg-audio-clkc to YAML format
clk: meson: s4: fix pwm_j_div parent clock
clk: meson: s4: fix fixed_pll_dco clock

* clk-allwinner:
clk: sunxi-ng r40: Constify struct regmap_config
clk: sunxi-ng: h616: Add clock/reset for GPADC
dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks
clk: sunxi: Remove unused struct 'gates_data'
clk: sunxi-ng: add missing MODULE_DESCRIPTION() macros

* clk-samsung:
clk: samsung: gs101: mark gout_hsi2_ufs_embd_i_clk_unipro as critical
clk: samsung: Switch to use kmemdup_array()
clk: samsung: exynos-clkout: Remove misleading of_match_table/MODULE_DEVICE_TABLE

show more ...

Merge branch 'next' into for-linus

Prepare input updates for 6.11 merge window.

Merge tag 'renesas-clk-for-v6.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Remove obs

Merge tag 'renesas-clk-for-v6.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Remove obsolete clock DT binding header files
- Add Battery Backup (VBATTB) and I2C clocks, resets, and power
domains on RZ/G3S
- Add audio clocks on R-Car V4M
- Add video capture (ISPCS, CSI-2, VIN) clocks on R-Car V4M
- Miscellaneous fixes and improvements

* tag 'renesas-clk-for-v6.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a08g045: Add clock, reset and power domain support for I2C
clk: renesas: r8a779h0: Add Audio clocks
clk: renesas: r9a08g045: Add clock, reset and power domain support for the VBATTB IP
dt-bindings: clock: rcar-gen2: Remove obsolete header files
dt-bindings: clock: r8a7779: Remove duplicate newline
clk: renesas: Drop "Renesas" from individual driver descriptions
clk: renesas: r8a779h0: Fix PLL2/PLL4 multipliers in comments
clk: renesas: r8a779h0: Add VIN clocks
dt-bindings: clock: renesas,rzg2l-cpg: Update description for #reset-cells
clk: renesas: rcar-gen2: Use DEFINE_SPINLOCK() for static spinlock
clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlock
clk: renesas: r8a77970: Use common cpg_lock
clk: renesas: r8a779h0: Add CSI-2 clocks
clk: renesas: r8a779h0: Add ISPCS clocks

show more ...

clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlock

A global spinlock can be initialized automatically with
DEFINE_SPINLOCK() rather than explicitly calling spin_lock_init().

Suggested

clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlock

A global spinlock can be initialized automatically with
DEFINE_SPINLOCK() rather than explicitly calling spin_lock_init().

Suggested-by: Ye Bin <yebin10@huawei.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/9073a6bfb7791e492156331fa8a0ea87a7c7cef6.1716975021.git.geert+renesas@glider.be

show more ...

Merge tag 'v6.9' into next

Sync up with the mainline to bring in the new cleanup API.

Merge drm/drm-next into drm-intel-gt-next

Some display refactoring patches are needed in order to allow conflict-
less merging.

Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>

Merge drm/drm-next into drm-intel-next

Backmerge to bring Xe driver to drm-intel-next.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Merge tag 'v6.8-rc4' into x86/percpu, to resolve conflicts and refresh the branch

Conflicts:
arch/x86/include/asm/percpu.h
arch/x86/include/asm/text-patching.h

Signed-off-by: Ingo Molnar <mingo@k

Merge tag 'v6.8-rc4' into x86/percpu, to resolve conflicts and refresh the branch

Conflicts:
arch/x86/include/asm/percpu.h
arch/x86/include/asm/text-patching.h

Signed-off-by: Ingo Molnar <mingo@kernel.org>

show more ...

Merge remote-tracking branch 'torvalds/master' into perf-tools-next

To pick up fixes that went thru perf-tools for v6.7 and to get in sync
with upstream to check for drift in the copies of headers,

Merge remote-tracking branch 'torvalds/master' into perf-tools-next

To pick up fixes that went thru perf-tools for v6.7 and to get in sync
with upstream to check for drift in the copies of headers, etc.

Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

show more ...

Merge drm/drm-next into drm-misc-next

Let's kickstart the v6.8 release cycle.

Signed-off-by: Maxime Ripard <mripard@kernel.org>

Merge branch 'tip/perf/urgent'

Avoid conflicts, base on fixes.

Signed-off-by: Peter Zijlstra <peterz@infradead.org>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk driver updates from Stephen Boyd:
"Herein lies a smallish collection of clk driver updates and some cor

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk driver updates from Stephen Boyd:
"Herein lies a smallish collection of clk driver updates and some core
clk framework changes for the merge window. The core framework changes
are only improving the debugfs interface to allow phase adjustments
and report which consumers of a clk there are. These are most likely
only of interest to kernel developers.

On the clk driver side, it's a ghastly amount of updates with only a
handful of new clk drivers. We have a couple new clk drivers for
Qualcomm, per usual, and a driver for Renesas, Amlogic, and TI
respectively. The updates are spread throughout the clk drivers.

Some highlights are fixing kunit tests for different configurations
like lockdep and big-endian, avoiding integer overflow in rate
settable clks, moving clk_hw_onecell_data to the end of allocations so
that drivers don't corrupt their private data, and migrating clk
drivers to the regmap maple tree. Otherwise it's the usual fixes to
clk drivers that only come along with testing the drivers on real
hardware.

New Drivers:
- Add clock driver for TWL6032
- Initial support for the Qualcomm SM4450 Global Clock Controller and
SM4450 RPMh clock controllers
- Add Camera Clock Controller on Qualcomm SM8550
- Add support for the Renesas RZ/G3S (R9A08G045) SoC
- Add Amlogic s4 main clock controller support

Updates:
- Make clk kunit tests work with lockdep
- Fix clk gate kunit test for big-endian
- Convert more than a handful of clk drivers to use regmap maple tree
- Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk
implementation
- Add consumer info to clk debugfs
- Fix various clk drivers that have clk_hw_onecell_data not at the
end of an allocation
- Drop CLK_SET_RATE_PARENT for clocks with fixed-rate GPLLs across a
variety of Qualcomm IPQ platforms
- Add missing parent of APCS PLL on Qualcomm IPQ6018
- Add I2C QUP6 clk on Qualcomm IPQ6018 but mark it critical to avoid
problems with RPM
- Implement safe source switching for a53pll and use on Qualcomm
IPQ5332
- Add support for Stromer Plus PLLs to Qualcomm clk driver
- Switch Qualcomm SM8550 Video and GPU clock controllers to use OLE
PLL configure method
- Non critical fixes to halt bit checks in Qualcomm clk drivers
- Add SMMU GDSC for Qualcomm MSM8998
- Fix possible integer overflow in Qualcomm RCG frequency calculation
code
- Remove RPM managed clks from Qualcomm MSM8996 GCC driver
- Add HFPLL configuration for the three HFPLLs in Qualcomm MSM8976
- Switch Qualcomm MSM8996 CBF clock driver's remove function to
return void
- Fix missing dependency for s4 clock controllers
- Select MXC_CLK when building in the CLK_IMX8QXP
- Fixes for error handling paths in i.MX8 ACM driver
- Move the clocks check in i.MX8 ACM driver in order to log any error
- Drop the unused return value of clk_imx_acm_detach_pm_domains
- Drop non-existant IMX8MP_CLK_AUDIOMIX_PDM_ROOT clock
- Fix error handling in i.MX8MQ clock driver
- Allow a different LCDIF1 clock parent if DT describes it for
i.MX6SX
- Keep the SCU resource table sorted in the i.MX8DXL rsrc driver
- Move the elcdif PLL clock registration above lcd_clk, as it is its
parent
- Correct some ENET specific clocks for i.MX8DXL platform
- Drop the VPU_UART and VPUCORE from i.MX8QM as latest HW revision
doesn't have them
- Remove "de-featured" MLB support from i.MX8QM/QXP/DXL platforms
- Skip registering clocks owned by Cortex-A partition SCU-based
platforms
- Add CAN_1/2 to i.MX8QM and M4_0, PI_0_PWM_0 and PI_0_I2C_0 to
i.MX8QXP resources"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
clk: Fix clk gate kunit test on big-endian CPUs
clk: si521xx: Increase stack based print buffer size in probe
clk: mediatek: fix double free in mtk_clk_register_pllfh()
clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data
clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data
clk: sifive: Allow building the driver as a module
clk: analogbits: Allow building the library as a module
clk: sprd: Composite driver support offset config
clk: Allow phase adjustment from debugfs
clk: Show active consumers of clocks in debugfs
clk: Use device_get_match_data()
clk: visconti: Add bounds-checking coverage for struct visconti_pll_provider
clk: visconti: Fix undefined behavior bug in struct visconti_pll_provider
clk: cdce925: Extend match support for OF tables
clk: si570: Simplify probe
clk: si5351: Simplify probe
clk: rs9: Use i2c_get_match_data() instead of device_get_match_data()
clk: clk-si544: Simplify probe() and is_valid_frequency()
clk: si521xx: Use i2c_get_match_data() instead of device_get_match_data()
clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS
...

show more ...

Merge branches 'clk-renesas', 'clk-kunit', 'clk-regmap' and 'clk-frac-divider' into clk-next

- Make clk kunit tests work with lockdep
- Fix clk gate kunit test for big-endian
- Convert more than

Merge branches 'clk-renesas', 'clk-kunit', 'clk-regmap' and 'clk-frac-divider' into clk-next

- Make clk kunit tests work with lockdep
- Fix clk gate kunit test for big-endian
- Convert more than a handful of clk drivers to use regmap maple tree
- Consider the CLK_FRAC_DIVIDER_ZERO_BASED in fractional divider clk
implementation

* clk-renesas: (23 commits)
clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2
clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R()
clk: renesas: Add minimal boot support for RZ/G3S SoC
clk: renesas: rzg2l: Add divider clock for RZ/G3S
clk: renesas: rzg2l: Refactor SD mux driver
clk: renesas: rzg2l: Remove CPG_SDHI_DSEL from generic header
clk: renesas: rzg2l: Add struct clk_hw_data
clk: renesas: rzg2l: Add support for RZ/G3S PLL
clk: renesas: rzg2l: Remove critical area
clk: renesas: rzg2l: Fix computation formula
clk: renesas: rzg2l: Trust value returned by hardware
clk: renesas: rzg2l: Lock around writes to mux register
clk: renesas: rzg2l: Wait for status bit of SD mux before continuing
clk: renesas: rcar-gen3: Extend SDnH divider table
dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC
clk: renesas: r8a7795: Constify r8a7795_*_clks
clk: renesas: r9a06g032: Name anonymous structs
clk: renesas: r9a06g032: Fix kerneldoc warning
clk: renesas: rzg2l: Use u32 for flag and mux_flags
clk: renesas: rzg2l: Use FIELD_GET() for PLL register fields
...

* clk-kunit:
clk: Fix clk gate kunit test on big-endian CPUs
clk: Parameterize clk_leaf_mux_set_rate_parent
clk: Drive clk_leaf_mux_set_rate_parent test from clk_ops

* clk-regmap:
clk: versaclock7: Convert to use maple tree register cache
clk: versaclock5: Convert to use maple tree register cache
clk: versaclock3: Convert to use maple tree register cache
clk: versaclock3: Remove redundant _is_writeable()
clk: si570: Convert to use maple tree register cache
clk: si544: Convert to use maple tree register cache
clk: si5351: Convert to use maple tree register cache
clk: si5341: Convert to use maple tree register cache
clk: si514: Convert to use maple tree register cache
clk: cdce925: Convert to use maple tree register cache

* clk-frac-divider:
clk: fractional-divider: tests: Add test suite for edge cases
clk: fractional-divider: Improve approximation when zero based and export

show more ...

Merge tag 'renesas-clk-for-v6.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pulll more Renesas clk driver updates from Geert Uytterhoeven:

- Add s

Merge tag 'renesas-clk-for-v6.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pulll more Renesas clk driver updates from Geert Uytterhoeven:

- Add support for the RZ/G3S (R9A08G045) SoC
- Miscellaneous fixes and improvements

* tag 'renesas-clk-for-v6.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a08g045: Add clock and reset support for SDHI1 and SDHI2
clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R()
clk: renesas: Add minimal boot support for RZ/G3S SoC
clk: renesas: rzg2l: Add divider clock for RZ/G3S
clk: renesas: rzg2l: Refactor SD mux driver
clk: renesas: rzg2l: Remove CPG_SDHI_DSEL from generic header
clk: renesas: rzg2l: Add struct clk_hw_data
clk: renesas: rzg2l: Add support for RZ/G3S PLL
clk: renesas: rzg2l: Remove critical area
clk: renesas: rzg2l: Fix computation formula
clk: renesas: rzg2l: Trust value returned by hardware
clk: renesas: rzg2l: Lock around writes to mux register
clk: renesas: rzg2l: Wait for status bit of SD mux before continuing
clk: renesas: rcar-gen3: Extend SDnH divider table
dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC

show more ...

clk: renesas: rcar-gen3: Extend SDnH divider table

The clock dividers might be used with clock stop bit enabled or not.
Current tables only support recommended values from the datasheet. This
might

clk: renesas: rcar-gen3: Extend SDnH divider table

The clock dividers might be used with clock stop bit enabled or not.
Current tables only support recommended values from the datasheet. This
might result in warnings like below because no valid clock divider is
found. Resulting in a 0 divider.

There are Renesas ARM Trusted Firmware version out there which e.g.
configure 0x201 (shifted logical right by 2: 0x80) and with this match
the added { STPnHCK | 0, 1 }:

https://github.com/renesas-rcar/arm-trusted-firmware/blob/rcar_gen3_v2.3/drivers/renesas/rcar/emmc/emmc_init.c#L108

------------[ cut here ]------------
sd1h: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set
WARNING: CPU: 1 PID: 1 at drivers/clk/clk-divider.c:141 divider_recalc_rate+0x48/0x70
Modules linked in:
CPU: 1 PID: 1 Comm: swapper/0 Not tainted 6.1.52 #1
Hardware name: Custom board based on r8a7796 (DT)
pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
pc : divider_recalc_rate+0x48/0x70
...
------------[ cut here ]------------

Fixes: bb6d3fa98a41 ("clk: renesas: rcar-gen3: Switch to new SD clock handling")
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
[wsa: extended the table to 5 entries, added comments, reword commit message a little]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230928080317.28224-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

show more ...

Merge tag 'v5.18'

Linux 5.18

Merge branches 'fixes' and 'misc' into for-linus

Merge branch 'for-5.18/amd-sfh' into for-linus

- dead code elimination (Christophe JAILLET)

Merge tag 'v5.17-rc4' into for-linus

Merge with mainline to get the Intel ASoC generic helpers header and
other changes.