Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This time it looks like a quieter release cycle in the clk tree. I
guess

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This time it looks like a quieter release cycle in the clk tree. I
guess that's because of summer time holidays/vacations. The biggest
change in the diffstat is in the Qualcomm clk driver, where they got
support for CPUs and handful of SoCs. After that, the at91 driver got
a major rewrite for newer DT bindings that should make things easier
going forward and the TI code moved to a clockdomain based design.

The long tail is mostly small driver updates for newer clks and some
simpler SoC clock drivers such as the Hisilicon and imx support.

In the core framework, we only have two small changes this time.

One is a new clk API to get all clks for a device with the bulk clk
APIs. This allows drivers that don't care about doing anything besides
turning on all the clks to just clk_get() them all and turn them on.

The other change is the beginning of a way to support save and restore
of clk settings in the clk framework. TI is the only user right now,
but we will want to expand upon this design in the future to support
more save and restore of clk registers. At least this gets us started
and works well enough for one SoC, but there's more work in the
future.

Core:
- clk_bulk_get_all() API and friends to get all the clks for a device
- Basic clk state save/restore hooks

New Drivers:
- Renesas RZ/A2 (R7S9210) SoC, including early clocks
- Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs
- Rensas RZ/G2M (r8a774a1) SoC
- Qualcomm Krait CPU clk support
- Qualcomm QCS404 GCC support
- Qualcomm SDM660 GCC support
- Qualcomm SDM845 camera clock controller
- Ingenic jz4725b CGU
- Hisilicon 3670 SoC support
- TI SCI clks on K3 SoCs
- iMX6 MMDC clks
- Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs

Updates:
- Rework at91 PMC clock driver for new DT bindings
- Nvidia Tegra clk driver MBIST workaround fix
- S2RAM support for Marvell mvebu periph clks
- Use updated printk format for OF node names
- Fix TI code to only search DT subnodes
- Various static analysis finds
- Tag various drivers with SPDX license tags
- Support dynamic frequency switching (DFS) on qcom SDM845 GCC
- Only use s2mps11 dt-binding defines instead of redefining them in the driver
- Add some more missing clks to qcom MSM8996 GCC
- Quad SPI clks on qcom SDM845
- Add support for CMT timer clocks on R-Car V3H
- Add support for SHDI and various timer clocks on R-Car V3M
- Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs
- Amlogic clk-pll driver improvements and updates
- Amlogic axg audio controller system clocks
- Register Amlogic meson8b clock controller early
- Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N
- Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers
- Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC
- Remove obsoleted Exynos4212 ISP clock definitions
- Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design
- TI RTC+DDR sleep mode support for clock save/restore
- Allwinner A64 display engine support and fixes
- Allwinner A83t display engine support and fixes"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (186 commits)
clk: qcom: Remove unused arrays in SDM845 GCC
clk: fixed-rate: fix of_node_get-put imbalance
clk: s2mps11: Add used attribute to s2mps11_dt_match
clk: qcom: gcc-sdm660: Add MODULE_LICENSE
clk: qcom: Add safe switch hook for krait mux clocks
dt-bindings: clock: Document qcom,krait-cc
clk: qcom: Add Krait clock controller driver
dt-bindings: arm: Document qcom,kpss-gcc
clk: qcom: Add KPSS ACC/GCC driver
clk: qcom: Add support for Krait clocks
clk: qcom: Add IPQ806X's HFPLLs
clk: qcom: Add MSM8960/APQ8064's HFPLLs
dt-bindings: clock: Document qcom,hfpll
clk: qcom: Add HFPLL driver
clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
ARM: Add Krait L2 register accessor functions
clk: imx6q: add mmdc0 ipg clock
clk: imx6sl: add mmdc ipg clocks
clk: imx6sll: add mmdc1 ipg clock
clk: imx6sx: add mmdc1 ipg clock
...

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Merge branch 'clk-renesas' into clk-next

* clk-renesas: (36 commits)
clk: renesas: r7s9210: Add SPI clocks
clk: renesas: r7s9210: Move table update to separate function
clk: renesas: r7s9210:

Merge branch 'clk-renesas' into clk-next

* clk-renesas: (36 commits)
clk: renesas: r7s9210: Add SPI clocks
clk: renesas: r7s9210: Move table update to separate function
clk: renesas: r7s9210: Convert some clocks to early
clk: renesas: cpg-mssr: Add early clock support
clk: renesas: r8a77970: Add TPU clock
clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment
dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0
clk: renesas: cpg-mssr: Add r8a774c0 support
clk: renesas: Add r8a774c0 CPG Core Clock Definitions
clk: renesas: r8a7743: Add r8a7744 support
clk: renesas: Add r8a7744 CPG Core Clock Definitions
dt-bindings: clock: renesas: cpg-mssr: Document r8a7744 binding
dt-bindings: clock: renesas: Convert to SPDX identifiers
clk: renesas: cpg-mssr: Add R7S9210 support
clk: renesas: r8a77970: Add TMU clocks
clk: renesas: r8a77970: Add CMT clocks
clk: renesas: r9a06g032: Fix UART34567 clock rate
clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI
clk: renesas: r8a77980: Add CMT clocks
clk: renesas: r8a77990: Add missing I2C7 clock
...

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Merge tag 'clk-renesas-for-v4.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Add suppor

Merge tag 'clk-renesas-for-v4.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

- Add support for CMT timer clocks on R-Car V3H
- Add support for SHDI and various timer clocks on R-Car V3M
- Add support for the new RZ/A2 (R7S9210) SoC, including early clock
support for the Renesas CPG/MSSR driver
- Add support for the new RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs
- Convert DT binding includes to SPDX license identifiers

* tag 'clk-renesas-for-v4.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r7s9210: Add SPI clocks
clk: renesas: r7s9210: Move table update to separate function
clk: renesas: r7s9210: Convert some clocks to early
clk: renesas: cpg-mssr: Add early clock support
clk: renesas: r8a77970: Add TPU clock
clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment
dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0
clk: renesas: cpg-mssr: Add r8a774c0 support
clk: renesas: Add r8a774c0 CPG Core Clock Definitions
clk: renesas: r8a7743: Add r8a7744 support
clk: renesas: Add r8a7744 CPG Core Clock Definitions
dt-bindings: clock: renesas: cpg-mssr: Document r8a7744 binding
dt-bindings: clock: renesas: Convert to SPDX identifiers
clk: renesas: cpg-mssr: Add R7S9210 support
clk: renesas: r8a77970: Add TMU clocks
clk: renesas: r8a77970: Add CMT clocks
clk: renesas: r9a06g032: Fix UART34567 clock rate
clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI
clk: renesas: r8a77980: Add CMT clocks

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clk: renesas: r7s9210: Add SPI clocks

Add RSPI clocks for RZ/A2.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert U

clk: renesas: r7s9210: Add SPI clocks

Add RSPI clocks for RZ/A2.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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clk: renesas: r7s9210: Move table update to separate function

Same functionality, just easier to read.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Geert Uytterhoeven <geer

clk: renesas: r7s9210: Move table update to separate function

Same functionality, just easier to read.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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clk: renesas: r7s9210: Convert some clocks to early

The OSTM timer driver for RZ/A2 uses TIMER_OF_DECLARE which requires the
ostm module clocks to be registers early in boot.

Signed-off-by: Chris B

clk: renesas: r7s9210: Convert some clocks to early

The OSTM timer driver for RZ/A2 uses TIMER_OF_DECLARE which requires the
ostm module clocks to be registers early in boot.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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clk: renesas: cpg-mssr: Add R7S9210 support

Add support for the R7S9210 (RZ/A2) Clock Pulse Generator and Module
Standby.

The Module Standby HW in the RZ/A series is very close to R-Car HW, except

clk: renesas: cpg-mssr: Add R7S9210 support

Add support for the R7S9210 (RZ/A2) Clock Pulse Generator and Module
Standby.

The Module Standby HW in the RZ/A series is very close to R-Car HW, except
for how the registers are laid out.
The MSTP registers are only 8-bits wide, there are no status registers
(MSTPSR), and the register offsets are a little different. Since the RZ/A
hardware manuals refer to these registers as the Standby Control Registers,
we'll use that name to distinguish the RZ/A type from the R-Car type.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Rob Herring <robh@kernel.org> # DT bits
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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