#
1aa77e71 |
| 13-Jan-2022 |
Arnaldo Carvalho de Melo <acme@redhat.com> |
Merge remote-tracking branch 'torvalds/master' into perf/core
To pick up fixes and get in line with other trees, powerpc kernel mostly this time, but BPF as well.
Signed-off-by: Arnaldo Carvalho de
Merge remote-tracking branch 'torvalds/master' into perf/core
To pick up fixes and get in line with other trees, powerpc kernel mostly this time, but BPF as well.
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
show more ...
|
#
455e73a0 |
| 13-Jan-2022 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "We have a couple patches in the framework core this time around but they'
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "We have a couple patches in the framework core this time around but they're mostly minor cleanups and some debugfs stuff. The real work that's in here is the typical pile of clk driver updates and new SoC support.
Per usual (or maybe just recent trends), Qualcomm gains a handful of SoC drivers additions and has the largest diffstat. After that there are quite a few updates to the Allwinner (sunxi) drivers to support modular drivers and Renesas is heavily updated to add more support for various clks.
Overall it looks pretty normal.
New Drivers: - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770 - MediaTek mt7986 SoC basic support - Clock and reset driver for Toshiba Visconti SoCs - Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8) - Allwinner D1 clks - Lan966x Generic Clock Controller driver and associated DT bindings - Qualcomm SDX65, SM8450, and MSM8976 GCC clks - Qualcomm SDX65 and SM8450 RPMh clks
Updates: - Set suppress_bind_attrs to true for i.MX8ULP driver - Switch from do_div to div64_ul for throughout all i.MX drivers - Fix imx8mn_clko1_sels for i.MX8MN - Remove unused IPG_AUDIO_ROOT from i.MX8MP - Switch parent for audio_root_clk to audio ahb in i.MX8MP driver - Removal of all remaining uses of __clk_lookup() in drivers/clk/samsung - Refactoring of the CPU clocks registration to use common interface - An update of the Exynos850 driver (support for more clock domains) required by the E850-96 development board - Prep for runtime PM and generic power domains on Tegra - Support modular Allwinner clk drivers via platform bus - Lan966x clock driver extended to support clock gating - Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and thermal (TSU) clocks and resets on Renesas RZ/G2L - Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2 clock drivers, and in the Renesas SDHI driver - Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable - Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC - Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC - Add GPU clock and resets on Renesas RZ/G2L - Add clk-provider.h to various Qualcomm clk drivers - devm version of clk_hw_register_gate() - kerneldoc fixes in a couple drivers"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (131 commits) clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup() clk: mediatek: add mt7986 clock support clk: mediatek: add mt7986 clock IDs dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper clk: x86: Fix clk_gate_flags for RV_CLK_GATE clk: x86: Use dynamic con_id string during clk registration ACPI: APD: Add a fmw property clk-name drivers: acpi: acpi_apd: Remove unused device property "is-rv" x86: clk: clk-fch: Add support for newer family of AMD's SOC clk: ingenic: Add MDMA and BDMA clocks dt-bindings: clk/ingenic: Add MDMA and BDMA clocks clk: bm1880: remove kfrees on static allocations clk: Drop unused COMMON_CLK_STM32MP157_SCMI config clk: st: clkgen-mux: search reg within node or parent clk: st: clkgen-fsyn: search reg within node or parent clk: Enable/Disable runtime PM for clk_summary MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller clk: visconti: Add support common clock driver and reset driver ...
show more ...
|
#
4afd2a93 |
| 12-Jan-2022 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-ingenic' and 'clk-mediatek' into clk-next
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770 - MediaTek mt7986 SoC basic support
* clk-ingenic: clk: ingenic: Add MDMA and
Merge branches 'clk-ingenic' and 'clk-mediatek' into clk-next
- Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770 - MediaTek mt7986 SoC basic support
* clk-ingenic: clk: ingenic: Add MDMA and BDMA clocks dt-bindings: clk/ingenic: Add MDMA and BDMA clocks
* clk-mediatek: clk: mediatek: add mt7986 clock support clk: mediatek: add mt7986 clock IDs dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
show more ...
|
Revision tags: v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6 |
|
#
ec97d23c |
| 17-Dec-2021 |
Sam Shih <sam.shih@mediatek.com> |
clk: mediatek: add mt7986 clock support
Add MT7986 clock support, include topckgen, apmixedsys, infracfg, and ethernet subsystem clocks.
Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https:
clk: mediatek: add mt7986 clock support
Add MT7986 clock support, include topckgen, apmixedsys, infracfg, and ethernet subsystem clocks.
Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20211217121148.6753-4-sam.shih@mediatek.com Reviewed-by: Ryder Lee <ryder.lee@kernel.org> [sboyd@kernel.org: Fix typos in Kconfig, there are more existing typos from where they were copied from of but whatever] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
show more ...
|
#
f81483aa |
| 05-Jan-2022 |
Takashi Iwai <tiwai@suse.de> |
Merge branch 'for-next' into for-linus
Pull 5.17 materials.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
|
#
17580470 |
| 17-Dec-2021 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-next into drm-misc-next-fixes
Backmerging to bring drm-misc-next-fixes up to the latest state for the current release cycle.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
|
Revision tags: v5.16-rc5 |
|
#
86329873 |
| 09-Dec-2021 |
Daniel Lezcano <daniel.lezcano@linaro.org> |
Merge branch 'reset/of-get-optional-exclusive' of git://git.pengutronix.de/pza/linux into timers/drivers/next
"Add optional variant of of_reset_control_get_exclusive(). If the requested reset is not
Merge branch 'reset/of-get-optional-exclusive' of git://git.pengutronix.de/pza/linux into timers/drivers/next
"Add optional variant of of_reset_control_get_exclusive(). If the requested reset is not specified in the device tree, this function returns NULL instead of an error."
This dependency is needed for the Generic Timer Module (a.k.a OSTM) support for RZ/G2L.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
show more ...
|
#
5d8dfaa7 |
| 09-Dec-2021 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
Merge tag 'v5.15' into next
Sync up with the mainline to get the latest APIs and DT bindings.
|
Revision tags: v5.16-rc4, v5.16-rc3 |
|
#
448cc2fb |
| 22-Nov-2021 |
Jani Nikula <jani.nikula@intel.com> |
Merge drm/drm-next into drm-intel-next
Sync up with drm-next to get v5.16-rc2.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
|
#
8626afb1 |
| 22-Nov-2021 |
Tvrtko Ursulin <tvrtko.ursulin@intel.com> |
Merge drm/drm-next into drm-intel-gt-next
Thomas needs the dma_resv_for_each_fence API for i915/ttm async migration work.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
|
Revision tags: v5.16-rc2 |
|
#
a713ca23 |
| 18-Nov-2021 |
Thomas Zimmermann <tzimmermann@suse.de> |
Merge drm/drm-next into drm-misc-next
Backmerging from drm/drm-next for v5.16-rc1.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
|
#
467dd91e |
| 16-Nov-2021 |
Maxime Ripard <maxime@cerno.tech> |
Merge drm/drm-fixes into drm-misc-fixes
We need -rc1 to address a breakage in drm/scheduler affecting panfrost.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
|
Revision tags: v5.16-rc1 |
|
#
7f9f8792 |
| 06-Nov-2021 |
Arnaldo Carvalho de Melo <acme@redhat.com> |
Merge remote-tracking branch 'torvalds/master' into perf/core
To pick up some tools/perf/ patches that went via tip/perf/core, such as:
tools/perf: Add mem_hops field in perf_mem_data_src structu
Merge remote-tracking branch 'torvalds/master' into perf/core
To pick up some tools/perf/ patches that went via tip/perf/core, such as:
tools/perf: Add mem_hops field in perf_mem_data_src structure
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
show more ...
|
#
7ddb58cb |
| 04-Nov-2021 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "The usual collection of clk driver updates and new driver additions. In t
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "The usual collection of clk driver updates and new driver additions. In terms of lines it's mainly Qualcomm and Mediatek code, supporting various SoCs and their multitude of clk controllers.
New Drivers: - GCC and RPMcc support for Qualcomm QCM2290 SoCs - GCC support for Qualcomm MSM8994/MSM8992 SoCs - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs - Support for Mediatek MT8195 SoCs - Initial clock driver for the Exynos850 SoC - Add i.MX8ULP clock driver and related bindings
Updates: - Clock power management for new SAMA7G5 SoC - Updates to the master clock driver and sam9x60-pll to be able to use cpufreq-dt driver and avoid overclocking of CPU and MCK0 domains while changing the frequency via DVFS - Use ARRAY_SIZE in qcom clk drivers - Remove some impractical fallback parent names in qcom clk drivers - Make Mediatek clk drivers tristate - Refactoring of the CPU clock code and conversion of Samsung Exynos5433 CPU clock driver to the platform driver - A few conversions to devm_platform_ioremap_resource() - Updates of the Samsung Kconfig help text - Update video path realted clocks for Amlogic meson8 - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N - Remove unused helpers from i.MX specific clock header - Rework all i.MX clk based helpers to use clk_hw based ones - Rework i.MX gate/mux/divider wrappers - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers - Update i.MX pllv4 and composite clocks to support i.MX8ULP - Disable i.MX7ULP composite clock during initialization - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite - Disable the i.MX pfd when set pfdv2 clock rate - Add support for i.MX8ULP in pfdv2 - Add the pcc reset controller support on i.MX8ULP - Fix the build break when clk-imx8ulp is built as module - Move csi_sel mux to correct base register in i.MX6UL clock drivr - Fix csi clk gate register in i.MX6UL clock driver - Fix build bug making CLK_IMX8ULP select MXC_CLK - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U - Add Ethernet clocks on Renesas RZ/G2L - Move Rockchip to use module_platform_probe - Enable usage of Coresight related clocks on Rockchip rk3399"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (170 commits) clk: use clk_core_get_rate_recalc() in clk_rate_get() clk: at91: sama7g5: set low limit for mck0 at 32KHz clk: at91: sama7g5: remove prescaler part of master clock clk: at91: clk-master: add notifier for divider clk: at91: clk-sam9x60-pll: add notifier for div part of PLL clk: at91: clk-master: fix prescaler logic clk: at91: clk-master: mask mckr against layout->mask clk: at91: clk-master: check if div or pres is zero clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL clk: at91: pmc: add sama7g5 to the list of available pmcs clk: at91: clk-master: improve readability by using local variables clk: at91: clk-master: add register definition for sama7g5's master clock clk: at91: sama7g5: add securam's peripheral clock clk: at91: pmc: execute suspend/resume only for backup mode clk: at91: re-factor clocks suspend/resume clk: ux500: Add driver for the reset portions of PRCC dt-bindings: clock: u8500: Rewrite in YAML and extend clk: composite: Use rate_ops.determine_rate when also a mux is available clk: samsung: describe drivers in Kconfig clk: samsung: exynos5433: update apollo and atlas clock probing ...
show more ...
|
#
a379e16a |
| 02-Nov-2021 |
Stephen Boyd <sboyd@kernel.org> |
Merge branches 'clk-qcom', 'clk-mtk', 'clk-versatile' and 'clk-doc' into clk-next
- Use ARRAY_SIZE in qcom clk drivers - Remove some impractical fallback parent names in qcom clk drivers - GCC an
Merge branches 'clk-qcom', 'clk-mtk', 'clk-versatile' and 'clk-doc' into clk-next
- Use ARRAY_SIZE in qcom clk drivers - Remove some impractical fallback parent names in qcom clk drivers - GCC and RPMcc support for Qualcomm QCM2290 SoCs - GCC support for Qualcomm MSM8994/MSM8992 SoCs - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs - Support for Mediatek MT8195 SoCs - Make Mediatek clk drivers tristate
* clk-qcom: (44 commits) clk: qcom: gdsc: enable optional power domain support clk: qcom: videocc-sm8250: use runtime PM for the clock controller clk: qcom: dispcc-sm8250: use runtime PM for the clock controller dt-bindings: clock: qcom,videocc: add mmcx power domain dt-bindings: clock: qcom,dispcc-sm8x50: add mmcx power domain clk: qcom: gcc-sc7280: Drop unused array clk: qcom: camcc: Add camera clock controller driver for SC7280 dt-bindings: clock: Add YAML schemas for CAMCC clocks on SC7280 clk: qcom: Add lpass clock controller driver for SC7280 dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280 clk: qcom: Kconfig: Sort the symbol for SC_LPASS_CORECC_7180 clk: qcom: mmcc-sdm660: Add hw_ctrl flag to venus_core0_gdsc clk: qcom: mmcc-sdm660: Add necessary CXCs to venus_gdsc clk: qcom: gcc-msm8994: Use ARRAY_SIZE() for num_parents clk: qcom: gcc-msm8994: Add proper msm8992 support clk: qcom: gcc-msm8994: Add modem reset clk: qcom: gcc-msm8994: Remove the inexistent GDSC_PCIE clk: qcom: gcc-msm8994: Add missing clocks clk: qcom: gcc-msm8994: Add missing NoC clocks clk: qcom: gcc-msm8994: Fix up SPI QUP clocks ...
* clk-mtk: (28 commits) clk: mediatek: Export clk_ops structures to modules clk: mediatek: support COMMON_CLK_MT6779 module build clk: mediatek: support COMMON_CLK_MEDIATEK module build clk: composite: export clk_register_composite clk: mediatek: Add MT8195 apusys clock support clk: mediatek: Add MT8195 imp i2c wrapper clock support clk: mediatek: Add MT8195 wpesys clock support clk: mediatek: Add MT8195 vppsys1 clock support clk: mediatek: Add MT8195 vppsys0 clock support clk: mediatek: Add MT8195 vencsys clock support clk: mediatek: Add MT8195 vdosys1 clock support clk: mediatek: Add MT8195 vdosys0 clock support clk: mediatek: Add MT8195 vdecsys clock support clk: mediatek: Add MT8195 scp adsp clock support clk: mediatek: Add MT8195 mfgcfg clock support clk: mediatek: Add MT8195 ipesys clock support clk: mediatek: Add MT8195 imgsys clock support clk: mediatek: Add MT8195 ccusys clock support clk: mediatek: Add MT8195 camsys clock support clk: mediatek: Add MT8195 infrastructure clock support ...
* clk-versatile: clk: versatile: hide clock drivers from non-ARM users clk: versatile: Rename ICST to CLK_ICST clk: versatile: clk-icst: Support 'reg' in addition to 'vco-offset' for register address dt-bindings: clock: arm,syscon-icst: Use 'reg' instead of 'vco-offset' for VCO register address
* clk-doc: dt-bindings: clk: fixed-mmio-clock: Convert to YAML
show more ...
|
#
40e64a88 |
| 02-Nov-2021 |
Petr Mladek <pmladek@suse.com> |
Merge branch 'for-5.16-vsprintf-pgp' into for-linus
|
Revision tags: v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5 |
|
#
e700ac21 |
| 06-Oct-2021 |
Tony Lindgren <tony@atomide.com> |
Merge branch 'pruss-fix' into fixes
Merge in a fix for pruss reset issue caused by enabling pruss for am335x.
|
Revision tags: v5.15-rc4, v5.15-rc3 |
|
#
ffb1e76f |
| 20-Sep-2021 |
Mark Brown <broonie@kernel.org> |
Merge tag 'v5.15-rc2' into spi-5.15
Linux 5.15-rc2
|
Revision tags: v5.15-rc2 |
|
#
d1b803f4 |
| 15-Sep-2021 |
Rodrigo Vivi <rodrigo.vivi@intel.com> |
Merge drm/drm-next into drm-intel-next
Catch-up on 5.15-rc1 and sync with drm-intel-gt-next to prepare the PXP topic branch.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
|
#
d5dd580d |
| 15-Sep-2021 |
Joonas Lahtinen <joonas.lahtinen@linux.intel.com> |
Merge drm/drm-next into drm-intel-gt-next
Close the divergence which has caused patches not to apply and have a solid baseline for the PXP patches that Rodrigo will send a topic branch PR for.
Sign
Merge drm/drm-next into drm-intel-gt-next
Close the divergence which has caused patches not to apply and have a solid baseline for the PXP patches that Rodrigo will send a topic branch PR for.
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
show more ...
|
Revision tags: v5.15-rc1 |
|
#
f09b9460 |
| 02-Sep-2021 |
Miles Chen <miles.chen@mediatek.com> |
clk: mediatek: support COMMON_CLK_MT6779 module build
To support COMMON_CLK_MT6779* module build, add MODULE_LICENSE and export necessary symbols.
Cc: Stephen Boyd <sboyd@kernel.org> Cc: Hanks Chen
clk: mediatek: support COMMON_CLK_MT6779 module build
To support COMMON_CLK_MT6779* module build, add MODULE_LICENSE and export necessary symbols.
Cc: Stephen Boyd <sboyd@kernel.org> Cc: Hanks Chen <hanks.chen@mediatek.com> Cc: Wendell Lin <wendell.lin@mediatek.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20210901222526.31065-4-miles.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
show more ...
|
#
32b028fb |
| 02-Sep-2021 |
Miles Chen <miles.chen@mediatek.com> |
clk: mediatek: support COMMON_CLK_MEDIATEK module build
To support COMMON_CLK_MEDIATEK module build, add MODULE_LICENSE and export necessary symbols.
Cc: Stephen Boyd <sboyd@kernel.org> Cc: Hanks C
clk: mediatek: support COMMON_CLK_MEDIATEK module build
To support COMMON_CLK_MEDIATEK module build, add MODULE_LICENSE and export necessary symbols.
Cc: Stephen Boyd <sboyd@kernel.org> Cc: Hanks Chen <hanks.chen@mediatek.com> Cc: Wendell Lin <wendell.lin@mediatek.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20210901222526.31065-3-miles.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
show more ...
|
#
3e9121f1 |
| 14-Sep-2021 |
Chun-Jie Chen <chun-jie.chen@mediatek.com> |
clk: mediatek: Add MT8195 apmixedsys clock support
Add MT8195 apmixedsys clock controller which provides Plls generated from SoC 26m and ssusb clock gate control.
Signed-off-by: Chun-Jie Chen <chun
clk: mediatek: Add MT8195 apmixedsys clock support
Add MT8195 apmixedsys clock controller which provides Plls generated from SoC 26m and ssusb clock gate control.
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210914021633.26377-7-chun-jie.chen@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
show more ...
|
#
2f765205 |
| 14-Sep-2021 |
Maxime Ripard <maxime@cerno.tech> |
Merge drm/drm-next into drm-misc-next
Kickstart new drm-misc-next cycle.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
|
#
c2f4954c |
| 11-Sep-2021 |
Thomas Gleixner <tglx@linutronix.de> |
Merge branch 'linus' into smp/urgent
Ensure that all usage sites of get/put_online_cpus() except for the struggler in drivers/thermal are gone. So the last user and the deprecated inlines can be rem
Merge branch 'linus' into smp/urgent
Ensure that all usage sites of get/put_online_cpus() except for the struggler in drivers/thermal are gone. So the last user and the deprecated inlines can be removed.
show more ...
|