en Copyright 2015 Java http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#502d45774af09f1c681c754c4b7cdfb5d7f72fd9 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxPull clk updates from Stephen Boyd: "Mostly the usual clk driver updates and new SoC additions plus non-critical data fixes for things that weren't used yet. One thing that's new here in the core is SSC spread spectrum support (SSC) in the clk provider API. The idea is that DT authors will configure SSC for certain clks and they'll be configured at clk provider registration time or when a consumer device is probed, similar to how we handle assigned clk rates or parents. On the clk driver side we have Qualcomm adding almost half the diff because they add support for 4 different SoCs and then a long tail of other SoCs like Mediatek, Renesas, Rockchip, SpaceMiT, etc. add more SoC support this time around. Luckily it's mostly clk data for these new SoCs because the actual clk_ops are already there. Beyond the new drivers we get all the little fixups for more compilation coverage or usage of more modern APIs. That all looks normal. Finally, I kinda buried the lede, I'm bringing on Brian and Jerome to help out with maintaining the clk subsystem. The current working model is already semi-distributed in that silicon vendors typically take care of their drivers and send me pull requests but I'm becoming a bottleneck for new drivers and core framework review because this has become a 100% volunteer effort on my part. Mike is stepping down after all these years (thanks Mike!) and that jump started the conversation around finding co-maintainers. Brian and Jerome have graciously offered to help me with the work load, meaning in the future they'll be sending pull requests and committing directly to the clk.git tree. They've both been around on the list for a while, I've met them both in person, and they've been making changes to the core clk framework along with helping review patches so I'm pretty confident this will work well. Core: - devm_clk_bulk_get_enable() consumer API - devm_clk_hw_register_composite_pdata() provider API - Spread Spectrum Clock (SSC) support via DT bindings and provider APIs - Divider clk rounding improved (and tested) New Drivers: - Cix Sky1 audio subsystem (AUDSS) - UltraRISC DP1000 - MediaTek MT8173 MFG_TOP - Si549 - Aspeed AST2700 PECI - Airoha EN7523 PCIe - Rockchip RV1106 - Mobileye EyeQ7H - Qualcomm Maili GCC, TCSR, RPMh, and video clks - Qualcomm Shikra GCC, RPM, GPU, display, and audio clks - Qualcomm Nord display and graphics clks - Qualcomm Glymur camera and EVA clks - Qualcomm Hawi video clks - Amlogic A9 AO and peripheral clks - Renesas R-Car X5H (R8A78000) CPG"* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (269 commits) clk: microchip: mpfs: fix regmap_update_bits() mask/val order clk: visconti: Make sure clk_init_data is fully initialized clk: ti: Make sure clk_init_data is fully initialized MAINTAINERS: Add Brian Masney and Jerome Brunet as co-maintainers for clk subsystem Drop Michael Turquette's clk maintainer entry clk: ti: composite: resolve parent clocks by DT index, not by name clk: ti: mux: resolve parent clocks by DT index, not by name clk: devres: fix cleanup in devm_clk_get_optional_enabled_with_rate() dt-bindings: clock: ti,keystone-gate: Convert to DT schema dt-bindings: clock: ti: Convert APLL clock to DT schema clk: zynq: pll: Fix kernel-doc after determine_rate() conversion dt-bindings: clock: ti,clockdomain: Convert to DT schema dt-bindings: clock: Correct white-space style clk: samsung: Don't include <linux/mod_devicetable.h> clk: at91: Read "reg" with helper clk: renesas: Add R-Car X5H CPG driver clk: rockchip: rk3576: fix source muxes for SPI0..SPI4 clk: rockchip: Add clock controller for the RV1106 dt-bindings: clock: rockchip: Add RV1106 CRU support dt-bindings: clock: Document Renesas R-Car X5H Clock Pulse Generator ... List of files: /linux/drivers/clk/mediatek/Kconfig Wed, 26 Aug 2026 20:14:30 +0200 Linus Torvalds <torvalds@linux-foundation.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#dd8eb789f18c4c600f28e61176a02bcf3b790117 Merge branches 'clk-pile' and 'clk-microchip' into clk-next* clk-pile: (111 commits) clk: microchip: mpfs: fix regmap_update_bits() mask/val order clk: visconti: Make sure clk_init_data is fully initialized clk: ti: Make sure clk_init_data is fully initialized MAINTAINERS: Add Brian Masney and Jerome Brunet as co-maintainers for clk subsystem Drop Michael Turquette's clk maintainer entry clk: ti: composite: resolve parent clocks by DT index, not by name clk: ti: mux: resolve parent clocks by DT index, not by name clk: devres: fix cleanup in devm_clk_get_optional_enabled_with_rate() dt-bindings: clock: ti,keystone-gate: Convert to DT schema dt-bindings: clock: ti: Convert APLL clock to DT schema clk: zynq: pll: Fix kernel-doc after determine_rate() conversion dt-bindings: clock: ti,clockdomain: Convert to DT schema dt-bindings: clock: Correct white-space style clk: tegra: set up proper EMC clock implementation for Tegra114 clk: clocking-wizard: remove 20kHz restriction clk: clocking-wizard: optimize clock search clk: clocking-wizard: fix clock difference detection clk: mediatek: mt8135: Fix inverted gate control for devapc_ck clk: clocking-wizard: Program PLL CP/RES and lock parameters on reconfig clk: tegra: support 48MHz clock for pll_p_out1 ...* clk-microchip: clk: at91: Read "reg" with helper List of files: /linux/drivers/clk/mediatek/Kconfig Fri, 21 Aug 2026 01:51:47 +0200 Stephen Boyd <sboyd@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#df822f2e36cf2c2864d166d90cf002df4d8689e5 Merge tag 'clk-misc-round-two-for-v7.3' of ssh://github.com/masneyb/linux into clk-pilePull clk patches from Brian Masney: - New clock controller drivers for the Cix Sky1 audio subsystem (AUDSS), UltraRISC DP1000, and MediaTek MT8173 MFG_TOP, along with their devicetree bindings. Si549 support was added to the existing si544 driver. - New clock and reset support for the Aspeed AST2700 PECI controller and Airoha EN7523 PCIe PERSTOUT reset lines. - The clk core gains devm_clk_bulk_get_enable() as the mandatory counterpart to the existing optional variant, and exports devm_clk_hw_register_composite_pdata() for modular drivers. - Tegra gets a proper EMC clock implementation for Tegra114, 48MHz pll_p_out1 support needed for UEFI on Surface2, and the Xilinx clocking-wizard gains PLL charge pump/lock parameter programming during dynamic reconfiguration. - Bug fixes for a NULL pointer dereference from uninitialized clk_init_data in the eswin driver, an IO remap leak in the MediaTek pllfh error path, inverted gate control for MT8135 devapc_ck, a missing OF node put in tegra124-emc on registration failure, a prepare reference leak in the palmas driver, unregistered PLLs on MT6735 probe failure, a missing kasprintf NULL check in pmc_atom, PCIe warm boot instability in the Airoha EN7523 driver, and a clocking-wizard clock difference detection bug. - Various cleanups across tegra, st, and mvebu providers to stop misusing the consumer clock API, along with other minor fixes and improvements.Signed-off-by: Brian Masney <bmasney@redhat.com>* tag 'clk-misc-round-two-for-v7.3' of ssh://github.com/masneyb/linux: (45 commits) clk: tegra: set up proper EMC clock implementation for Tegra114 clk: clocking-wizard: remove 20kHz restriction clk: clocking-wizard: optimize clock search clk: clocking-wizard: fix clock difference detection clk: mediatek: mt8135: Fix inverted gate control for devapc_ck clk: clocking-wizard: Program PLL CP/RES and lock parameters on reconfig clk: tegra: support 48MHz clock for pll_p_out1 clk: aspeed: add AST2700 PECI clock dt-bindings: clock: ast2700: add PECI clock clk: mediatek: Add mt8173-mfgtop driver dt-bindings: clock: mediatek: Add mt8173 mfgtop clk: tegra: clean-up simple provider misuse of the consumer API clk: st: clean-up simple provider misuse of the consumer API clk: mvebu: clean-up simple provider misuse of the consumer API clk: remove conditional return with no effect clk: Add devm_clk_bulk_get_enable() clk: en7523: add support for dedicated PCIe PERSTOUT reset dt-bindings: clock: airoha: Add additional reset for PCIe PERSTOUT arm64: dts: cix: sky1: add audss cru reset: cix: add sky1 audss auxiliary reset driver ... List of files: /linux/drivers/clk/mediatek/Kconfig Fri, 14 Aug 2026 02:42:25 +0200 Stephen Boyd <sboyd@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#804b10deb0e8872716416b38af0e4e60a038f0fd Merge tag 'clk-misc-for-v7.3' of ssh://github.com/masneyb/linux into clk-pilePull clk patches picked up by Brian Masney:Here's various improvements and fixes for the clk subsystem that was posted priorto the opening of the last merge window.- Add spread spectrum clock (SSC) support to the clk framework, including a new assigned-clock-sscs devicetree property and clk_hw_set_spread_spectrum() API with KUnit tests (Peng Fan)- Add SCMI clock OEM extensions for the i.MX95 clock driver and introduce a common SCMI clock header (Peng Fan)- Add clock, reset, and devicetree bindings for the ESWIN EIC7700 HSP clock and reset generator (Xuyang Dong)- Add clk_determine_rate_noop() helper for clock drivers that can do any rate, and convert existing open-coded implementations across hisilicon, imx, qcom, renesas, rp1, samsung, scpi, sprd, mediatek phy, and mediatek pmdomain drivers (Brian Masney)- Add kernel-doc documentation for struct clk_core and the core clock flags, and wire up clk identifiers into the documentation build (Brian Masney)- Fix clk_divider_bestdiv() returning the minimum rate instead of the maximum rate for large rate requests, with KUnit tests (Lad Prabhakar)- Fix Nuvoton MA35D1 PLL frequency calculation including ignored div_u64 return values, incorrect PLL_CTL1_FRAC bit field width, and broken determine_rate logic (Joey Lu)- Support unique clock names for multi-socket Tegra platforms (Jon Hunter)- Allow COMPILE_TEST builds for HiSilicon clock drivers (Rosen Penev)- Various fixes and cleanups from Akari Tsuyukusa, Alexander A. Klimov, Brian Masney, David Carlier, David Laight, Min zhang, Myeonghun Pak, Pavel Löbl, Randy Dunlap, Rob Herring, Rosen Penev, Uwe Kleine-König, William Theesfeld, Xuyang Dong, and Yu-Chun LinSigned-off-by: Brian Masney <bmasney@redhat.com>[sboyd@kernel.org: Fix allmodconfig modpost failure in scmi]* tag 'clk-misc-for-v7.3' of ssh://github.com/masneyb/linux: (53 commits) pmdomain: mediatek: mtk-mfg: use clk_determine_rate_noop() pmdomain: mediatek: airoha: use clk_determine_rate_noop() phy: mediatek: phy-mtk-hdmi-mt2701: use clk_determine_rate_noop() clk: sprd: use clk_determine_rate_noop() clk: scpi: use clk_determine_rate_noop() clk: samsung: acpm: use clk_determine_rate_noop() clk: rp1: use clk_determine_rate_noop() clk: renesas: rzg2l-cpg: use clk_determine_rate_noop() clk: qcom: smd-rpm: use clk_determine_rate_noop() clk: qcom: rpmh: use clk_determine_rate_noop() clk: qcom: rpm: use clk_determine_rate_noop() clk: imx: scu: use clk_determine_rate_noop() clk: hisilicon: hi3660-stub: use clk_determine_rate_noop() clk: add clk_determine_rate_noop() clk: imx: scu: drop redundant init.ops variable assignment clk: test: convert constants to use HZ_PER_MHZ docs: clk: include some identifiers to keep documentation up to date clk: add kernel docs for struct clk_core clk: add kernel docs for the core flags clk: hisilicon: allow COMPILE_TEST builds ... List of files: /linux/drivers/clk/mediatek/Kconfig Fri, 14 Aug 2026 02:17:13 +0200 Stephen Boyd <sboyd@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#ebd0b73d2137c2277440da04124a0ce7011b2d1a clk: mediatek: Add mt8173-mfgtop driverThe MFG (GPU) block on the MT8173 has a small glue layer, named MFG_TOPin the datasheet, that contains clock gates, some power sequence signaldelays, and other unknown registers that get toggled when the GPU ispowered on.The clock gates are exposed as clocks provided by a clock controller,while the power sequencing bits are exposed as one singular power domain.Tested-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>Reviewed-by: Brian Masney <bmasney@redhat.com>Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>Signed-off-by: Brian Masney <bmasney@redhat.com> List of files: /linux/drivers/clk/mediatek/Kconfig Tue, 28 Jul 2026 11:18:00 +0200 Chen-Yu Tsai <wenst@chromium.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#f63aecdb45e9dd19c340fd62df698374d95b9024 clk: mediatek: mt8196: Select REGMAP_MMIO for vlpckgenThe MediaTek MT8196 vlpckgen clock driver uses__devm_regmap_init_mmio_clk() by devm_regmap_init_mmio(),which is defined in drivers/base/regmap/regmap-mmio.c.However, the driver's Kconfig entry does not select REGMAP_MMIO.This causes a linker error when REGMAP_MMIO is not enabled.Fix this by selecting REGMAP_MMIO in the Kconfig entry.Fixes: 2f8b3ae6f0cb ("clk: mediatek: Add MT8196 vlpckgen clock support")Cc: stable@vger.kernel.orgSigned-off-by: Akari Tsuyukusa <akkun11.open@gmail.com>Reviewed-by: Brian Masney <bmasney@redhat.com>Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>Signed-off-by: Brian Masney <bmasney@redhat.com> List of files: /linux/drivers/clk/mediatek/Kconfig Fri, 22 May 2026 15:30:23 +0200 Akari Tsuyukusa <akkun11.open@gmail.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#5c8cbca290acdd49a694b36c0af76ba0c00bbf12 Merge branch '20260507-ubwc-rework-v4-4-c19593d20c1d@oss.qualcomm.com' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into HEADMerge the branch with the soc/qcom changes, required for the next UBWCpatches.Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> List of files: /linux/drivers/clk/mediatek/Kconfig Thu, 21 May 2026 22:36:50 +0200 Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#8edf8b09fc44990977b3fbcb708035b1740d0b7e Merge drm/drm-next into drm-intel-gt-nextBackmerging to pull in commit 5401b9adebc9 ("i915: don't usea vma that didn't match the context VM") to revert it.Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> List of files: /linux/drivers/clk/mediatek/Kconfig Tue, 12 May 2026 10:16:35 +0200 Joonas Lahtinen <joonas.lahtinen@linux.intel.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#1655f6895a896eb632ca8a019259bc5d358a9712 Merge tag 'timers-v7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/daniel.lezcano/linux into timers/clocksource - Added the DT bindings for the compatible string 'fsl,imx25-epit' (Frank Li) - Made the rttm_cs variable static for the rtl otto timer driver (Krzysztof Kozlowski) - Fixed error return code handling in the sun5i timer driver (Chen Ni) - Made the timer-of and the mmio code compatible with modules (Daniel Lezcano)Link: https://lore.kernel.org/151feae1-39ba-4abd-a9f9-9bff377a2cd8@oss.qualcomm.com List of files: /linux/drivers/clk/mediatek/Kconfig Sun, 12 Apr 2026 22:33:39 +0200 Thomas Gleixner <tglx@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#f4b369c6fe0ceaba2da2daff8c9eb415f85926dd Merge branch 'next' into for-linusPrepare input updates for 7.1 merge window. List of files: /linux/drivers/clk/mediatek/Kconfig Mon, 20 Apr 2026 03:28:57 +0200 Dmitry Torokhov <dmitry.torokhov@gmail.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#0421ccdfad0d92713a812a5aeb7d07b0ea7213c8 Merge tag 'v7.0-rc3' into nextSync up with the mainline to brig up the latest changes, specificallychanges to ALPS driver. List of files: /linux/drivers/clk/mediatek/Kconfig Thu, 12 Mar 2026 18:44:42 +0100 Dmitry Torokhov <dmitry.torokhov@gmail.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#3e9e952bb3139ad1e08f3e1960239c2988ab90c9 Merge branch 'for-7.1-printf-kunit-build' into for-linus List of files: /linux/drivers/clk/mediatek/Kconfig Mon, 20 Apr 2026 13:41:28 +0200 Petr Mladek <pmladek@suse.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#d4eb7b2da66c848709e31585b9c371fa234abc39 Merge branch 'for-7.1/core-v2' into for-linus- fixed handling of 0-sized reports (Dmitry Torokhov)- convert core code to __free() (Dmitry Torokhov)- support for multiple batteries per HID device (Lucas Zampieri) List of files: /linux/drivers/clk/mediatek/Kconfig Thu, 16 Apr 2026 21:01:18 +0200 Jiri Kosina <jkosina@suse.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#42d3b66d4cdbacfc9d120d2301b8de89cc29a914 Merge drm/drm-next into drm-xe-nextBackmerging to bring in 7.00-rc3. Important ahead GPU SVM merging THPsupport.Signed-off-by: Matthew Brost <matthew.brost@intel.com> List of files: /linux/drivers/clk/mediatek/Kconfig Thu, 12 Mar 2026 15:17:56 +0100 Matthew Brost <matthew.brost@intel.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#f09812b85fa6f41058bcc46e70ac406bf9b0493a Merge drm/drm-next into drm-intel-nextSync with v7.0-rc1 which contains a few treewide changes affecting i915.Signed-off-by: Jani Nikula <jani.nikula@intel.com> List of files: /linux/drivers/clk/mediatek/Kconfig Wed, 25 Feb 2026 12:23:04 +0100 Jani Nikula <jani.nikula@intel.com> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#8b85987d3cf50178f67618122d9f3bb202f62f42 Merge drm/drm-next into drm-misc-nextLet's merge 7.0-rc1 to start the new drm-misc-next windowSigned-off-by: Maxime Ripard <mripard@kernel.org> List of files: /linux/drivers/clk/mediatek/Kconfig Mon, 23 Feb 2026 11:48:20 +0100 Maxime Ripard <mripard@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#b0a67f310bfa5e13d66c9f6b4bd88ea504a576a9 Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf before 7.0-rc1Cross-merge BPF and other fixes after downstream PR.No conflicts.Signed-off-by: Alexei Starovoitov <ast@kernel.org> List of files: /linux/drivers/clk/mediatek/Kconfig Thu, 19 Feb 2026 20:08:53 +0100 Alexei Starovoitov <ast@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#c17ee635fd3a482b2ad2bf5e269755c2eae5f25e Merge drm/drm-fixes into drm-misc-fixes7.0-rc1 was just released, let's merge it to kick the new release cycle.Signed-off-by: Maxime Ripard <mripard@kernel.org> List of files: /linux/drivers/clk/mediatek/Kconfig Mon, 23 Feb 2026 10:09:45 +0100 Maxime Ripard <mripard@kernel.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#13c916af3abf98f4a2a00b9463d2fc00cc6bc00e Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxPull clk updates from Stephen Boyd: "Not much changed in the clk framework this time except the clk.h consumer API moved the context saving APIs around to fix a build error in certain configurations. There was a change to the core framework for CLK_OPS_PARENT_ENABLE behavior during registration, but it wrecked existing drivers that didn't expect things to be turned off during clk registration so it got reverted. This cycle is really a large collection of new clk drivers, primarily for Qualcomm SoCs but also for Amlogic, SpacemiT, Google, and Aspeed. Another big change in here is support for automatic hardware clock gating on Samsung SoCs where the clks turn on and off when needed. Ideally more vendors move to this method for better power savings. The highlights are in the updates section below. Beyond all the new drivers we have a bunch of cleanups like converting drivers from divider_round_rate() to divider_determine_rate() and using scoped for each OF child loops. Otherwise it's the usual data fixes and plugging reference leaks, etc. that's all pretty ordinary but not critical enough to fix until the next release. New Drivers: - Qualcomm Kaanapali global, tcsr, rpmh, display, gpu, camera, and video clk controllers - Qualcomm SM8750 camera clk controllers - Qualcomm MSM8940 and SDM439 global clk controllers - Google GS101 Display Process Unit (DPU) clk controllers - SpacemiT K3 clk controllers - Amlogic t7 clk controllers - Aspeed AST2700 clk controllers Updates: - Convert clock dividers from round_rate() to determine_rate() - Fix sparse warnings, kernel-doc warnings, and plug leaked OF refs - Automatic hardware clk gating on Google GS101 SoCs - Amlogic s4 video clks - CAN-FD clks and resets on Renesas RZ/T2H, RZ/N2H, RZ/V2H, and RZ/V2N - Expanded Serial Peripheral Interface (xSPI) clocks and resets on Renesas RZ/T21H and RZ/N2H - DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks and resets on Renesas RZ/V2N - More serial (RSCI) clocks and resets on Renesas RZ/V2H and RZ/V2N - CPU frequency scaling on T-HEAD TH1520"* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (165 commits) clk: aspeed: Add reset for HACE/VIDEO dt-bindings: clock: aspeed: Add VIDEO reset definition clk: aspeed: add AST2700 clock driver MAINTAINERS: Add entry for ASPEED clock drivers. clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory. Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc" clk: Disable KUNIT_UML_PCI dt-bindings: clk: rs9: Fix DIF pattern match clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS() clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841 clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: mediatek: Fix error handling in runtime PM setup clk: mediatek: don't select clk-mt8192 for all ARM64 builds clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks clk: mediatek: Refactor pllfh registration to pass device clk: mediatek: Pass device to clk_hw_register for PLLs clk: mediatek: Refactor pll registration to pass device clk: Respect CLK_OPS_PARENT_ENABLE during recalc ... List of files: /linux/drivers/clk/mediatek/Kconfig Sun, 15 Feb 2026 17:18:57 +0100 Linus Torvalds <torvalds@linux-foundation.org> http://kernelsources.org:8080/source/history/linux/drivers/clk/mediatek/Kconfig#b675697d807507244bfd00adc30534df6e888cfd Merge branches 'clk-amlogic', 'clk-thead', 'clk-mediatek' and 'clk-samsung' into clk-next* clk-amlogic: clk: meson: gxbb: use the existing HHI_HDMI_PLL_CNTL3 macro clk: meson: g12a: Limit the HDMI PLL OD to /4 clk: meson: gxbb: Limit the HDMI PLL OD to /4 on GXL/GXM SoCs clk: amlogic: remove potentially unsafe flags from S4 video clocks clk: amlogic: add video-related clocks for S4 SoC dt-bindings: clock: add video clock indices for Amlogic S4 SoC clk: meson: t7: add t7 clock peripherals controller driver clk: meson: t7: add support for the T7 SoC PLL clock dt-bindings: clock: add Amlogic T7 peripherals clock controller dt-bindings: clock: add Amlogic T7 SCMI clock controller dt-bindings: clock: add Amlogic T7 PLL clock controller* clk-thead: clk: thead: th1520-ap: Support CPU frequency scaling clk: thead: th1520-ap: Add macro to define multiplexers with flags clk: thead: th1520-ap: Support setting PLL rates clk: thead: th1520-ap: Add C910 bus clock clk: thead: th1520-ap: Poll for PLL lock and wait for stability dt-bindings: clock: thead,th1520-clk-ap: Add ID for C910 bus clock* clk-mediatek: Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc" clk: mediatek: Fix error handling in runtime PM setup clk: mediatek: don't select clk-mt8192 for all ARM64 builds clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks clk: mediatek: Refactor pllfh registration to pass device clk: mediatek: Pass device to clk_hw_register for PLLs clk: mediatek: Refactor pll registration to pass device clk: Respect CLK_OPS_PARENT_ENABLE during recalc dt-bindings: clock: mediatek,mt7622-pciesys: Remove syscon compatible clk: mediatek: Drop __initconst from gates* clk-samsung: clk: samsung: gs101: add support for Display Process Unit (DPU) clocks dt-bindings: samsung: exynos-sysreg: add gs101 dpu compatible dt-bindings: clock: google,gs101-clock: Add DPU clock management unit dt-bindings: clock: google,gs101-clock: fix alphanumeric ordering clk: samsung: fix sysreg save/restore when PM is enabled for CMU clk: samsung: avoid warning message on legacy Exynos (auto clock gating) clk: samsung: gs101: Enable auto_clock_gate mode for each gs101 CMU clk: samsung: Implement automatic clock gating mode for CMUs dt-bindings: clock: google,gs101-clock: add samsung,sysreg property as required clk: samsung: exynosautov920: add clock support dt-bindings: clock: exynosautov920: add MFD clock definitions List of files: /linux/drivers/clk/mediatek/Kconfig Sat, 14 Feb 2026 19:23:37 +0100 Stephen Boyd <sboyd@kernel.org>