Merge drm/drm-fixes into drm-misc-fixes

Updating drm-misc-fixes to the state of v6.17-rc1. Begins a new release
cycle.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This is the usual collection of primarily clk driver updates.

The big pa

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"This is the usual collection of primarily clk driver updates.

The big part of the diff is all the new Qualcomm clk drivers added for
a few SoCs they're working on. The other two vendors with significant
work this cycle are Renesas and Amlogic. Renesas adds a bunch of clks
to existing drivers and supports some new SoCs while Amlogic is
starting a significant refactoring to simplify their code.

The core framework gained a pair of helpers to get the 'struct device'
or 'struct device_node' associated with a 'struct clk_hw'. Some
associated KUnit tests were added for these simple helpers as well.

Beyond that core change there are lots of little fixes throughout the
clk drivers for the stuff we see every day, wrong clk driver data that
affects tree topology or supported frequencies, etc. They're not found
until the clks are actually used by some consumer device driver.

New Drivers:
- Global, display, gpu, video, camera, tcsr, and rpmh clock
controller for the Qualcomm Milos SoC
- Camera, display, GPU, and video clock controllers for Qualcomm
QCS615
- Video clock controller driver for Qualcomm SM6350
- Camera clock controller driver for Qualcomm SC8180X
- I3C clocks and resets on Renesas RZ/G3E
- Expanded Serial Peripheral Interface (xSPI) clocks and resets on
Renesas RZ/V2H(P) and RZ/V2N
- SPI (RSPI) clocks and resets on Renesas RZ/V2H(P)
- SDHI and I2C clocks on Renesas RZ/T2H and RZ/N2H
- Ethernet clocks and resets on Renesas RZ/G3E
- Initial support for the Renesas RZ/T2H (R9A09G077) and RZ/N2H
(R9A09G087) SoCs
- Ethernet clocks and resets on Renesas RZ/V2H and RZ/V2N
- Timer, I2C, watchdog, GPU, and USB2.0 clocks and resets on Renesas
RZ/V2N

Updates:
- Support atomic PWMs in the PWM clk driver
- clk_hw_get_dev() and clk_hw_get_of_node() helpers
- Replace round_rate() with determine_rate() in various clk drivers
- Convert clk DT bindings to DT schema format for DT validation
- Various clk driver cleanups and refactorings from static analysis
tools and possibly real humans
- A lot of little fixes here and there to things like clk tree
topology, missing frequencies, flagging clks as critical, etc"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (216 commits)
clk: clocking-wizard: Fix the round rate handling for versal
clk: Fix typos
clk: spacemit: ccu_pll: fix error return value in recalc_rate callback
clk: tegra: periph: Make tegra_clk_periph_ops static
clk: tegra: periph: Fix error handling and resolve unsigned compare warning
clk: imx: scu: convert from round_rate() to determine_rate()
clk: imx: pllv4: convert from round_rate() to determine_rate()
clk: imx: pllv3: convert from round_rate() to determine_rate()
clk: imx: pllv2: convert from round_rate() to determine_rate()
clk: imx: pll14xx: convert from round_rate() to determine_rate()
clk: imx: pfd: convert from round_rate() to determine_rate()
clk: imx: frac-pll: convert from round_rate() to determine_rate()
clk: imx: fracn-gppll: convert from round_rate() to determine_rate()
clk: imx: fixup-div: convert from round_rate() to determine_rate()
clk: imx: cpu: convert from round_rate() to determine_rate()
clk: imx: busy: convert from round_rate() to determine_rate()
clk: imx: composite-93: remove round_rate() in favor of determine_rate()
clk: imx: composite-8m: remove round_rate() in favor of determine_rate()
clk: qcom: Remove redundant pm_runtime_mark_last_busy() calls
clk: imx: Remove redundant pm_runtime_mark_last_busy() calls
...

show more ...

Merge branches 'clk-bindings', 'clk-cleanup', 'clk-pwm', 'clk-hw-device', 'clk-xilinx' and 'clk-adi' into clk-next

- Support atomic PWMs in the PWM clk driver
- clk_hw_get_dev() and clk_hw_get_of_

Merge branches 'clk-bindings', 'clk-cleanup', 'clk-pwm', 'clk-hw-device', 'clk-xilinx' and 'clk-adi' into clk-next

- Support atomic PWMs in the PWM clk driver
- clk_hw_get_dev() and clk_hw_get_of_node() helpers

* clk-bindings: (30 commits)
dt-bindings: clock: convert lpc1850-cgu.txt to yaml format
dt-bindings: clock: Convert qca,ath79-pll to DT schema
dt-bindings: clock: Convert nuvoton,npcm750-clk to DT schema
dt-bindings: clock: Convert moxa,moxart-clock to DT schema
dt-bindings: clock: Convert microchip,pic32mzda-clk to DT schema
dt-bindings: clock: Convert maxim,max9485 to DT schema
dt-bindings: clock: Convert qcom,krait-cc to DT schema
dt-bindings: clock: qcom: Remove double colon from description
dt-bindings: clock: convert lpc1850-ccu.txt to yaml format
dt-bindings: clock: Convert alphascale,asm9260-clock-controller to DT schema
dt-bindings: clock: Convert marvell,armada-370-corediv-clock to DT schema
dt-bindings: clock: Convert marvell,armada-3700-periph-clock to DT schema
dt-bindings: clock: Convert marvell,mvebu-core-clock to DT schema
dt-bindings: clock: Convert marvell,berlin2-clk to DT schema
dt-bindings: clock: Convert marvell,dove-divider-clock to DT schema
dt-bindings: clock: Convert marvell,armada-3700-tbg-clock to DT schema
dt-bindings: clock: Convert marvell-armada-370-gating-clock to DT schema
dt-bindings: clock: Convert marvell,armada-xp-cpu-clock to DT schema
dt-bindings: clock: Convert TI-NSPIRE clocks to DT schema
dt-bindings: clock: Convert lsi,axm5516-clks to DT schema
...

* clk-cleanup: (29 commits)
clk: clocking-wizard: Fix the round rate handling for versal
clk: Fix typos
clk: tegra: periph: Make tegra_clk_periph_ops static
clk: tegra: periph: Fix error handling and resolve unsigned compare warning
clk: imx: scu: convert from round_rate() to determine_rate()
clk: imx: pllv4: convert from round_rate() to determine_rate()
clk: imx: pllv3: convert from round_rate() to determine_rate()
clk: imx: pllv2: convert from round_rate() to determine_rate()
clk: imx: pll14xx: convert from round_rate() to determine_rate()
clk: imx: pfd: convert from round_rate() to determine_rate()
clk: imx: frac-pll: convert from round_rate() to determine_rate()
clk: imx: fracn-gppll: convert from round_rate() to determine_rate()
clk: imx: fixup-div: convert from round_rate() to determine_rate()
clk: imx: cpu: convert from round_rate() to determine_rate()
clk: imx: busy: convert from round_rate() to determine_rate()
clk: imx: composite-93: remove round_rate() in favor of determine_rate()
clk: imx: composite-8m: remove round_rate() in favor of determine_rate()
clk: bcm: bcm2835: convert from round_rate() to determine_rate()
MAINTAINERS: Include clk.py under COMMON CLK FRAMEWORK entry
clk: ti: Simplify ti_find_clock_provider()
...

* clk-pwm:
clk: pwm: Make use of non-sleeping PWMs
clk: pwm: Don't reconfigure running PWM at probe time
clk: pwm: Convert to use pwm_apply_might_sleep()
clk: pwm: Let .get_duty_cycle() return the real duty cycle

* clk-hw-device:
clk: tests: add clk_hw_get_dev() and clk_hw_get_of_node() tests
clk: tests: Make clk_register_clk_parent_data_device_driver() common
clk: add a clk_hw helpers to get the clock device or device_node

* clk-xilinx:
clk: xilinx: vcu: Update vcu init/reset sequence
clk: xilinx: vcu: unregister pll_post only if registered correctly

* clk-adi:
clk: clk-axi-clkgen: fix coding style issues
clk: clk-axi-clkgen move to min/max()
clk: clk-axi-clkgen: detect axi_clkgen_limits at runtime
include: adi-axi-common: add new helper macros
include: linux: move adi-axi-common.h out of fpga
clk: clk-axi-clkgen: make sure to include mod_devicetable.h
clk: clk-axi-clkgen: fix fpfd_max frequency for zynq

show more ...

Merge tag 'clk-meson-v6.17-1' of https://github.com/BayLibre/clk-meson into clk-amlogic

Pull Amlogic clk driver updates from Jerome Brunet:

- Use the auxiliary reset controller implementation in t

Merge tag 'clk-meson-v6.17-1' of https://github.com/BayLibre/clk-meson into clk-amlogic

Pull Amlogic clk driver updates from Jerome Brunet:

- Use the auxiliary reset controller implementation in the
Amlogic axg-audio, instead of implementing the reset
controller in drivers/clk
- Drop unnecessary clock controller headers for Amlogic drivers
- Drop clock controller big regmap tables in the Amlogic drivers

* tag 'clk-meson-v6.17-1' of https://github.com/BayLibre/clk-meson:
clk: amlogic: s4: remove unused data
clk: amlogic: drop clk_regmap tables
clk: amlogic: get regmap with clk_regmap_init
clk: amlogic: remove unnecessary headers
clk: amlogic: axg-audio: use the auxiliary reset driver
clk: tests: add clk_hw_get_dev() and clk_hw_get_of_node() tests
clk: tests: Make clk_register_clk_parent_data_device_driver() common
clk: add a clk_hw helpers to get the clock device or device_node

show more ...

clk: tests: add clk_hw_get_dev() and clk_hw_get_of_node() tests

Add kunit test suites clk_hw_get_dev() and clk_hw_get_of_node()
for clocks registered with clk_hw_register() and of_clk_hw_register()

clk: tests: add clk_hw_get_dev() and clk_hw_get_of_node() tests

Add kunit test suites clk_hw_get_dev() and clk_hw_get_of_node()
for clocks registered with clk_hw_register() and of_clk_hw_register()

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20250417-clk-hw-get-helpers-v1-2-7743e509612a@baylibre.com
Reviewed-by: Brian Masney <bmasney@redhat.com>
[sboyd@kernel.org: Drop genparams, rename tests, drop inits,
combine suites, add test for non-DT platform device]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

show more ...