Merge tag 'asoc-fix-v6.13-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v6.13

A few small fixes for v6.13, all system specific - the biggest t

Merge tag 'asoc-fix-v6.13-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Fixes for v6.13

A few small fixes for v6.13, all system specific - the biggest thing is
the fix for jack handling over suspend on some Intel laptops.

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Merge branch 'ovl.fixes'

Bring in an overlayfs fix for v6.13-rc1 that fixes a bug introduced by
the overlayfs changes merged for v6.13.

Signed-off-by: Christian Brauner <brauner@kernel.org>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"The core framework gained a clk provider helper, a clk consumer
helper, a

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"The core framework gained a clk provider helper, a clk consumer
helper, and some unit tests for the assigned clk rates feature in
DeviceTree. On the vendor driver side, we gained a whole pile of SoC
driver support detailed below. The majority in the diffstat is
Qualcomm, but there's also quite a few Samsung and Mediatek clk driver
additions in here as well. The top vendors is quite common, but the
sheer amount of new drivers is uncommon, so I'm anticipating a larger
number of fixes for clk drivers this cycle.

Core:
- devm_clk_bulk_get_all_enabled() to return number of clks acquired
- devm_clk_hw_register_gate_parent_hw() helper to modernize drivers
- KUnit tests for clk-assigned-rates{,-u64}

New Drivers:
- Marvell PXA1908 SoC clks
- Mobileye EyeQ5, EyeQ6L and EyeQ6H clk driver
- TWL6030 clk driver
- Nuvoton Arbel BMC NPCM8XX SoC clks
- MediaTek MT6735 SoC clks
- MediaTek MT7620, MT7628 and MT7688 MMC clks
- Add a driver for gated fixed rate clocks
- Global clock controllers for Qualcomm QCS8300 and IPQ5424 SoCs
- Camera, display and video clock controllers for Qualcomm SA8775P
SoCs
- Global, display, GPU, TCSR, and RPMh clock controllers for Qualcomm
SAR2130P
- Global, camera, display, GPU, and video clock controllers for
Qualcomm SM8475 SoCs
- RTC power domain and Battery Backup Function (VBATTB) clock support
for the Renesas RZ/G3S SoC
- Qualcomm IPQ9574 alpha PLLs
- Support for i.MX91 CCM in the i.MX93 driver
- Microchip LAN969X SoC clks
- Cortex-A55 core clocks and Interrupt Control Unit (ICU) clock and
reset on Renesas RZ/V2H(P)
- Samsung ExynosAutov920 clk drivers for PERIC1, MISC, HSI0 and HSI1
- Samsung Exynos8895 clk drivers for FSYS0/1, PERIC0/1, PERIS and TOP

Updates:
- Convert more clk bindings to YAML
- Various clk driver cleanups: NULL checks, add const, etc.
- Remove END/NUM #defines that count number of clks in various
binding headers
- Continue moving reset drivers to drivers/reset via auxiliary bus"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (162 commits)
clk: clk-loongson2: Fix potential buffer overflow in flexible-array member access
clk: Fix invalid execution of clk_set_rate
clk: clk-loongson2: Fix memory corruption bug in struct loongson2_clk_provider
clk: lan966x: make it selectable for ARCH_LAN969X
clk: eyeq: add EyeQ6H west fixed factor clocks
clk: eyeq: add EyeQ6H central fixed factor clocks
clk: eyeq: add EyeQ5 fixed factor clocks
clk: eyeq: add fixed factor clocks infrastructure
clk: eyeq: require clock index with phandle in all cases
clk: fixed-factor: add clk_hw_register_fixed_factor_index() function
dt-bindings: clock: eyeq: add more Mobileye EyeQ5/EyeQ6H clocks
dt-bindings: soc: mobileye: set `#clock-cells = <1>` for all compatibles
clk: clk-axi-clkgen: make sure to enable the AXI bus clock
dt-bindings: clock: axi-clkgen: include AXI clk
clk: mmp: Add Marvell PXA1908 MPMU driver
clk: mmp: Add Marvell PXA1908 APMU driver
clk: mmp: Add Marvell PXA1908 APBCP driver
clk: mmp: Add Marvell PXA1908 APBC driver
dt-bindings: clock: Add Marvell PXA1908 clock bindings
clk: mmp: Switch to use struct u32_fract instead of custom one
...

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Merge branches 'clk-cleanup', 'clk-mediatek', 'clk-kunit', 'clk-xilinx' and 'clk-fixed-gate' into clk-next

- Various clk driver cleanups
- MediaTek MT6735 SoC clks
- MediaTek MT7620, MT7628 and M

Merge branches 'clk-cleanup', 'clk-mediatek', 'clk-kunit', 'clk-xilinx' and 'clk-fixed-gate' into clk-next

- Various clk driver cleanups
- MediaTek MT6735 SoC clks
- MediaTek MT7620, MT7628 and MT7688 MMC clks
- KUnit tests for clk-assigned-rates{,-u64}
- Add a driver for gated fixed rate clocks

* clk-cleanup:
clk: clk-loongson2: Fix potential buffer overflow in flexible-array member access
clk: Fix invalid execution of clk_set_rate
clk: clk-loongson2: Fix memory corruption bug in struct loongson2_clk_provider
clk: lan966x: make it selectable for ARCH_LAN969X
clk: clk-apple-nco: Add NULL check in applnco_probe
clk: starfive: jh7110-pll: Mark the probe function as __init
clk: sophgo: avoid integer overflow in sg2042_pll_recalc_rate()
clk: tegra: use clamp() in tegra_bpmp_clk_determine_rate()
clk: cdce925: make regmap_cdce925_bus constant
clk: Drop explicit initialization of struct i2c_device_id::driver_data to 0
clk: clk-qoriq: Replace of_node_put() with __free()
clk: Remove unused clk_hw_rate_is_protected

* clk-mediatek:
clk: en7523: map io region in a single block
clk: en7523: move en7581_reset_register() in en7581_clk_hw_init()
clk: en7523: fix estimation of fixed rate for EN7581
clk: en7523: introduce chip_scu regmap
clk: en7523: move clock_register in hw_init callback
clk: en7523: remove REG_PCIE*_{MEM,MEM_MASK} configuration
dt-bindings: clock: airoha: Update reg mapping for EN7581 SoC.
clk: mediatek: Add drivers for MT6735 syscon clock and reset controllers
dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers
clk: mediatek: mt6735-apmixedsys: Fix an error handling path in clk_mt6735_apmixed_probe()
clk: ralink: mtmips: add mmc related clocks for SoCs MT7620, MT7628 and MT7688
clk: ralink: mtmips: fix clocks probe order in oldest ralink SoCs
clk: ralink: mtmips: fix clock plan for Ralink SoC RT3883
clk: mediatek: clk-mt8188-topckgen: Remove univpll from parents of mfg_core_tmp
clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers
dt-bindings: clock: Add MediaTek MT6735 clock and reset bindings
clk: mediatek: drop two dead config options

* clk-kunit:
clk: Allow kunit tests to run without OF_OVERLAY enabled
clk: test: Add KUnit tests for clock-assigned-rates{-u64} DT properties
of: kunit: Extract some overlay boiler plate into macros
clk: test: Add test managed of_clk_add_hw_provider()

* clk-xilinx:
clk: clocking-wizard: move dynamic reconfig setup behind flag
dt-bindings: clock: xilinx: describe whether dynamic reconfig is enabled
clk: clocking-wizard: move clock registration to separate function
clk: clocking-wizard: use devres versions of clk_hw API
clk: clocking-wizard: use newer clk_hw API
clk: clocking-wizard: simplify probe/remove with devres helpers

* clk-fixed-gate:
clk: clk-gpio: add driver for gated-fixed-clocks
clk: clk-gpio: use dev_err_probe for gpio-get failure
clk: clk-gpio: update documentation for gpio-gate clock
dt-bindings: clocks: add binding for gated-fixed-clocks

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clk: test: Add KUnit tests for clock-assigned-rates{-u64} DT properties

Add unit tests for the two types of assigned rate properties. Test
different combinations of assigned clocks and make sure tha

clk: test: Add KUnit tests for clock-assigned-rates{-u64} DT properties

Add unit tests for the two types of assigned rate properties. Test
different combinations of assigned clocks and make sure that rates
aren't assigned when the DT properties are malformed or are zero.

Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20240822002433.1163814-4-sboyd@kernel.org

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