History log of /linux/arch/xtensa/boot/boot-elf/bootstrap.S (Results 1 – 25 of 110)
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Revision tags: v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1, v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3, v6.5-rc2, v6.5-rc1, v6.4, v6.4-rc7, v6.4-rc6, v6.4-rc5, v6.4-rc4, v6.4-rc3, v6.4-rc2, v6.4-rc1, v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5, v6.2-rc4, v6.2-rc3, v6.2-rc2, v6.2-rc1, v6.1, v6.1-rc8, v6.1-rc7, v6.1-rc6, v6.1-rc5, v6.1-rc4, v6.1-rc3, v6.1-rc2, v6.1-rc1, v6.0, v6.0-rc7, v6.0-rc6, v6.0-rc5, v6.0-rc4, v6.0-rc3, v6.0-rc2, v6.0-rc1, v5.19, v5.19-rc8, v5.19-rc7, v5.19-rc6, v5.19-rc5, v5.19-rc4, v5.19-rc3, v5.19-rc2, v5.19-rc1
# 03ab8e62 31-May-2022 Konstantin Komarov <almaz.alexandrovich@paragon-software.com>

Merge tag 'v5.18'

Linux 5.18


Revision tags: v5.18, v5.18-rc7, v5.18-rc6, v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7
# 1136fa0c 01-Mar-2022 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge tag 'v5.17-rc4' into for-linus

Merge with mainline to get the Intel ASoC generic helpers header and
other changes.


Revision tags: v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1
# 87a0b2fa 18-Jan-2022 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge tag 'v5.16' into next

Sync up with mainline to bring in the latest API changes.


# 8a2094d6 10-Jan-2022 Jiri Kosina <jkosina@suse.cz>

Merge branch 'for-5.17/core' into for-linus

- support for USI style pens (Tero Kristo, Mika Westerberg)
- quirk for devices that need inverted X/Y axes (Alistair Francis)
- small core code cleanups

Merge branch 'for-5.17/core' into for-linus

- support for USI style pens (Tero Kristo, Mika Westerberg)
- quirk for devices that need inverted X/Y axes (Alistair Francis)
- small core code cleanups and deduplication (Benjamin Tissoires)

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Revision tags: v5.16
# f81483aa 05-Jan-2022 Takashi Iwai <tiwai@suse.de>

Merge branch 'for-next' into for-linus

Pull 5.17 materials.

Signed-off-by: Takashi Iwai <tiwai@suse.de>


Revision tags: v5.16-rc8, v5.16-rc7, v5.16-rc6
# 17580470 17-Dec-2021 Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-misc-next-fixes

Backmerging to bring drm-misc-next-fixes up to the latest state for
the current release cycle.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>


Revision tags: v5.16-rc5
# 86329873 09-Dec-2021 Daniel Lezcano <daniel.lezcano@linaro.org>

Merge branch 'reset/of-get-optional-exclusive' of git://git.pengutronix.de/pza/linux into timers/drivers/next

"Add optional variant of of_reset_control_get_exclusive(). If the
requested reset is not

Merge branch 'reset/of-get-optional-exclusive' of git://git.pengutronix.de/pza/linux into timers/drivers/next

"Add optional variant of of_reset_control_get_exclusive(). If the
requested reset is not specified in the device tree, this function
returns NULL instead of an error."

This dependency is needed for the Generic Timer Module (a.k.a OSTM)
support for RZ/G2L.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

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Revision tags: v5.16-rc4, v5.16-rc3
# 448cc2fb 22-Nov-2021 Jani Nikula <jani.nikula@intel.com>

Merge drm/drm-next into drm-intel-next

Sync up with drm-next to get v5.16-rc2.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>


# 8626afb1 22-Nov-2021 Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Merge drm/drm-next into drm-intel-gt-next

Thomas needs the dma_resv_for_each_fence API for i915/ttm async migration
work.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>


Revision tags: v5.16-rc2
# a713ca23 18-Nov-2021 Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-misc-next

Backmerging from drm/drm-next for v5.16-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>


# 467dd91e 16-Nov-2021 Maxime Ripard <maxime@cerno.tech>

Merge drm/drm-fixes into drm-misc-fixes

We need -rc1 to address a breakage in drm/scheduler affecting panfrost.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>


Revision tags: v5.16-rc1
# 00f178e1 06-Nov-2021 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'xtensa-20211105' of git://github.com/jcmvbkbc/linux-xtensa

Pull xtensa updates from Max Filippov:

- add support for xtensa cores without windowed registers option

* tag 'xtensa-2021110

Merge tag 'xtensa-20211105' of git://github.com/jcmvbkbc/linux-xtensa

Pull xtensa updates from Max Filippov:

- add support for xtensa cores without windowed registers option

* tag 'xtensa-20211105' of git://github.com/jcmvbkbc/linux-xtensa:
xtensa: move section symbols to asm/sections.h
xtensa: remove unused variable wmask
xtensa: only build windowed register support code when needed
xtensa: use register window specific opcodes only when present
xtensa: implement call0 ABI support in assembly
xtensa: definitions for call0 ABI
xtensa: don't use a12 in __xtensa_copy_user in call0 ABI
xtensa: don't use a12 in strncpy_user
xtensa: use a14 instead of a15 in inline assembly
xtensa: move _SimulateUserKernelVectorException out of WindowVectors

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Revision tags: v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4
# 09af39f6 26-Jul-2021 Max Filippov <jcmvbkbc@gmail.com>

xtensa: use register window specific opcodes only when present

xtensa core may be configured without register windows support, don't
use register window specific opcodes in that case. Use window reg

xtensa: use register window specific opcodes only when present

xtensa core may be configured without register windows support, don't
use register window specific opcodes in that case. Use window register
specific opcodes to initialize hardware or reset core to a known state
regardless of the chosen ABI.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

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Revision tags: v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6, v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1
# 59747372 11-Jul-2019 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge branch 'next' into for-linus

Prepare input updates for 5.3 merge window.


Revision tags: v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1
# 2a267e7c 10-May-2019 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge tag 'v5.1' into next

Sync up with mainline to bring in the latest APIs.


Revision tags: v5.1, v5.1-rc7, v5.1-rc6
# 95d002e0 16-Apr-2019 Zhenyu Wang <zhenyuw@linux.intel.com>

Merge tag 'drm-intel-next-2019-04-04' into gvt-next

Merge back drm-intel-next for engine name definition refinement
and 54939ea0bd85 ("drm/i915: Switch to use HWS indices rather than addresses")
tha

Merge tag 'drm-intel-next-2019-04-04' into gvt-next

Merge back drm-intel-next for engine name definition refinement
and 54939ea0bd85 ("drm/i915: Switch to use HWS indices rather than addresses")
that would need gvt fixes to depend on.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

show more ...


Revision tags: v5.1-rc5, v5.1-rc4, v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6
# 82ffd045 07-Feb-2019 Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>

Merge tag 'v5.0-rc5' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into fbdev-for-next

Linux 5.0-rc5

Sync with upstream (which now contains fbdev-v5.0-rc3 changes) to
prepare a

Merge tag 'v5.0-rc5' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into fbdev-for-next

Linux 5.0-rc5

Sync with upstream (which now contains fbdev-v5.0-rc3 changes) to
prepare a base for fbdev-v5.1 changes.

show more ...


Revision tags: v5.0-rc5, v5.0-rc4, v5.0-rc3
# 3eb66e91 15-Jan-2019 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge tag 'v4.20' into for-linus

Sync with mainline to get linux/overflow.h among other things.


# 4116941b 14-Jan-2019 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge tag 'v4.20' into next

Merge with mainline to bring in the new APIs.


Revision tags: v5.0-rc2
# 23d19ba0 11-Jan-2019 Maxime Ripard <maxime.ripard@bootlin.com>

Merge drm/drm-next into drm-misc-next

drm-next has been forwarded to 5.0-rc1, and we need it to apply the damage
helper for dirtyfb series from Noralf Trønnes.

Signed-off-by: Maxime Ripard <maxime.

Merge drm/drm-next into drm-misc-next

drm-next has been forwarded to 5.0-rc1, and we need it to apply the damage
helper for dirtyfb series from Noralf Trønnes.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

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# 49e41801 10-Jan-2019 James Morris <james.morris@microsoft.com>

Merge tag 'v5.0-rc1' into next-general

Linux 5.0-rc1

Sync to pick up LSM stacking work (which is based on -rc1).


# 3eb0930a 08-Jan-2019 Jani Nikula <jani.nikula@intel.com>

Merge drm/drm-next into drm-intel-next-queued

Generally catch up with 5.0-rc1, and specifically get the changes:

96d4f267e40f ("Remove 'type' argument from access_ok() function")
0b2c8f8b6b0c ("i91

Merge drm/drm-next into drm-intel-next-queued

Generally catch up with 5.0-rc1, and specifically get the changes:

96d4f267e40f ("Remove 'type' argument from access_ok() function")
0b2c8f8b6b0c ("i915: fix missing user_access_end() in page fault exception case")
594cc251fdd0 ("make 'user_access_begin()' do 'access_ok()'")

Signed-off-by: Jani Nikula <jani.nikula@intel.com>

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Revision tags: v5.0-rc1
# d538d94f 04-Jan-2019 Michael Ellerman <mpe@ellerman.id.au>

Merge branch 'master' into fixes

We have a fix to apply on top of commit 96d4f267e40f ("Remove 'type'
argument from access_ok() function"), so merge master to get it.


# 9ef10340 29-Dec-2018 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'xtensa-20181228' of git://github.com/jcmvbkbc/linux-xtensa

Pull Xtensa updates from Max Filippov:

- switch to generated syscall table

- switch ptrace to regsets, use regsets for core

Merge tag 'xtensa-20181228' of git://github.com/jcmvbkbc/linux-xtensa

Pull Xtensa updates from Max Filippov:

- switch to generated syscall table

- switch ptrace to regsets, use regsets for core dumps

- complete tracehook implementation

- add syscall tracepoints support

- add jumplabels support

- add memtest support

- drop unused/duplicated code from entry.S, ptrace.c, coprocessor.S,
elf.h and syscall.h

- clean up warnings caused by WSR/RSR macros

- clean up DTC warnings about SPI controller node names in xtfpga.dtsi

- simplify coprocessor.S

- get rid of explicit 'l32r' instruction usage in assembly

* tag 'xtensa-20181228' of git://github.com/jcmvbkbc/linux-xtensa: (25 commits)
xtensa: implement jump_label support
xtensa: implement syscall tracepoints
xtensa: implement tracehook functions and enable HAVE_ARCH_TRACEHOOK
xtensa: enable CORE_DUMP_USE_REGSET
xtensa: implement TIE regset
xtensa: implement task_user_regset_view
xtensa: call do_syscall_trace_{enter,leave} selectively
xtensa: use NO_SYSCALL instead of -1
xtensa: define syscall_get_arch()
Move EM_XTENSA to uapi/linux/elf-em.h
xtensa: support memtest
xtensa: don't use l32r opcode directly
xtensa: xtfpga.dtsi: fix dtc warnings about SPI
xtensa: don't clear cpenable unconditionally on release
xtensa: simplify coprocessor.S
xtensa: clean up WSR*/RSR*/get_sr/set_sr
xtensa: drop unused declarations from elf.h
xtensa: clean up syscall.h
xtensa: drop unused coprocessor helper functions
xtensa: drop custom PTRACE_{PEEK,POKE}{TEXT,DATA}
...

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Revision tags: v4.20, v4.20-rc7, v4.20-rc6
# 03760270 05-Dec-2018 Max Filippov <jcmvbkbc@gmail.com>

xtensa: don't use l32r opcode directly

xtensa assembler is capable of representing register loads with either
movi + addmi, l32r or const16, depending on the core configuration.
Don't use '.literal'

xtensa: don't use l32r opcode directly

xtensa assembler is capable of representing register loads with either
movi + addmi, l32r or const16, depending on the core configuration.
Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let
the assembler relax them.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

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