treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of th
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later versionextracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-laterhas been chosen to replace the boilerplate/reference in 3029 file(s).Signed-off-by: Thomas Gleixner <tglx@linutronix.de>Reviewed-by: Allison Randal <allison@lohutok.net>Cc: linux-spdx@vger.kernel.orgLink: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.deSigned-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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fls: change parameter to unsigned intWhen testing in userspace, UBSAN pointed out that shifting into the signbit is undefined behaviour. It doesn't really make sense to ask for thehighest set bi
fls: change parameter to unsigned intWhen testing in userspace, UBSAN pointed out that shifting into the signbit is undefined behaviour. It doesn't really make sense to ask for thehighest set bit of a negative value, so just turn the argument type intoan unsigned int.Some architectures (eg ppc) already had it declared as an unsigned int,so I don't expect too many problems.Link: http://lkml.kernel.org/r/20181105221117.31828-1-willy@infradead.orgSigned-off-by: Matthew Wilcox <willy@infradead.org>Acked-by: Thomas Gleixner <tglx@linutronix.de>Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>Cc: <linux-arch@vger.kernel.org>Signed-off-by: Andrew Morton <akpm@linux-foundation.org>Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
openrisc: add atomic bitopsThis utilize the load-link/store-conditional l.lwa and l.swainstructions to implement the atomic bitops.When those instructions are not available emulation is provided.
openrisc: add atomic bitopsThis utilize the load-link/store-conditional l.lwa and l.swainstructions to implement the atomic bitops.When those instructions are not available emulation is provided.Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>Cc: Peter Zijlstra <peterz@infradead.org>Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>[shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed byAlan Cox https://lkml.org/lkml/2014/7/23/666, implementtest_and_change_bit]Signed-off-by: Stafford Horne <shorne@gmail.com>
OpenRISC: HeadersSigned-off-by: Jonas Bonn <jonas@southpole.se>Reviewed-by: Arnd Bergmann <arnd@arndb.de>