Merge tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
"There are lots of minor updates for driver subsystems managed throu

Merge tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
"There are lots of minor updates for driver subsystems managed through
the soc tree (turris-omnia platform, cache driver, tee drivers,
arm-cci, bus, memory) as well as soc vendor specific drivers
(starfive, xilinx, microchip, nxp, amlogic, imx, renesas, samsung, ti,
nvidia).

The more notable changes are:

- Larger updates for Qualcomm SoCs including support for SM8950
(Maili) SM8975 (Hawi), Glymur, Shikra, and IPQ5424

- Added SoC support for Exynos5515, Tegra264, Tegra410, R8A774A3, and
MT8167 in existing drivers

- Arm SCMI firmware driver support for ACPI PCC transport and module
autoloading of protocol specific drivers

- Apple crash log support for CrgA embedded controller"

* tag 'soc-drivers-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (176 commits)
platform: cznic: turris-omnia-mcu: stop button emulation producers
cache: Make cpu_cache_invalidate_memregion() error out if there are no handlers
soc: mpfs: use kref cleanup on probe failure
arm64: enable HAVE_SHARED_GPIOS for all ARM64 platforms
bus: arm-cci: Drop cci-control-port node reference in __cci_ace_get_port()
bus: arm-cci: Drop CPU node reference in cci_ace_init_ports()
soc: fsl: dpio: Free the IRQ before releasing the I/O object
soc: fsl: dpio: Fix cleanup on IRQ registration failure
bus: fsl-mc: Annotate fsl_mc_io.portal_virt_addr with __counted_by_ptr
bus: fsl-mc: drop the fwnode links of the dpmacs nodes
soc: fsl: cpm1: tsa: Fix clock leak in tsa_of_parse_tdms()
soc: qcom: geni-se: Drop unused icc_ddr parameter from geni_icc_get()
firmware: qcom: scm: Allow QSEECOM on ThinkPad T14s Gen 7
dt-bindings: mailbox: qcom: Document Maili CPUCP mailbox controller
dt-bindings: spmi: glymur-spmi-pmic-arb: Add compatible for Qualcomm Maili SoC
soc: qcom: pmic_pdcharger_ulog: prevent work requeue during remove
ASoC: dt-bindings: qcom,apr: Add modem_apps GLINK channel for shikra
firmware: qcom: tzmem: disable SHM bridge for SM7125 platform
soc: qcom: ubwc: Add Kalambo UBWC config
firmware: qcom: scm: Allow QSEECOM on Kalambo CRD
...

show more ...

Merge tag 'soc-dt-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
"This is a rather large update of over 1000 non-merge commits touchin

Merge tag 'soc-dt-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
"This is a rather large update of over 1000 non-merge commits touching
devicetree files and bindings.

A few notable SoC were added this time:

- Apple M4 and A18 Pro are used in laptops, these follow the M3 model
added in 7.2.

- Google Laguna (aka Tensor G5) is used last year's Pixel phone
generation. Unlike the earlier Tensor chips, this is not based on
Samsung's Exynos family design but starts a new chip family.

- Qualcomm's Hawi and Nord SoCs are two powerful chips using the
custom Oryon cores. Product names and applications are so far not
known, which means that Qualcomm is doing something right by
upstreaming kernel support early.

The ST stm32mp23xc/stm32mp25xc SoC support was previously removed
because there were no users upstream, but they are back now that
boards have shown up. Renesas RZ/G2M v3.0 (R8A774A3) is just a minor
variation of the already supported SoC.

In total, there are 81 new dts files for individual boards, and they
are all over the place. Only one riscv based machine is added, the
Milk-V Meles SBC using the T-Head th1520 chip. For 32-bit Arm, we have
13 new boards. About half are industrial embedded boards using NXP
i.MX6/7 chips, the rest are older products: two Amazon tablets, two
Motorola phones and two SoM boards.

Everything else is 64-bit Arm:

- many industrial embedded boards using NXP layerscape, NXP i.MX8/9,
Qualcomm Hamoa, ST stm32mp2, Rockchip rk35xx, and Renesas RZ/G2
SoCs

- Laptops and tablets using Apple M4, Qualcomm Snapdragon X2,
Snapdragon X1 Elite and Allwinner A133 chips

- Valve Steam Frame VR headset using Snapdragon 8 Gen 3

- Seven handheld game consoles using Qualcomm Dragonwing qcs8550

- Mobile phones using Google Tensor G5, Samsung Exynos 850, and
various Qualcomm Snapdragon chips

Aside from the new stuff, there is still a lot going on for existing
socs and boards, including GPU hardware support on MediaTek MT8173
based laptops. Most patches actually add features this time, as the
compile-time diagnostic changes are slowing down"

* tag 'soc-dt-7.4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1022 commits)
arm64: dts: rockchip: Add Radxa E54C
dt-bindings: arm: rockchip: Add Radxa E54C
arm64: dts: rockchip: remove FRL GPIO for 100ASK DshanPi A1
arm64: dts: rockchip: fix M.2 E-key reset pinctrl on rk3588 rock-5-itx
arm64: dts: rockchip: add pcie30phy data-lanes on rk3588 coolpi-cm5-evb
arm64: dts: rockchip: Add the fan tachometers to Kobol Helios64
arm64: dts: rockchip: enable NPU on Radxa E52C
arm64: dts: rockchip: fix adc button voltage on Radxa E52C
riscv: dts: sophgo: sg2002-milkv-duo256m: drop reserved memory node
riscv: dts: sophgo: cv1800b-milkv-duo: drop reserved memory node
arm64: dts: nuvoton: npcm845-evb: Add peripheral nodes
arm64: dts: nuvoton: npcm845-evb: Fix DTS coding style
arm64: dts: nuvoton: npcm845: Add peripheral nodes
arm64: dts: nuvoton: npcm845: Split APB address ranges
riscv: dts: sophgo: cv180x: Fix internal ephy node name
riscv: dts: sophgo: add Milk-V Duo 256M ethernet support overlay
riscv: dts: sophgo: Limit SG2042 SPI NOR to 12.5 MHz
riscv: dts: sophgo: Enable SPI NOR on SRD3-10
riscv: dts: spacemit: set ETH MAC from eeprom for OrangePi
arm64: dts: allwinner: sun50i-h616: Add video engine
...

show more ...

arm64: enable HAVE_SHARED_GPIOS for all ARM64 platforms

Shared GPIO management provided by the GPIO shared proxy module has been
enabled for Qualcomm platforms for some time. By extension of the
def

arm64: enable HAVE_SHARED_GPIOS for all ARM64 platforms

Shared GPIO management provided by the GPIO shared proxy module has been
enabled for Qualcomm platforms for some time. By extension of the
defconfig, it's been effectively enabled for all ARM64 platforms when
using the default configuration. Bugs discovered initially after the
feature was first enabled, were fixed and I haven't seen any new reports
for several months. Make the feature enabled by default for all ARM64
platforms officially, which will allow us to continue the removal of the
deprecated GPIOD_FLAGS_BIT_NONEXCLUSIVE flag from the kernel.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

show more ...

arm64: dts: google: Add dts directory for Google-designed silicon

The first four Google Tensor SoCs were offshoots of Samsung Exynos
SoCs and their device trees were organized under the "exynos/goog

arm64: dts: google: Add dts directory for Google-designed silicon

The first four Google Tensor SoCs were offshoots of Samsung Exynos
SoCs and their device trees were organized under the "exynos/google"
directory. Starting with the Google Tensor G5 SoC in Pixel 10 phones,
Google Tensor SoCs are now of Google's own design. Add a location in
the tree to store these device tree files.

Changes by Peter Griffin
* update config symbol help with at least 4 lines to avoid checkpatch
warning

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Tested-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Link: https://patch.msgid.link/20260918-contrib-pg-pixel10-initial-dts-v4-2-745eaca28b1a@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

show more ...

irqchip/gic-v3: Add Altera SoCFPGA Agilex5 GIC600 DMA32 erratum workaround

Agilex5 integrates GIC600 with an ACE-lite interface limited to a 32-bit
address bus, so the ITS can only access the first

irqchip/gic-v3: Add Altera SoCFPGA Agilex5 GIC600 DMA32 erratum workaround

Agilex5 integrates GIC600 with an ACE-lite interface limited to a 32-bit
address bus, so the ITS can only access the first 4 GB of physical address
space. Register intel,socfpga-agilex5 on the existing
dma_32bit_impaired_platforms list so ITS allocations use GFP_DMA32.

The workaround is guarded by ALTERA_ERRATUM_AGILEX5_2_1_23, which is
selected by ARCH_INTEL_SOCFPGA as all Agilex5 devices are affected.

This limitation is documented as Agilex 5 ES Device Errata 2.1.23 (825514).

Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://docs.altera.com/r/docs/825514/current/agilex-5-es-device-errata-and-user-guidelines/hps-gicv3-its-and-lpi-unable-to-access-physical-memory-larger-than-32-bits-causing-msi-x-interrupt-failure
Link: https://lore.kernel.org/linux-arm-kernel/372f059069a5551ea1096015f855cc306dbd7cd4.1747368554.git.adrianhoyin.ng@altera.com/ # v1
Link: https://lore.kernel.org/linux-arm-kernel/6a44509ca0edaabc17e59d2e27fef1c782183456.1751618484.git.adrianhoyin.ng@altera.com/ # v2
Link: https://lore.kernel.org/linux-arm-kernel/20260622024945.21354-1-muhammad.nazim.amirul.nazle.asmade@altera.com/ # v3 (untagged)
Link: https://lore.kernel.org/all/20260904091114.2259616-1-adrian.ho.yin.ng@altera.com/ #v4
Link: https://patch.msgid.link/fc927e43892b86200e157fa303b0d1dd344caffd.1788751033.git.adrian.ho.yin.ng@altera.com

show more ...

arm64: Kconfig: Select HAVE_SHARED_GPIOS for Apple Silicon

Apple Silicon Macs use a shared GPIO line for all speaker codec
shutdown pins.

Select HAVE_SHARED_GPIOS for ARCH_APPLE so that we can use

arm64: Kconfig: Select HAVE_SHARED_GPIOS for Apple Silicon

Apple Silicon Macs use a shared GPIO line for all speaker codec
shutdown pins.

Select HAVE_SHARED_GPIOS for ARCH_APPLE so that we can use the
shared GPIO proxy infrastructure for this.

Signed-off-by: James Calligeros <jcalligeros99@gmail.com>
Link: https://patch.msgid.link/20260831-apple-shared-gpio-v1-1-e855b12e18ce@gmail.com
Signed-off-by: Sven Peter <sven@kernel.org>

show more ...

Merge tag 'soc-arm-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull arm SoC code updates from Arnd Bergmann:
"The largest addition here is the revived support for the ZTE ZX SoC

Merge tag 'soc-arm-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull arm SoC code updates from Arnd Bergmann:
"The largest addition here is the revived support for the ZTE ZX SoC
platform, though this mostly documentation.

The other changes are code cleanups that deal with continued
conversion of the GPIO library away from GPIO numbers to descriptors
and a few minor bugfixes"

* tag 'soc-arm-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
MAINTAINERS: Add Axiado reviewer and Maintainers
ARM: remove the last few uses of do_bad_IRQ()
ARM: imx31: Fix IIM mapping leak in revision check
ARM: imx3: Fix CCM node reference leak
ARM: orion5x: update board check in mss2_pci_init() to use the DT
arm: mvebu_v5_defconfig: remove stale MACH_LINKSTATION_LSCHL reference
ARM: mvebu: simplify of_node_put calls
ARM: mvebu: drop unnecessary NULL check
arm: boot: ep93xx: don't rely on machine_is_*() for removed board files
ARM: zte: clean up zx297520v3 doc. warnings
arm64: Kconfig: drop unneeded dependency on OF_GPIO for ARCH_MVEBU
firmware: imx: sm-misc: Make scmi_imx_misc_ctrl_nb variable static
ARM: zte: Add zx297520v3 platform support
ARM: pxa: pxa27x: attach software node to its target GPIO controller
ARM: pxa: pxa25x: attach software node to its target GPIO controller
ARM: pxa: spitz: attach software nodes to their target GPIO controllers
ARM: pxa: statify platform device definitions in spitz board file
ARM: omap2: simplify allocation for omap_device
ARM: select legacy gpiolib interfaces where used
ARM: s3c: use gpio lookup table for LEDs

show more ...

arm64: Kconfig: Add ASPEED SoC family Kconfig support

Add support for ASPEED SoC family like ast27XX 8th
generation ASPEED BMCs.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Link: https://lo

arm64: Kconfig: Add ASPEED SoC family Kconfig support

Add support for ASPEED SoC family like ast27XX 8th
generation ASPEED BMCs.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Link: https://lore.kernel.org/r/20260609-upstream_ast2700-v9-2-f631752f0cb1@aspeedtech.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

show more ...

arm64: Kconfig: drop unneeded dependency on OF_GPIO for ARCH_MVEBU

OF_GPIO is selected automatically on all OF systems. Any symbols it
controls also provide stubs so there's really no reason to sele

arm64: Kconfig: drop unneeded dependency on OF_GPIO for ARCH_MVEBU

OF_GPIO is selected automatically on all OF systems. Any symbols it
controls also provide stubs so there's really no reason to select it
explicitly. ARCH_MVEBU already selects GPIOLIB, drop the redundant
OF_GPIO dependency.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

show more ...

arm64: Kconfig: provide a top-level switch for Microchip platforms

Microchip is the only platform that doesn't have a top-level switch for
disabling all SoC families. Align it with other platforms a

arm64: Kconfig: provide a top-level switch for Microchip platforms

Microchip is the only platform that doesn't have a top-level switch for
disabling all SoC families. Align it with other platforms and update the
arm64 defconfig to keep the default config the same.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260226143615.65788-1-bartosz.golaszewski@oss.qualcomm.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>

show more ...

Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
"There are a handful of new SoCs this time, all of these are more or

Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
"There are a handful of new SoCs this time, all of these are more or
less related to chips in a wider family:

- SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first
widely available RVA23 implementation. Note that this is entirely
unrelated with the similarly named Texas Instruments K3 chip family
that follwed the TI Keystone2 SoC.

- The Realtek Kent family of SoCs contains three chip models
rtd1501s, rtd1861b and rtd1920s, and is related to their earlier
Set-top-box and NAS products such as rtd1619, but is built on newer
Arm Cortex-A78 cores.

- The Qualcomm Milos family includes the Snapdragon 7s Gen 3 (SM7635)
mobile phone SoC built around Armv9 Kryo cores of the Arm
Cortex-A720 generation. This one is used in the Fairphone Gen 6

- Qualcomm Kaanapali is a new SoC based around eight high performance
Oryon CPU cores

- NXP i.MX8QP and i.MX952 are both feature reduced versions of chips
we already support, i.e. the i.MX8QM and i.MX952, with fewer CPU
cores and I/O interfaces.

As part of a cleanup, a number of SoC specific devicetree files got
removed because they did not have a single board using the .dtsi files
and they were never compile tested as a result: Samsung s3c6400, ST
spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas
r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/
r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI
am3703/am3715. All of these could be restored easily if a new board
gets merged.

Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only
machine, as all remaining users are assumed to be using ACPI based
firmware.

A relatively small number of 43 boards get added this time, and almost
all of them for arm64. Aside from the reference boards for the newly
added SoCs, this includes:

- Three server boards use 32-bit ASpeed BMCs

- One more reference board for 32-bit Microchip LAN9668

- 64-bit Arm single-board computers based on Amlogic s905y4, CIX
sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95, Qualcomm
qcs6490/qrb2210 and Rockchip rk3568/rk3588s

- Carrier board for SOMs using Intel agilex5, Marvell Armada 7020,
NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588

- Two mobile phones using Snapdragon 845

- A gaming device and a NAS box, both based on Rockchips rk356x

On top of the newly added boards and SoCs, there is a lot of
background activity going into cleanups, in particular towards getting
a warning-free dtc build, and the usual work on adding support for
more hardware on the previously added machines"

* tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (757 commits)
dt-bindings: intel: Add Agilex eMMC support
arm64: dts: socfpga: agilex: add emmc support
arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node
ARM: dts: socfpga: fix dtbs_check warning for fpga-region
ARM: dts: socfpga: add #address-cells and #size-cells for sram node
dt-bindings: altera: document syscon as fallback for sys-mgr
arm64: dts: altera: Use lowercase hex
dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml
arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes
arm64: dts: socfpga: agilex5: add support for modular board
dt-bindings: intel: Add Agilex5 SoCFPGA modular board
arm64: dts: socfpga: agilex5: Add dma-coherent property
arm64: dts: realtek: Add Kent SoC and EVB device trees
dt-bindings: arm: realtek: Add Kent Soc family compatibles
ARM: dts: samsung: Drop s3c6400.dtsi
ARM: dts: nuvoton: Minor whitespace cleanup
MAINTAINERS: Add Falcon DB
arm64: dts: a7k: add COM Express boards
ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi
arm64: dts: rockchip: Fix rk3588 PCIe range mappings
...

show more ...

arm64: STM32: drop an undefined Kconfig symbol

Drop ARM_SMC_MBOX since it is not defined or used anywhere else
in the kernel source tree.

Fixes: 9e4e24414cc6 ("arm64: introduce STM32 family on Armv

arm64: STM32: drop an undefined Kconfig symbol

Drop ARM_SMC_MBOX since it is not defined or used anywhere else
in the kernel source tree.

Fixes: 9e4e24414cc6 ("arm64: introduce STM32 family on Armv8 architecture")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20251230181429.3429404-1-rdunlap@infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>

show more ...

arm64: select APPLE_PMGR_PWRSTATE for ARCH_APPLE

Critical devices like the NVMe on Apple silicon systems depend on
APPLE_PMGR_PWRSTATE and others are powered down coming out of reset so
select APPLE

arm64: select APPLE_PMGR_PWRSTATE for ARCH_APPLE

Critical devices like the NVMe on Apple silicon systems depend on
APPLE_PMGR_PWRSTATE and others are powered down coming out of reset so
select APPLE_PMGR_PWRSTATE to ensure these devices work. Since the
systems are not totally unsusable (boot to initramfs is expected to
work) allow !PM builds without APPLE_PMGR_PWRSTATE.

Link: https://lore.kernel.org/asahi/2e022f4e-4c87-4da1-9d02-f7a3ae7c5798@arm.com/
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Janne Grunau <j@jannau.net>
Link: https://patch.msgid.link/20251231-arch-arm64-apple-defconfig-v1-1-4ff19805ba39@jannau.net
Signed-off-by: Sven Peter <sven@kernel.org>

show more ...

Merge tag 'soc-newsoc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull new SoC families update from Arnd Bergmann:
"These three new families of SoC are split out into a separate

Merge tag 'soc-newsoc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull new SoC families update from Arnd Bergmann:
"These three new families of SoC are split out into a separate branch
because they touch multiple parts of the source tree and are better
left separate for the initial merge.

- Black Sesame Technologies C1200 is an automotive SoC using
Cortex-A78 CPU cores

- Anlogic dr1v90 (not to be confused with Amlogic) is an FPGA
platform using a single nuclei ux900 RISC-V core

- Tenstorrent Blackhole is a Neural Processing Unit using custom
"Tensix" cores for computation offload managed by Linux running on
SiFive X280 RISC-V cores.

Support for all three is rather rudimentary at the moment and will get
improved as device drivers are merged through other tree"

* tag 'soc-newsoc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (24 commits)
MAINTAINERS: add Black Sesame Technologies (BST) ARM SoC support
arm64: defconfig: enable BST platform support
arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 board
arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs
dt-bindings: arm: add Black Sesame Technologies (bst) SoC
dt-bindings: vendor-prefixes: Add Black Sesame Technologies Co., Ltd.
MAINTAINERS: Setup support for Anlogic tree
riscv: defconfig: Enable Anlogic SoC
riscv: dts: anlogic: Add Milianke MLKPAI FS01 board
riscv: dts: Add initial Anlogic DR1V90 SoC device tree
riscv: Add Anlogic SoC famly Kconfig support
dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart
dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMER
dt-bindings: riscv: Add Anlogic DR1V90
dt-bindings: riscv: Add Nuclei UX900 compatibles
dt-bindings: vendor-prefixes: Add Anlogic, Milianke and Nuclei
riscv: defconfig: Enable Tenstorrent SoCs
riscv: Kconfig.socs: Add ARCH_TENSTORRENT for Tenstorrent SoCs
riscv: dts: Add Tenstorrent Blackhole SoC PCIe cards
dt-bindings: interrupt-controller: Add Tenstorrent Blackhole compatible
...

show more ...

arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs

Add ARCH_BST configuration option to enable support for Black Sesame
Technologies SoC family. BST produces automotive-grade system-on-

arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs

Add ARCH_BST configuration option to enable support for Black Sesame
Technologies SoC family. BST produces automotive-grade system-on-chips
for intelligent driving, focusing on computer vision and AI capabilities.
The BST C1200 family includes SoCs for ADAS and autonomous driving
applications.

Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

show more ...

arm64: select HAVE_SHARED_GPIOS for ARCH_QCOM

Some qualcomm platforms use shared GPIOs. Enable support for them by
selecting the Kconfig switch provided by GPIOLIB.

Acked-by: Linus Walleij <linus.w

arm64: select HAVE_SHARED_GPIOS for ARCH_QCOM

Some qualcomm platforms use shared GPIOs. Enable support for them by
selecting the Kconfig switch provided by GPIOLIB.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20251112-gpio-shared-v4-7-b51f97b1abd8@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

show more ...

Merge tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
"Lots of platform specific updates for Qualcomm SoCs, including a n

Merge tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC driver updates from Arnd Bergmann:
"Lots of platform specific updates for Qualcomm SoCs, including a new
TEE subsystem driver for the Qualcomm QTEE firmware interface.

Added support for the Apple A11 SoC in drivers that are shared with
the M1/M2 series, among more updates for those.

Smaller platform specific driver updates for Renesas, ASpeed,
Broadcom, Nvidia, Mediatek, Amlogic, TI, Allwinner, and Freescale
SoCs.

Driver updates in the cache controller, memory controller and reset
controller subsystems.

SCMI firmware updates to add more features and improve robustness.
This includes support for having multiple SCMI providers in a single
system.

TEE subsystem support for protected DMA-bufs, allowing hardware to
access memory areas that managed by the kernel but remain inaccessible
from the CPU in EL1/EL0"

* tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (139 commits)
soc/fsl/qbman: Use for_each_online_cpu() instead of for_each_cpu()
soc: fsl: qe: Drop legacy-of-mm-gpiochip.h header from GPIO driver
soc: fsl: qe: Change GPIO driver to a proper platform driver
tee: fix register_shm_helper()
pmdomain: apple: Add "apple,t8103-pmgr-pwrstate"
dt-bindings: spmi: Add Apple A11 and T2 compatible
serial: qcom-geni: Load UART qup Firmware from linux side
spi: geni-qcom: Load spi qup Firmware from linux side
i2c: qcom-geni: Load i2c qup Firmware from linux side
soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem
soc: qcom: geni-se: Cleanup register defines and update copyright
dt-bindings: qcom: se-common: Add QUP Peripheral-specific properties for I2C, SPI, and SERIAL bus
Documentation: tee: Add Qualcomm TEE driver
tee: qcom: enable TEE_IOC_SHM_ALLOC ioctl
tee: qcom: add primordial object
tee: add Qualcomm TEE driver
tee: increase TEE_MAX_ARG_SIZE to 4096
tee: add TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF
tee: add TEE_IOCTL_PARAM_ATTR_TYPE_UBUF
tee: add close_context to TEE driver operation
...

show more ...

arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support

Add initial device tree support for Axis ARTPEC-8 SoC.

This SoC contains 4 Cortex-A53 CPUs and several other peripheral IPs.

Signed-off-b

arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support

Add initial device tree support for Axis ARTPEC-8 SoC.

This SoC contains 4 Cortex-A53 CPUs and several other peripheral IPs.

Signed-off-by: SungMin Park <smn1196@coasia.com>
Signed-off-by: SeonGu Kang <ksk4725@coasia.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Link: https://lore.kernel.org/r/20250901051926.59970-5-ravi.patel@samsung.com
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

show more ...

arm64: lan969x: Add support for Microchip LAN969x SoC

This adds support for the Microchip LAN969x ARMv8-based SoC switch family.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Dani

arm64: lan969x: Add support for Microchip LAN969x SoC

This adds support for the Microchip LAN969x ARMv8-based SoC switch family.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>

show more ...

arm64: Add config for Microchip SoC platforms

Currently, Microchip SparX-5 SoC is supported and it has its own symbol.

However, this means that new Microchip platforms that share drivers need
to co

arm64: Add config for Microchip SoC platforms

Currently, Microchip SparX-5 SoC is supported and it has its own symbol.

However, this means that new Microchip platforms that share drivers need
to constantly keep updating depends on various drivers.

So, to try and reduce this lets add ARCH_MICROCHIP symbol that drivers
could instead depend on.

LAN969x is being worked on and it will be added under ARCH_MICROCHIP.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Acked-by: Daniel Machon <daniel.machon@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>

show more ...

Merge tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
"Nothing stands out, apart from maybe the interesting

Merge tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
"Nothing stands out, apart from maybe the interesting Eswin EIC7700, a
RISC-V SoC I've never seen before.

Core changes:

- Open code PINCTRL_FUNCTION_DESC() instead of defining a complex
macro only used in one place

- Add pinmux_generic_add_pinfunction() helper and use this in a few
drivers

New drivers:

- Amlogic S7, S7D and S6 pin control support

- Eswin EIC7700 pin control support

- Qualcomm PMIV0104, PM7550 and Milos pin control support

Because of unhelpful numbering schemes, the Qualcomm driver now
needs to start to rely on SoC codenames

- STM32 HDP pin control support

- Mediatek MT8189 pin control support

Improvements:

- Switch remaining pin control drivers over to the new GPIO set
callback that provides a return value

- Support RSVD (reserved) pins in the STM32 driver

- Move many fixed assignments over to pinctrl_desc definitions

- Handle multiple TLMM regions in the Qualcomm driver"

* tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (105 commits)
pinctrl: mediatek: Add pinctrl driver for mt8189
dt-bindings: pinctrl: mediatek: Add support for mt8189
pinctrl: aspeed-g6: Add PCIe RC PERST pin group
pinctrl: ingenic: use pinmux_generic_add_pinfunction()
pinctrl: keembay: use pinmux_generic_add_pinfunction()
pinctrl: mediatek: moore: use pinmux_generic_add_pinfunction()
pinctrl: airoha: use pinmux_generic_add_pinfunction()
pinctrl: equilibrium: use pinmux_generic_add_pinfunction()
pinctrl: provide pinmux_generic_add_pinfunction()
pinctrl: pinmux: open-code PINCTRL_FUNCTION_DESC()
pinctrl: ma35: use new GPIO line value setter callbacks
MAINTAINERS: add Clément Le Goffic as STM32 HDP maintainer
pinctrl: stm32: Introduce HDP driver
dt-bindings: pinctrl: stm32: Introduce HDP
pinctrl: qcom: Add Milos pinctrl driver
dt-bindings: pinctrl: document the Milos Top Level Mode Multiplexer
pinctrl: qcom: spmi: Add PM7550
dt-bindings: pinctrl: qcom,pmic-gpio: Add PM7550 support
pinctrl: qcom: spmi: Add PMIV0104
dt-bindings: pinctrl: qcom,pmic-gpio: Add PMIV0104 support
...

show more ...

Merge tag 'soc-arm-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC code updates from Arnd Bergmann:
"Another small set of code changes for the 32-bit Arm platforms, and

Merge tag 'soc-arm-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC code updates from Arnd Bergmann:
"Another small set of code changes for the 32-bit Arm platforms, and a
trivial update to the Kconfig entry for the arm64 TI K3 chip.

Andrew Davis cleans up the system reset handling, which touches a
couple of platforms.

The mediatek platform needs some code changes to support
multiprocessing in the newly added support for the old mt6572 chip"

* tag 'soc-arm-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: sa110/gpio: convert set_multiple() to returning an integer
ARM: rockchip: fix kernel hang during smp initialization
ARM: mediatek: add MT6572 smp bring up code
ARM: mediatek: add board_dt_compat entry for the MT6572 SoC
ARM: tegra: Use I/O memcpy to write to IRAM
arm: orion: use string choices helper
ARM: Switch to new sys-off handler API
arm64: Kconfig.platforms: remove useless select for ARCH_K3

show more ...

Merge tag 'arm-sophgo-dt-for-v6.17' of https://github.com/sophgo/linux into soc/newsoc

ARM Devicetrees for v6.17

Sophgo:

Add support for Duo Module 01 Evaluation Board.
This board uses SG2000(old

Merge tag 'arm-sophgo-dt-for-v6.17' of https://github.com/sophgo/linux into soc/newsoc

ARM Devicetrees for v6.17

Sophgo:

Add support for Duo Module 01 Evaluation Board.
This board uses SG2000(old codename CV181xH),
which is dual-arch, RISC-V and ARM64. This
patch add the support for ARM64.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* tag 'arm-sophgo-dt-for-v6.17' of https://github.com/sophgo/linux:
arm64: defconfig: Enable rudimentary Sophgo SG2000 support
arm64: Add SOPHGO SOC family Kconfig support
arm64: dts: sophgo: Add Duo Module 01 Evaluation Board
arm64: dts: sophgo: Add Duo Module 01
arm64: dts: sophgo: Add initial SG2000 SoC device tree

Link: https://lore.kernel.org/r/MAUPR01MB11072C4B088AAC02268044E95FE5FA@MAUPR01MB11072.INDPRD01.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

show more ...

arm64: Add SOPHGO SOC family Kconfig support

First user will be Aarch64 core within SG2000 SoC.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Si

arm64: Add SOPHGO SOC family Kconfig support

First user will be Aarch64 core within SG2000 SoC.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://lore.kernel.org/r/20250612132844.767216-6-alexander.sverdlin@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>

show more ...

Merge branch 'newsoc/axiado' into soc/newsoc

Support for the AX3000 SoC, from Harshit Shah <hshah@axiado.com>:

The AX3000 is a multi-core system-on-chip featuring four ARM Cortex-A53
cores, secure

Merge branch 'newsoc/axiado' into soc/newsoc

Support for the AX3000 SoC, from Harshit Shah <hshah@axiado.com>:

The AX3000 is a multi-core system-on-chip featuring four ARM Cortex-A53
cores, secure vault, hardware firewall, and AI acceleration engines. This
initial support enables basic bring-up of the SoC and evaluation platform
with CPU, timer, UART, and I3C functionality.

The series begins by adding the "axiado" vendor prefix and compatible
strings for the SoC and board. It then introduces the device tree files
and minimal ARCH_AXIADO platform support in arm64.

* newsoc/axiado:
MAINTAINERS: Add entry for Axiado
arm64: defconfig: enable the Axiado family
arm64: dts: axiado: Add initial support for AX3000 SoC and eval board
arm64: add Axiado SoC family
dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller
dt-bindings: serial: cdns: add Axiado AX3000 UART controller
dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant
dt-bindings: gpio: cdns: convert to YAML
dt-bindings: arm: axiado: add AX3000 EVK compatible strings
dt-bindings: vendor-prefixes: Add Axiado Corporation

show more ...