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115e74a2 |
| 29-Jul-2025 |
Linus Torvalds <torvalds@linux-foundation.org> |
Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann: "There are a few new variants of existing chips:
- mt6572 is an
Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann: "There are a few new variants of existing chips:
- mt6572 is an older mobile phone chip from mediatek that was extremely popular a decade ago but never got upstreamed until now
- exynos2200 is a recent high-end mobile phone chip used in a few Samsung phones like the Galaxy S22
- Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M (R8A779H0) and used in automotive applications
- Tegra264 is a new chip from NVIDIA, but support is fairly minimal for now, and not much information is public about it
There are five more chips in a separate branch, as those are new chip families that I merged along with the necessary infrastructure.
New board support is not that exciting, with a total of 33 newly added machines here:
- Evaluation platforms for the chips above, plus TI am62d2 and Sophgo sg2042
- Six 32-bit industrial boards based on stm32, imx6 and am33 chips, plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and imx95
- Two newly added ASPEED BMC based motherboards, and one that got removed
- Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit msm8976 SoCs
- Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1
- A set-top box based on Amlogic meson-gxm
Updates for existing machines are spread over all the above families. One notable change here is support for the RP1 I/O chip used in Raspberry Pi 5"
* tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits) riscv: dts: sophgo: fix mdio node name for CV180X riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings riscv: dts: sophgo: add ethernet GMAC device for sg2042 riscv: dts: sophgo: Enable ethernet device for Huashan Pi riscv: dts: sophgo: Add mdio multiplexer device for cv18xx riscv: dts: sophgo: Add ethernet device for cv18xx riscv: dts: sophgo: sg2044: add pmu configuration riscv: dts: sophgo: sg2044: add ziccrse extension riscv: dts: sophgo: add zfh for sg2042 riscv: dts: sophgo: add ziccrse for sg2042 riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree riscv: dts: sophgo: sg2044: add PCIe device support for SG2044 riscv: dts: sophgo: sg2044: add MSI device support for SG2044 riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000 riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property ...
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96a96de2 |
| 21-Jul-2025 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.17, round 1
Highlights: ----------
- MPU: - STM32MP13: -Add Ethe
Merge tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.17, round 1
Highlights: ----------
- MPU: - STM32MP13: -Add Ethernet MAC adress efuse support.
- STMP32MP15: - Add stm32mp157f-DK2 board support. This board embedds the same conectivity devices, DDR ... than stm32mp157c-dk2. However there are two differences: STM32MP157F SoC which allows overdrive OPP and the SCMI support for system features like clocks and regulators.
- STM32MP25: - Fix tick timer for low power use cases. - Add timer support.
* tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: arm64: dts: st: remove empty line in stm32mp251.dtsi arm64: dts: st: fix timer used for ticks arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver ARM: dts: stm32: add stm32mp157f-dk2 board support dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx arm64: defconfig: enable STM32 timers drivers arm64: dts: st: add timer nodes on stm32mp257f-ev1 arm64: dts: st: add timer pins for stm32mp257f-ev1 arm64: dts: st: add timer nodes on stm32mp251 ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses
Link: https://lore.kernel.org/r/b3e3363b-1ea5-457c-b244-2cbe26f7d6e4@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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fadfd41a |
| 03-Jun-2025 |
Amelie Delaunay <amelie.delaunay@foss.st.com> |
ARM: dts: stm32: add stm32mp157f-dk2 board support
STM32MP157F-DK2 board embeds a STM32MP157F SoC. This SoC contains the same level of feature than a STM32MP157C SOC but A7 clock frequency can reach
ARM: dts: stm32: add stm32mp157f-dk2 board support
STM32MP157F-DK2 board embeds a STM32MP157F SoC. This SoC contains the same level of feature than a STM32MP157C SOC but A7 clock frequency can reach 800MHz, hence the inclusion of the newly introduced stm32mp15xf.dtsi.
As for other latest STM32 MPU families, STM32MP157F-DK2 relies on OP-TEE SCMI services for SoC clock and reset controllers resources, and for PMIC, now under OP-TEE control. That's why stm32mp157f-dk2-scmi.dtsi is introduced, to move all clocks, resets and regulators to SCMI-based ones.
To "disable" SCMI, just need to comment stm32mp157f-dk2-scmi.dtsi inclusion and to replace &scmi_v3v3 with &v3v3, then to disable arm_wdt and to enable i2c4 and its subnodes for PMIC support by Linux. Reconfigure usbotg for dual role with type-C support if needed.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-7-5be0854a9299@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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