dt-bindings: display: sprd,sharkl3-dsi-host: Fix missing clocks constraints'minItems' alone does not impose upper bound, unlike 'maxItems' whichimplies lower bound. Add missing clock constraint s
dt-bindings: display: sprd,sharkl3-dsi-host: Fix missing clocks constraints'minItems' alone does not impose upper bound, unlike 'maxItems' whichimplies lower bound. Add missing clock constraint so the list will haveexact number of items (clocks).Fixes: 2295bbd35edb ("dt-bindings: display: add Unisoc's mipi dsi controller bindings")Cc: stable@vger.kernel.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>Link: https://lore.kernel.org/r/20250720123003.37662-4-krzysztof.kozlowski@linaro.orgSigned-off-by: Rob Herring (Arm) <robh@kernel.org>
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dt-bindings: display: sprd,sharkl3-dpu: Fix missing clocks constraints'minItems' alone does not impose upper bound, unlike 'maxItems' whichimplies lower bound. Add missing clock constraint so the
dt-bindings: display: sprd,sharkl3-dpu: Fix missing clocks constraints'minItems' alone does not impose upper bound, unlike 'maxItems' whichimplies lower bound. Add missing clock constraint so the list will haveexact number of items (clocks).Fixes: 8cae15c60cf0 ("dt-bindings: display: add Unisoc's dpu bindings")Cc: stable@vger.kernel.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>Link: https://lore.kernel.org/r/20250720123003.37662-3-krzysztof.kozlowski@linaro.orgSigned-off-by: Rob Herring (Arm) <robh@kernel.org>
dt-bindings: white-space cleanupsRemove trailing white-spaces and trailing blank lines (yamllint withdefault options does not like them).Suggested-by: Corentin Labbe <clabbe@baylibre.com>Signed
dt-bindings: white-space cleanupsRemove trailing white-spaces and trailing blank lines (yamllint withdefault options does not like them).Suggested-by: Corentin Labbe <clabbe@baylibre.com>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>Signed-off-by: Rob Herring <robh@kernel.org>Link: https://lore.kernel.org/r/20220402192819.154691-1-krzysztof.kozlowski@linaro.org
dt-bindings: Improve phandle-array schemasThe 'phandle-array' type is a bit ambiguous. It can be either just anarray of phandles or an array of phandles plus args. Many schemas forphandle-array p
dt-bindings: Improve phandle-array schemasThe 'phandle-array' type is a bit ambiguous. It can be either just anarray of phandles or an array of phandles plus args. Many schemas forphandle-array properties aren't clear in the schema which case appliesthough the description usually describes it.The array of phandles case boils down to needing:items: maxItems: 1The phandle plus args cases should typically take this form:items: - items: - description: A phandle - description: 1st arg cell - description: 2nd arg cellWith this change, some examples need updating so that the bracketing ofproperty values matches the schema.Signed-off-by: Rob Herring <robh@kernel.org>Acked-by: Viresh Kumar <viresh.kumar@linaro.org>Acked-by: Vinod Koul <vkoul@kernel.org>Acked-by: Ulf Hansson <ulf.hansson@linaro.org>Acked-by: Georgi Djakov <djakov@kernel.org>Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>Acked-by: Mark Brown <broonie@kernel.org>Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>Acked-by: Stephen Boyd <sboyd@kernel.org>Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>Link: https://lore.kernel.org/r/20220119015038.2433585-1-robh@kernel.org
dt-bindings: display: add Unisoc's mipi dsi controller bindingsAdds MIPI DSI Controllersupport for Unisoc's display subsystem.v5: - Remove panel_in port for dsi node.Cc: Orson Zhai <orsonzha
dt-bindings: display: add Unisoc's mipi dsi controller bindingsAdds MIPI DSI Controllersupport for Unisoc's display subsystem.v5: - Remove panel_in port for dsi node.Cc: Orson Zhai <orsonzhai@gmail.com>Cc: Chunyan Zhang <zhang.lyra@gmail.com>Signed-off-by: Kevin Tang <kevin.tang@unisoc.com>Reviewed-by: Rob Herring <robh@kernel.org>Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>Link: https://patchwork.freedesktop.org/patch/msgid/20211207142717.30296-6-kevin3.tang@gmail.com
dt-bindings: display: add Unisoc's dpu bindingsDPU (Display Processor Unit) is the Display Controller for the Unisoc SoCswhich transfers the image data from a video memory buffer to an internalLC
dt-bindings: display: add Unisoc's dpu bindingsDPU (Display Processor Unit) is the Display Controller for the Unisoc SoCswhich transfers the image data from a video memory buffer to an internalLCD interface.Cc: Orson Zhai <orsonzhai@gmail.com>Cc: Chunyan Zhang <zhang.lyra@gmail.com>Signed-off-by: Kevin Tang <kevin.tang@unisoc.com>Reviewed-by: Rob Herring <robh@kernel.org>Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>Link: https://patchwork.freedesktop.org/patch/msgid/20211207142717.30296-4-kevin3.tang@gmail.com
dt-bindings: display: add Unisoc's drm master bindingsThe Unisoc DRM master device is a virtual device needed to list allDPU devices or other display interface nodes that comprise thegraphics sub
dt-bindings: display: add Unisoc's drm master bindingsThe Unisoc DRM master device is a virtual device needed to list allDPU devices or other display interface nodes that comprise thegraphics subsystemUnisoc's display pipeline have several components as belowdescription, multi display controllers and corresponding physicalinterfaces.For different display scenarios, dpu0 and dpu1 maybe binding todifferent encoder.E.g: dpu0 and dpu1 both binding to DSI for dual mipi-dsi display; dpu0 binding to DSI for primary display, and dpu1 binding to DP for external display;Cc: Orson Zhai <orsonzhai@gmail.com>Cc: Chunyan Zhang <zhang.lyra@gmail.com>Signed-off-by: Kevin Tang <kevin.tang@unisoc.com>Reviewed-by: Rob Herring <robh@kernel.org>Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>Link: https://patchwork.freedesktop.org/patch/msgid/20211207142717.30296-2-kevin3.tang@gmail.com