History log of /linux/Documentation/devicetree/bindings/clock/skyworks,si521xx.yaml (Results 1 – 13 of 13)
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Revision tags: v6.7-rc5, v6.7-rc4, v6.7-rc3, v6.7-rc2, v6.7-rc1, v6.6, v6.6-rc7, v6.6-rc6, v6.6-rc5, v6.6-rc4, v6.6-rc3, v6.6-rc2, v6.6-rc1
# 1ac731c5 31-Aug-2023 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge branch 'next' into for-linus

Prepare input updates for 6.6 merge window.


Revision tags: v6.5, v6.5-rc7, v6.5-rc6, v6.5-rc5, v6.5-rc4, v6.5-rc3
# 50501936 17-Jul-2023 Dmitry Torokhov <dmitry.torokhov@gmail.com>

Merge tag 'v6.4' into next

Sync up with mainline to bring in updates to shared infrastructure.


Revision tags: v6.5-rc2, v6.5-rc1
# e80b5003 27-Jun-2023 Jiri Kosina <jkosina@suse.cz>

Merge branch 'for-6.5/apple' into for-linus

- improved support for Keychron K8 keyboard (Lasse Brun)


Revision tags: v6.4, v6.4-rc7
# db6da59c 15-Jun-2023 Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-next into drm-misc-next-fixes

Backmerging to sync drm-misc-next-fixes with drm-misc-next.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>


# 03c60192 12-Jun-2023 Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Merge branch 'drm-next' of git://anongit.freedesktop.org/drm/drm into msm-next-lumag-base

Merge the drm-next tree to pick up the DRM DSC helpers (merged via
drm-intel-next tree). MSM DSC v1.2 patche

Merge branch 'drm-next' of git://anongit.freedesktop.org/drm/drm into msm-next-lumag-base

Merge the drm-next tree to pick up the DRM DSC helpers (merged via
drm-intel-next tree). MSM DSC v1.2 patches depend on these helpers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

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Revision tags: v6.4-rc6
# 5c680050 06-Jun-2023 Miquel Raynal <miquel.raynal@bootlin.com>

Merge tag 'v6.4-rc4' into wpan-next/staging

Linux 6.4-rc4


# 9ff17e6b 05-Jun-2023 Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Merge drm/drm-next into drm-intel-gt-next

For conflict avoidance we need the following commit:

c9a9f18d3ad8 drm/i915/huc: use const struct bus_type pointers

Signed-off-by: Tvrtko Ursulin <tvrtko

Merge drm/drm-next into drm-intel-gt-next

For conflict avoidance we need the following commit:

c9a9f18d3ad8 drm/i915/huc: use const struct bus_type pointers

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

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Revision tags: v6.4-rc5, v6.4-rc4, v6.4-rc3
# 9c3a985f 17-May-2023 Rodrigo Vivi <rodrigo.vivi@intel.com>

Merge drm/drm-next into drm-intel-next

Backmerge to get some hwmon dependencies.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


Revision tags: v6.4-rc2
# 50282fd5 12-May-2023 Maxime Ripard <maxime@cerno.tech>

Merge drm/drm-fixes into drm-misc-fixes

Let's bring 6.4-rc1 in drm-misc-fixes to start the new fix cycle.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>


# ff32fcca 09-May-2023 Maxime Ripard <maxime@cerno.tech>

Merge drm/drm-next into drm-misc-next

Start the 6.5 release cycle.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>


Revision tags: v6.4-rc1
# e81507ac 30-Apr-2023 Linus Torvalds <torvalds@linux-foundation.org>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Nothing looks out of the ordinary in this batch of clk driver updates.

T

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Nothing looks out of the ordinary in this batch of clk driver updates.

There are a couple patches to the core clk framework, but they're all
basically cleanups or debugging aids. The driver updates and new
additions are dominated in the diffstat by Qualcomm and MediaTek
drivers. Qualcomm gained a handful of new drivers for various SoCs,
and MediaTek gained a bunch of drivers for MT8188. The MediaTek
drivers are being modernized as well, so there are updates all over
that vendor's clk drivers. There's also a couple other new clk drivers
in here, for example the Starfive JH7110 SoC support is added.

Outside of the two major SoC vendors though, we have the usual
collection of non-critical fixes and cleanups to various clk drivers.
It's good to see that we're getting more cleanups and modernization
patches. Maybe one day we'll be able to properly split clk providers
from clk consumers.

Core:
- Print an informational message before disabling unused clks

New Drivers:
- BCM63268 timer clock and reset controller
- Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and
MT8195 SoCs
- Mediatek MT8188 SoC clk drivers
- Clock driver for Sunplus SP7021 SoC
- Clk driver support for Loongson-2 SoCs
- Clock driver for Skyworks Si521xx I2C PCIe clock generators
- Initial Starfive JH7110 clk/reset support
- Global clock controller drivers for Qualcomm SM7150, IPQ9574,
MSM8917 and IPQ5332 SoCs
- GPU clock controller drivers for SM6115, SM6125, SM6375 and SA8775P
SoCs

Updates:
- Shrink size of clk_fractional_divider a little
- Convert various clk drivers to devm_of_clk_add_hw_provider()
- Convert platform clk drivers to remove_new()
- Converted most Mediatek clock drivers to struct platform_driver
- MediaTek clock drivers can be built as modules
- Reimplement Loongson-1 clk driver with DT support
- Migrate socfpga clk driver to of_clk_add_hw_provider()
- Support for i3c clks on Aspeed ast2600 SoCs
- Add clock generic devm_clk_hw_register_gate_parent_data
- Add audiomix block control for i.MX8MP
- Add support for determine_rate to i.MX composite-8m
- Let the LCDIF Pixel clock of i.MX8MM and i.MX8MN set parent rate
- Provide clock name in error message for clk-gpr-mux on get parent
failure
- Drop duplicate imx_clk_mux_flags macro
- Register the i.MX8MP Media Disp2 Pix clock as bus clock
- Add Media LDB root clock to i.MX8MP
- Make i.MX8MP nand_usdhc_bus clock as non-critical
- Fix the rate table for i.MX fracn-gppll
- Disable HW control for the fracn-gppll in order to be controlled by
register write
- Add support for interger PLL in fracn-gppll
- Add mcore_booted module parameter to i.MX93 provider
- Add NIC, A55 and ARM PLL clocks to i.MX93
- Fix i.MX8ULP XBAR_DIVBUS and AD_SLOW clock parents
- Use "divider closest" clock type for PLL4_PFD dividers on i.MX8ULP
to get more accurate clock rates
- Mark the MU0_Bi and TPM5 clocks on i.MX8ULP as critical
- Update some of the i.MX critical clocks flags to allow glitchless
on-the-fly rate change.
- Add I2C5 clock on Renesas R-Car V3H
- Exynos850: Add CMU_G3D clock controller for the Mali GPU
- Extract Exynos5433 (ARM64) clock controller power management code
to common driver parts
- Exynos850: make PMU_ALIVE_PCLK clock critical
- Add Audio, thermal, camera (CSI-2), Image Signal Processor/Channel
Selector (ISPCS), and video capture (VIN) clocks on Renesas R-Car
V4H
- Add video capture (VIN) clocks on Renesas R-Car V3H
- Add Cortex-A53 System CPU (Z2) clocks on Renesas R-Car V3M and V3H
- Support for Stromer Plus PLL on Qualcomm IPQ5332
- Add a missing reset to Qualcomm QCM2290
- Migrate Qualcomm IPQ4019 to clk_parent_data
- Make USB GDSCs enter retention state when disabled on Qualcomm
SM6375, MSM8996 and MSM8998 SoCs
- Set floor rounding clk_ops for Qualcomm QCM2290 SDCC2 clk
- Add two EMAC GDSCs on Qualcomm SC8280XP
- Use shared rcg clk ops in Qualcomm SM6115 GCC
- Park Qualcomm SM8350 PCIe PIPE clks when disabled
- Add GDSCs to Qualcomm SC7280 LPASS audio clock controller
- Add missing XO clocks to Qualcomm MSM8226 and MSM8974
- Convert some Qualcomm clk DT bindings to YAML
- Reparenting fix for the clock supplying camera modules on Rockchip
rk3399
- Mark more critical (bus-)clocks on Rockchip rk3588"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (290 commits)
clk: qcom: gcc-sc8280xp: Add EMAC GDSCs
clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
clk: rockchip: rk3588: make gate linked clocks critical
clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk
clk: qcom: add the GPUCC driver for sa8775p
dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
clk: qcom: gcc-sm8350: fix PCIe PIPE clocks handling
clk: qcom: lpassaudiocc-sc7280: Add required gdsc power domain clks in lpass_cc_sc7280_desc
clk: qcom: lpasscc-sc7280: Skip qdsp6ss clock registration
dt-bindings: clock: qcom,sc7280-lpasscc: Add qcom,adsp-pil-mode property
clk: starfive: Avoid casting iomem pointers
clk: microchip: fix potential UAF in auxdev release callback
clk: qcom: rpm: Use managed `of_clk_add_hw_provider()`
clk: mediatek: fhctl: Mark local variables static
clk: sifive: make SiFive clk drivers depend on ARCH_ symbols
clk: uniphier: Use managed `of_clk_add_hw_provider()`
clk: si5351: Use managed `of_clk_add_hw_provider()`
clk: si570: Use managed `of_clk_add_hw_provider()`
clk: si514: Use managed `of_clk_add_hw_provider()`
clk: lmk04832: Use managed `of_clk_add_hw_provider()`
...

show more ...


# 4ec6a2f9 25-Apr-2023 Stephen Boyd <sboyd@kernel.org>

Merge branches 'clk-cleanup', 'clk-aspeed', 'clk-dt', 'clk-renesas' and 'clk-skyworks' into clk-next

- Support for i3c clks on Aspeed ast2600 SoCs
- Clock driver for Skyworks Si521xx I2C PCIe cloc

Merge branches 'clk-cleanup', 'clk-aspeed', 'clk-dt', 'clk-renesas' and 'clk-skyworks' into clk-next

- Support for i3c clks on Aspeed ast2600 SoCs
- Clock driver for Skyworks Si521xx I2C PCIe clock generators

* clk-cleanup:
clk: microchip: fix potential UAF in auxdev release callback
clk: sifive: make SiFive clk drivers depend on ARCH_ symbols
clk: stm32h7: Remove an unused field in struct stm32_fractional_divider
clk: tegra20: fix gcc-7 constant overflow warning
clock: milbeaut: use devm_platform_get_and_ioremap_resource()
clk: Print an info line before disabling unused clocks
clk: ti: Use of_address_to_resource()
clk: remove unnecessary (void*) conversions
clk: at91: clk-sam9x60-pll: fix return value check
clk: visconti: remove unused visconti_pll_provider::regmap

* clk-aspeed:
dt-bindings: clock: ast2600: Expand comment on reset definitions
clk: ast2600: Add comment about combined clock + reset handling
dt-bindings: clock: ast2600: remove IC36 & I3C7 clock definitions
clk: ast2600: Add full configs for I3C clocks
dt-bindings: clock: ast2600: Add top-level I3C clock
clk: ast2600: allow empty entries in aspeed_g6_gates

* clk-dt:
clk: mediatek: clk-pllfh: fix missing of_node_put() in fhctl_parse_dt()
clk: Use of_property_present() for testing DT property presence

* clk-renesas:
clk: renesas: r8a77980: Add I2C5 clock
clk: rs9: Add support for 9FGV0441
clk: rs9: Support device specific dif bit calculation
dt-bindings: clk: rs9: Add 9FGV0441
clk: rs9: Check for vendor/device ID
clk: renesas: Convert to platform remove callback returning void
clk: renesas: r9a06g032: Improve clock tables
clk: renesas: r9a06g032: Document structs
clk: renesas: r9a06g032: Drop unused fields
clk: renesas: r9a06g032: Improve readability
clk: renesas: r8a77980: Add Z2 clock
clk: renesas: r8a77970: Add Z2 clock
clk: renesas: r8a77995: Fix VIN parent clock
clk: renesas: r8a77980: Add VIN clocks
clk: renesas: r8a779g0: Add VIN clocks
clk: renesas: r8a779g0: Add ISPCS clocks
clk: renesas: r8a779g0: Add CSI-2 clocks
clk: renesas: r8a779g0: Add thermal clock
clk: renesas: r8a779g0: Add Audio clocks
clk: renesas: cpg-mssr: Update MSSR register range for R-Car V4H

* clk-skyworks:
clk: si521xx: Clock driver for Skyworks Si521xx I2C PCIe clock generators
dt-bindings: clk: si521xx: Add Skyworks Si521xx I2C PCIe clock generators

show more ...


Revision tags: v6.3, v6.3-rc7, v6.3-rc6, v6.3-rc5, v6.3-rc4, v6.3-rc3, v6.3-rc2, v6.3-rc1, v6.2, v6.2-rc8, v6.2-rc7, v6.2-rc6, v6.2-rc5
# 66a20af5 18-Jan-2023 Marek Vasut <marex@denx.de>

dt-bindings: clk: si521xx: Add Skyworks Si521xx I2C PCIe clock generators

Add binding for Skyworks Si521xx PCIe clock generators. This binding
is designed to support Si52144/Si52146/Si52147 series I

dt-bindings: clk: si521xx: Add Skyworks Si521xx I2C PCIe clock generators

Add binding for Skyworks Si521xx PCIe clock generators. This binding
is designed to support Si52144/Si52146/Si52147 series I2C PCIe clock
generators, tested model is Si52144. It should be possible to add
Si5213x series as well.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20230118191521.15544-1-marex@denx.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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