| 1911838a | 20-Aug-2026 |
Justin Hibbits <jhibbits@FreeBSD.org> |
dpaa/fman_xmdio: Make xmdio a "real" MDIO
Instead of forcing an `mdio` pseudo-device to hang off the xmdio, rename
xmdio to "mdio" and make it an ofw bus device, akin to the mii_fdt
driver, so that
dpaa/fman_xmdio: Make xmdio a "real" MDIO
Instead of forcing an `mdio` pseudo-device to hang off the xmdio, rename
xmdio to "mdio" and make it an ofw bus device, akin to the mii_fdt
driver, so that children can get the device tree goodies.
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| aefd61a1 | 10-Aug-2026 |
Justin Hibbits <jhibbits@FreeBSD.org> |
dpaa: Add LRO and receive callback batching
Reduce the code executed in the DQRR dequeue loop, and move the
heavy-weight operations to post-dequeue loop.
* Batch if_input() after DQRR dispatch loop
dpaa: Add LRO and receive callback batching
Reduce the code executed in the DQRR dequeue loop, and move the
heavy-weight operations to post-dequeue loop.
* Batch if_input() after DQRR dispatch loop completes. Only do the
DQRR_CI_CINH write at the end of the loop, so only up to 16 entries
will be processed.
* Add software LRO per FQ. Each per-CPU RX FQ gets its own LRO tracking
structure.
Since LRO is configured at FQ initialization time, allocate the ifnet
earlier in attach to prevent a panic.
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| d7397e95 | 10-Aug-2026 |
Justin Hibbits <jhibbits@FreeBSD.org> |
dpaa/eth: distribute RX across per-CPU FQs via FMan KeyGen
Grow sc_nrxfqs from 1 to the CPU total, and hash the RX
5-tuple across the range with the KG driver from the prior commit.
Each FQ lands on
dpaa/eth: distribute RX across per-CPU FQs via FMan KeyGen
Grow sc_nrxfqs from 1 to the CPU total, and hash the RX
5-tuple across the range with the KG driver from the prior commit.
Each FQ lands on its own per-CPU QMan channel, so a given core
drains only its own share of RX work and gets frame annotation +
data-head stashed into its cache.
* Add alignment parameter to qman_alloc_fqid_range() to meet KeyGen
requirements.
* Initialize 1 frame queue (FQ) per CPU in dpaa_eth_fm_port_rx_init(),
using a 5-tuple to spread the load across CPUs.
* Channel ownership for TX confirms moved from rx_init/free to
tx_init/free -- sc_rx_channel is now a TX-confirm-only per-port
pool channel.
Fallbacks/degradation:
* If any per-CPU channel is -1 (no portal attached)
the port fails to attach with a clear message.
* If the FQID range can't be allocated aligned, the port fails
attach.
* If KG scheme allocation fails at port setup, the port keeps
its N FQs but only FQ #0 sees traffic.
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| 4dccd3ac | 10-Aug-2026 |
Justin Hibbits <jhibbits@FreeBSD.org> |
dpaa/fman: KeyGen (Parse-Classify-Distribute) driver
Add sys/dev/dpaa/fman_keygen.[ch]. Public API is four functions:
* fman_kg_init(sc) -- Initialize KeyGen subsystem, clear out any stale
dpaa/fman: KeyGen (Parse-Classify-Distribute) driver
Add sys/dev/dpaa/fman_keygen.[ch]. Public API is four functions:
* fman_kg_init(sc) -- Initialize KeyGen subsystem, clear out any stale
config.
* fman_kg_fini(sc) -- Teardown KeyGen
* fman_kg_alloc_hash_scheme(sc, port, base_fqid, nfqs)
-- Allocate a scheme, program it for
RSS-over-IP-5-tuple hashing to nfqs FQs
starting at base_fqid, bind it to port.
* fman_kg_free_hash_scheme(sc, port)
-- Remove a scheme added by
fman_kg_alloc_hash_scheme().
KeyGen state (bitmap + port->scheme table) is added to the fman softc.
Future work may allow configuring the KG hash inputs, but what we have
now (5-tuple of src/src-port/dst/dst-port/IPSec SPI field) is
sufficient.
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| dcd99de9 | 10-Aug-2026 |
Justin Hibbits <jhibbits@FreeBSD.org> |
dpaa_eth: refactor RX FQ state into an array (N=1)
Preparation for FMan KeyGen-driven multi-queue RX. Replace the
single sc_rx_fq / sc_rx_fqid pair with a sc_rx_fqs[] array (currently
one entry) an
dpaa_eth: refactor RX FQ state into an array (N=1)
Preparation for FMan KeyGen-driven multi-queue RX. Replace the
single sc_rx_fq / sc_rx_fqid pair with a sc_rx_fqs[] array (currently
one entry) and sc_rx_fqid_base. Each entry carries a back-pointer
to the softc for use by the RX callback.
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| ee81cd1d | 13-Aug-2026 |
Justin Hibbits <jhibbits@FreeBSD.org> |
dpaa/qman: Fix various pool allocation bugs
* Set qman_channel_base after determining if QMan is v3, otherwise this
global stays at 0x21, which messes up the shift in
qman_portal_static_dequeue_
dpaa/qman: Fix various pool allocation bugs
* Set qman_channel_base after determining if QMan is v3, otherwise this
global stays at 0x21, which messes up the shift in
qman_portal_static_dequeue_channel().
* Fix the base shift in qman_portal_static_dequeue_channel(), there are
only 15 channels available, not 16, so starting at a shift of 15
yields shifting into the portal-specific channel.
* Correct vmem pool names for QMan resource pools.
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| 240d8116 | 10-Aug-2026 |
Justin Hibbits <jhibbits@FreeBSD.org> |
dpaa/dtsec: advertise RX/TX csum
Apply 6464974 to dTSEC, since it supports the same offload capabilities
as mEMAC.
The DPAA_CSUM_TX_OFFLOAD macro moves from if_memac.c to the shared
dpaa_eth.h sinc
dpaa/dtsec: advertise RX/TX csum
Apply 6464974 to dTSEC, since it supports the same offload capabilities
as mEMAC.
The DPAA_CSUM_TX_OFFLOAD macro moves from if_memac.c to the shared
dpaa_eth.h since both drivers now reference it.
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| 86a88972 | 26-Jul-2026 |
Justin Hibbits <jhibbits@FreeBSD.org> |
DPAA: Minor performance improvements
* Add interrupt coalescing for DQRR and MR, with thresholds and period
as tunable sysctls under the `hw.qman` tree.
* Do lazy/sloppy buffer management to avoid
DPAA: Minor performance improvements
* Add interrupt coalescing for DQRR and MR, with thresholds and period
as tunable sysctls under the `hw.qman` tree.
* Do lazy/sloppy buffer management to avoid constantly checking
thresholds via QMan portal round-trips.
* Add cache stashing to prewarm caches, reducing latency.
* Fix the definition of Context_A in the init_fq MC command/result
structures, they're 64-bit fields, not 32-bit.
* Reorder the dpaa_eth_frame_info as a bit of cleanup.
* Take advantage of the fact that UMA small allocations are returned in
the DMAP, and avoid pmap_kextract().
These changes together improve throughput by ~1.5%
(925Mbps->935-940Mbps) consistently, and reduce CPU usage by a bit,
increasing idle CPU from 30%->35% minimum.
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| 6464974c | 25-Apr-2026 |
Justin Hibbits <jhibbits@FreeBSD.org> |
dpaa: Enable checksum offloading for IPv4 and IPv6
Enable the FMan hardware parser to take advantage of some offloading.
This enables receive and transmit checksum offloading for both IPv4 and
IPv6.
dpaa: Enable checksum offloading for IPv4 and IPv6
Enable the FMan hardware parser to take advantage of some offloading.
This enables receive and transmit checksum offloading for both IPv4 and
IPv6.
Additional offloading capabilities the DPAA supports include:
* vlan parsing
* Transmit rate limiting
* IEEE-1588 timestamps
* Soft parsing for custom protocol checking
* Congestion handling
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