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Revision tags: release/14.0.0 |
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95ee2897 |
| 16-Aug-2023 |
Warner Losh <imp@FreeBSD.org> |
sys: Remove $FreeBSD$: two-line .h pattern
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
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Revision tags: release/13.2.0, release/12.4.0 |
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b4c2a5b6 |
| 29-Sep-2022 |
Kyle Evans <kevans@FreeBSD.org> |
arm64: coresight: fix the build without FDT
coresight_cpu_debug only has an FDT attachment, so let's not build it
for kernels without FDT.
coresight.h includes sys/malloc.h via header pollution
dev
arm64: coresight: fix the build without FDT
coresight_cpu_debug only has an FDT attachment, so let's not build it
for kernels without FDT.
coresight.h includes sys/malloc.h via header pollution
dev/ofw/openfirm.h; include it directly in case we're building without
FDT.
Reviewed by: andrew, manu
Differential Revision: https://reviews.freebsd.org/D36789
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Revision tags: release/13.1.0, release/12.3.0, release/13.0.0, release/12.2.0 |
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c9ea007c |
| 17-Jun-2020 |
Ruslan Bukin <br@FreeBSD.org> |
Complete the ACPI support for ARM Coresight:
o Parse the ACPI DSD (Device Specific Data) graph property and record
device connections.
o Split-out FDT support to a separate file.
o Get the correspo
Complete the ACPI support for ARM Coresight:
o Parse the ACPI DSD (Device Specific Data) graph property and record
device connections.
o Split-out FDT support to a separate file.
o Get the corresponding (FDT/ACPI) Coresight platform data in
the device drivers.
Sponsored by: DARPA, AFRL
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Revision tags: release/11.4.0, release/12.1.0, release/11.3.0, release/12.0.0, release/11.2.0 |
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b09de0b3 |
| 05-Apr-2018 |
Ruslan Bukin <br@FreeBSD.org> |
Add support for the Coresight technology from ARM Ltd.
ARM Coresight is a solution for debug and trace of complex SoC designs.
This includes a collection of drivers for ARM Coresight interconnect
d
Add support for the Coresight technology from ARM Ltd.
ARM Coresight is a solution for debug and trace of complex SoC designs.
This includes a collection of drivers for ARM Coresight interconnect
devices within a small Coresight framework.
Supported devices are:
o Embedded Trace Macrocell v4 (ETMv4)
o Funnel
o Dynamic Replicator
o Trace Memory Controller (TMC)
o CPU debug module
Devices are connected to each other internally in SoC and the
configuration of each device endpoints is described in FDT.
Typical trace flow (as found on Qualcomm Snapdragon 410e):
CPU0 -> ETM0 -> funnel1 -> funnel0 -> ETF -> replicator -> ETR -> DRAM
CPU1 -> ETM1 -^
CPU2 -> ETM2 -^
CPU3 -> ETM3 -^
Note that both Embedded Trace FIFO (ETF) and Embedded Trace Router (ETR)
are hardware configurations of TMC.
This is required for upcoming HWPMC tracing support.
This is tested on single-core system only.
Reviewed by: andrew (partially)
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D14618
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