wm8903.c (ce8ee02d519ab20c5b87d3b3929b5e44ad89e26f) wm8903.c (58bd2934923b7339e7320b1cbe87f13287c57c31)
1/*
2 * wm8903.c -- WM8903 ALSA SoC Audio driver
3 *
4 * Copyright 2008-12 Wolfson Microelectronics
5 * Copyright 2011-2012 NVIDIA, Inc.
6 *
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 *

--- 256 unchanged lines hidden (view full) ---

265 mdelay(4);
266
267 return 0;
268}
269
270static int wm8903_dcs_event(struct snd_soc_dapm_widget *w,
271 struct snd_kcontrol *kcontrol, int event)
272{
1/*
2 * wm8903.c -- WM8903 ALSA SoC Audio driver
3 *
4 * Copyright 2008-12 Wolfson Microelectronics
5 * Copyright 2011-2012 NVIDIA, Inc.
6 *
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 *

--- 256 unchanged lines hidden (view full) ---

265 mdelay(4);
266
267 return 0;
268}
269
270static int wm8903_dcs_event(struct snd_soc_dapm_widget *w,
271 struct snd_kcontrol *kcontrol, int event)
272{
273 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
274 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
273 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
274 struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
275
276 switch (event) {
277 case SND_SOC_DAPM_POST_PMU:
278 wm8903->dcs_pending |= 1 << w->shift;
279 break;
280 case SND_SOC_DAPM_PRE_PMD:
275
276 switch (event) {
277 case SND_SOC_DAPM_POST_PMU:
278 wm8903->dcs_pending |= 1 << w->shift;
279 break;
280 case SND_SOC_DAPM_PRE_PMD:
281 snd_soc_update_bits(codec, WM8903_DC_SERVO_0,
281 snd_soc_component_update_bits(component, WM8903_DC_SERVO_0,
282 1 << w->shift, 0);
283 break;
284 }
285
286 return 0;
287}
288
289#define WM8903_DCS_MODE_WRITE_STOP 0
290#define WM8903_DCS_MODE_START_STOP 2
291
282 1 << w->shift, 0);
283 break;
284 }
285
286 return 0;
287}
288
289#define WM8903_DCS_MODE_WRITE_STOP 0
290#define WM8903_DCS_MODE_START_STOP 2
291
292static void wm8903_seq_notifier(struct snd_soc_dapm_context *dapm,
292static void wm8903_seq_notifier(struct snd_soc_component *component,
293 enum snd_soc_dapm_type event, int subseq)
294{
293 enum snd_soc_dapm_type event, int subseq)
294{
295 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm);
296 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
295 struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
297 int dcs_mode = WM8903_DCS_MODE_WRITE_STOP;
298 int i, val;
299
300 /* Complete any pending DC servo starts */
301 if (wm8903->dcs_pending) {
296 int dcs_mode = WM8903_DCS_MODE_WRITE_STOP;
297 int i, val;
298
299 /* Complete any pending DC servo starts */
300 if (wm8903->dcs_pending) {
302 dev_dbg(codec->dev, "Starting DC servo for %x\n",
301 dev_dbg(component->dev, "Starting DC servo for %x\n",
303 wm8903->dcs_pending);
304
305 /* If we've no cached values then we need to do startup */
306 for (i = 0; i < ARRAY_SIZE(wm8903->dcs_cache); i++) {
307 if (!(wm8903->dcs_pending & (1 << i)))
308 continue;
309
310 if (wm8903->dcs_cache[i]) {
302 wm8903->dcs_pending);
303
304 /* If we've no cached values then we need to do startup */
305 for (i = 0; i < ARRAY_SIZE(wm8903->dcs_cache); i++) {
306 if (!(wm8903->dcs_pending & (1 << i)))
307 continue;
308
309 if (wm8903->dcs_cache[i]) {
311 dev_dbg(codec->dev,
310 dev_dbg(component->dev,
312 "Restore DC servo %d value %x\n",
313 3 - i, wm8903->dcs_cache[i]);
314
311 "Restore DC servo %d value %x\n",
312 3 - i, wm8903->dcs_cache[i]);
313
315 snd_soc_write(codec, WM8903_DC_SERVO_4 + i,
314 snd_soc_component_write(component, WM8903_DC_SERVO_4 + i,
316 wm8903->dcs_cache[i] & 0xff);
317 } else {
315 wm8903->dcs_cache[i] & 0xff);
316 } else {
318 dev_dbg(codec->dev,
317 dev_dbg(component->dev,
319 "Calibrate DC servo %d\n", 3 - i);
320 dcs_mode = WM8903_DCS_MODE_START_STOP;
321 }
322 }
323
324 /* Don't trust the cache for analogue */
325 if (wm8903->class_w_users)
326 dcs_mode = WM8903_DCS_MODE_START_STOP;
327
318 "Calibrate DC servo %d\n", 3 - i);
319 dcs_mode = WM8903_DCS_MODE_START_STOP;
320 }
321 }
322
323 /* Don't trust the cache for analogue */
324 if (wm8903->class_w_users)
325 dcs_mode = WM8903_DCS_MODE_START_STOP;
326
328 snd_soc_update_bits(codec, WM8903_DC_SERVO_2,
327 snd_soc_component_update_bits(component, WM8903_DC_SERVO_2,
329 WM8903_DCS_MODE_MASK, dcs_mode);
330
328 WM8903_DCS_MODE_MASK, dcs_mode);
329
331 snd_soc_update_bits(codec, WM8903_DC_SERVO_0,
330 snd_soc_component_update_bits(component, WM8903_DC_SERVO_0,
332 WM8903_DCS_ENA_MASK, wm8903->dcs_pending);
333
334 switch (dcs_mode) {
335 case WM8903_DCS_MODE_WRITE_STOP:
336 break;
337
338 case WM8903_DCS_MODE_START_STOP:
339 msleep(270);
340
341 /* Cache the measured offsets for digital */
342 if (wm8903->class_w_users)
343 break;
344
345 for (i = 0; i < ARRAY_SIZE(wm8903->dcs_cache); i++) {
346 if (!(wm8903->dcs_pending & (1 << i)))
347 continue;
348
331 WM8903_DCS_ENA_MASK, wm8903->dcs_pending);
332
333 switch (dcs_mode) {
334 case WM8903_DCS_MODE_WRITE_STOP:
335 break;
336
337 case WM8903_DCS_MODE_START_STOP:
338 msleep(270);
339
340 /* Cache the measured offsets for digital */
341 if (wm8903->class_w_users)
342 break;
343
344 for (i = 0; i < ARRAY_SIZE(wm8903->dcs_cache); i++) {
345 if (!(wm8903->dcs_pending & (1 << i)))
346 continue;
347
349 val = snd_soc_read(codec,
348 val = snd_soc_component_read32(component,
350 WM8903_DC_SERVO_READBACK_1 + i);
349 WM8903_DC_SERVO_READBACK_1 + i);
351 dev_dbg(codec->dev, "DC servo %d: %x\n",
350 dev_dbg(component->dev, "DC servo %d: %x\n",
352 3 - i, val);
353 wm8903->dcs_cache[i] = val;
354 }
355 break;
356
357 default:
358 pr_warn("DCS mode %d delay not set\n", dcs_mode);
359 break;

--- 9 unchanged lines hidden (view full) ---

369 * when used with digital sources. Enable and disable this mode
370 * automatically depending on the mixer configuration.
371 *
372 * All the relevant controls are simple switches.
373 */
374static int wm8903_class_w_put(struct snd_kcontrol *kcontrol,
375 struct snd_ctl_elem_value *ucontrol)
376{
351 3 - i, val);
352 wm8903->dcs_cache[i] = val;
353 }
354 break;
355
356 default:
357 pr_warn("DCS mode %d delay not set\n", dcs_mode);
358 break;

--- 9 unchanged lines hidden (view full) ---

368 * when used with digital sources. Enable and disable this mode
369 * automatically depending on the mixer configuration.
370 *
371 * All the relevant controls are simple switches.
372 */
373static int wm8903_class_w_put(struct snd_kcontrol *kcontrol,
374 struct snd_ctl_elem_value *ucontrol)
375{
377 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol);
378 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
376 struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
377 struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
379 u16 reg;
380 int ret;
381
378 u16 reg;
379 int ret;
380
382 reg = snd_soc_read(codec, WM8903_CLASS_W_0);
381 reg = snd_soc_component_read32(component, WM8903_CLASS_W_0);
383
384 /* Turn it off if we're about to enable bypass */
385 if (ucontrol->value.integer.value[0]) {
386 if (wm8903->class_w_users == 0) {
382
383 /* Turn it off if we're about to enable bypass */
384 if (ucontrol->value.integer.value[0]) {
385 if (wm8903->class_w_users == 0) {
387 dev_dbg(codec->dev, "Disabling Class W\n");
388 snd_soc_write(codec, WM8903_CLASS_W_0, reg &
386 dev_dbg(component->dev, "Disabling Class W\n");
387 snd_soc_component_write(component, WM8903_CLASS_W_0, reg &
389 ~(WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V));
390 }
391 wm8903->class_w_users++;
392 }
393
394 /* Implement the change */
395 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
396
397 /* If we've just disabled the last bypass path turn Class W on */
398 if (!ucontrol->value.integer.value[0]) {
399 if (wm8903->class_w_users == 1) {
388 ~(WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V));
389 }
390 wm8903->class_w_users++;
391 }
392
393 /* Implement the change */
394 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
395
396 /* If we've just disabled the last bypass path turn Class W on */
397 if (!ucontrol->value.integer.value[0]) {
398 if (wm8903->class_w_users == 1) {
400 dev_dbg(codec->dev, "Enabling Class W\n");
401 snd_soc_write(codec, WM8903_CLASS_W_0, reg |
399 dev_dbg(component->dev, "Enabling Class W\n");
400 snd_soc_component_write(component, WM8903_CLASS_W_0, reg |
402 WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
403 }
404 wm8903->class_w_users--;
405 }
406
401 WM8903_CP_DYN_FREQ | WM8903_CP_DYN_V);
402 }
403 wm8903->class_w_users--;
404 }
405
407 dev_dbg(codec->dev, "Bypass use count now %d\n",
406 dev_dbg(component->dev, "Bypass use count now %d\n",
408 wm8903->class_w_users);
409
410 return ret;
411}
412
413#define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \
414 SOC_SINGLE_EXT(xname, reg, shift, max, invert, \
415 snd_soc_dapm_get_volsw, wm8903_class_w_put)
416
417
418static int wm8903_deemph[] = { 0, 32000, 44100, 48000 };
419
407 wm8903->class_w_users);
408
409 return ret;
410}
411
412#define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \
413 SOC_SINGLE_EXT(xname, reg, shift, max, invert, \
414 snd_soc_dapm_get_volsw, wm8903_class_w_put)
415
416
417static int wm8903_deemph[] = { 0, 32000, 44100, 48000 };
418
420static int wm8903_set_deemph(struct snd_soc_codec *codec)
419static int wm8903_set_deemph(struct snd_soc_component *component)
421{
420{
422 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
421 struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
423 int val, i, best;
424
425 /* If we're using deemphasis select the nearest available sample
426 * rate.
427 */
428 if (wm8903->deemph) {
429 best = 1;
430 for (i = 2; i < ARRAY_SIZE(wm8903_deemph); i++) {
431 if (abs(wm8903_deemph[i] - wm8903->fs) <
432 abs(wm8903_deemph[best] - wm8903->fs))
433 best = i;
434 }
435
436 val = best << WM8903_DEEMPH_SHIFT;
437 } else {
438 best = 0;
439 val = 0;
440 }
441
422 int val, i, best;
423
424 /* If we're using deemphasis select the nearest available sample
425 * rate.
426 */
427 if (wm8903->deemph) {
428 best = 1;
429 for (i = 2; i < ARRAY_SIZE(wm8903_deemph); i++) {
430 if (abs(wm8903_deemph[i] - wm8903->fs) <
431 abs(wm8903_deemph[best] - wm8903->fs))
432 best = i;
433 }
434
435 val = best << WM8903_DEEMPH_SHIFT;
436 } else {
437 best = 0;
438 val = 0;
439 }
440
442 dev_dbg(codec->dev, "Set deemphasis %d (%dHz)\n",
441 dev_dbg(component->dev, "Set deemphasis %d (%dHz)\n",
443 best, wm8903_deemph[best]);
444
442 best, wm8903_deemph[best]);
443
445 return snd_soc_update_bits(codec, WM8903_DAC_DIGITAL_1,
444 return snd_soc_component_update_bits(component, WM8903_DAC_DIGITAL_1,
446 WM8903_DEEMPH_MASK, val);
447}
448
449static int wm8903_get_deemph(struct snd_kcontrol *kcontrol,
450 struct snd_ctl_elem_value *ucontrol)
451{
445 WM8903_DEEMPH_MASK, val);
446}
447
448static int wm8903_get_deemph(struct snd_kcontrol *kcontrol,
449 struct snd_ctl_elem_value *ucontrol)
450{
452 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
453 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
451 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
452 struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
454
455 ucontrol->value.integer.value[0] = wm8903->deemph;
456
457 return 0;
458}
459
460static int wm8903_put_deemph(struct snd_kcontrol *kcontrol,
461 struct snd_ctl_elem_value *ucontrol)
462{
453
454 ucontrol->value.integer.value[0] = wm8903->deemph;
455
456 return 0;
457}
458
459static int wm8903_put_deemph(struct snd_kcontrol *kcontrol,
460 struct snd_ctl_elem_value *ucontrol)
461{
463 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
464 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
462 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
463 struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
465 unsigned int deemph = ucontrol->value.integer.value[0];
466 int ret = 0;
467
468 if (deemph > 1)
469 return -EINVAL;
470
471 mutex_lock(&wm8903->lock);
472 if (wm8903->deemph != deemph) {
473 wm8903->deemph = deemph;
474
464 unsigned int deemph = ucontrol->value.integer.value[0];
465 int ret = 0;
466
467 if (deemph > 1)
468 return -EINVAL;
469
470 mutex_lock(&wm8903->lock);
471 if (wm8903->deemph != deemph) {
472 wm8903->deemph = deemph;
473
475 wm8903_set_deemph(codec);
474 wm8903_set_deemph(component);
476
477 ret = 1;
478 }
479 mutex_unlock(&wm8903->lock);
480
481 return ret;
482}
483

--- 612 unchanged lines hidden (view full) ---

1096 { "Charge Pump", NULL, "CLK_DSP" },
1097
1098 { "Left Headphone Output PGA", NULL, "Charge Pump" },
1099 { "Right Headphone Output PGA", NULL, "Charge Pump" },
1100 { "Left Line Output PGA", NULL, "Charge Pump" },
1101 { "Right Line Output PGA", NULL, "Charge Pump" },
1102};
1103
475
476 ret = 1;
477 }
478 mutex_unlock(&wm8903->lock);
479
480 return ret;
481}
482

--- 612 unchanged lines hidden (view full) ---

1095 { "Charge Pump", NULL, "CLK_DSP" },
1096
1097 { "Left Headphone Output PGA", NULL, "Charge Pump" },
1098 { "Right Headphone Output PGA", NULL, "Charge Pump" },
1099 { "Left Line Output PGA", NULL, "Charge Pump" },
1100 { "Right Line Output PGA", NULL, "Charge Pump" },
1101};
1102
1104static int wm8903_set_bias_level(struct snd_soc_codec *codec,
1103static int wm8903_set_bias_level(struct snd_soc_component *component,
1105 enum snd_soc_bias_level level)
1106{
1107 switch (level) {
1108 case SND_SOC_BIAS_ON:
1109 break;
1110
1111 case SND_SOC_BIAS_PREPARE:
1104 enum snd_soc_bias_level level)
1105{
1106 switch (level) {
1107 case SND_SOC_BIAS_ON:
1108 break;
1109
1110 case SND_SOC_BIAS_PREPARE:
1112 snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
1111 snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
1113 WM8903_VMID_RES_MASK,
1114 WM8903_VMID_RES_50K);
1115 break;
1116
1117 case SND_SOC_BIAS_STANDBY:
1112 WM8903_VMID_RES_MASK,
1113 WM8903_VMID_RES_50K);
1114 break;
1115
1116 case SND_SOC_BIAS_STANDBY:
1118 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
1119 snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
1117 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1118 snd_soc_component_update_bits(component, WM8903_BIAS_CONTROL_0,
1120 WM8903_POBCTRL | WM8903_ISEL_MASK |
1121 WM8903_STARTUP_BIAS_ENA |
1122 WM8903_BIAS_ENA,
1123 WM8903_POBCTRL |
1124 (2 << WM8903_ISEL_SHIFT) |
1125 WM8903_STARTUP_BIAS_ENA);
1126
1119 WM8903_POBCTRL | WM8903_ISEL_MASK |
1120 WM8903_STARTUP_BIAS_ENA |
1121 WM8903_BIAS_ENA,
1122 WM8903_POBCTRL |
1123 (2 << WM8903_ISEL_SHIFT) |
1124 WM8903_STARTUP_BIAS_ENA);
1125
1127 snd_soc_update_bits(codec,
1126 snd_soc_component_update_bits(component,
1128 WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0,
1129 WM8903_SPK_DISCHARGE,
1130 WM8903_SPK_DISCHARGE);
1131
1132 msleep(33);
1133
1127 WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0,
1128 WM8903_SPK_DISCHARGE,
1129 WM8903_SPK_DISCHARGE);
1130
1131 msleep(33);
1132
1134 snd_soc_update_bits(codec, WM8903_POWER_MANAGEMENT_5,
1133 snd_soc_component_update_bits(component, WM8903_POWER_MANAGEMENT_5,
1135 WM8903_SPKL_ENA | WM8903_SPKR_ENA,
1136 WM8903_SPKL_ENA | WM8903_SPKR_ENA);
1137
1134 WM8903_SPKL_ENA | WM8903_SPKR_ENA,
1135 WM8903_SPKL_ENA | WM8903_SPKR_ENA);
1136
1138 snd_soc_update_bits(codec,
1137 snd_soc_component_update_bits(component,
1139 WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0,
1140 WM8903_SPK_DISCHARGE, 0);
1141
1138 WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0,
1139 WM8903_SPK_DISCHARGE, 0);
1140
1142 snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
1141 snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
1143 WM8903_VMID_TIE_ENA |
1144 WM8903_BUFIO_ENA |
1145 WM8903_VMID_IO_ENA |
1146 WM8903_VMID_SOFT_MASK |
1147 WM8903_VMID_RES_MASK |
1148 WM8903_VMID_BUF_ENA,
1149 WM8903_VMID_TIE_ENA |
1150 WM8903_BUFIO_ENA |
1151 WM8903_VMID_IO_ENA |
1152 (2 << WM8903_VMID_SOFT_SHIFT) |
1153 WM8903_VMID_RES_250K |
1154 WM8903_VMID_BUF_ENA);
1155
1156 msleep(129);
1157
1142 WM8903_VMID_TIE_ENA |
1143 WM8903_BUFIO_ENA |
1144 WM8903_VMID_IO_ENA |
1145 WM8903_VMID_SOFT_MASK |
1146 WM8903_VMID_RES_MASK |
1147 WM8903_VMID_BUF_ENA,
1148 WM8903_VMID_TIE_ENA |
1149 WM8903_BUFIO_ENA |
1150 WM8903_VMID_IO_ENA |
1151 (2 << WM8903_VMID_SOFT_SHIFT) |
1152 WM8903_VMID_RES_250K |
1153 WM8903_VMID_BUF_ENA);
1154
1155 msleep(129);
1156
1158 snd_soc_update_bits(codec, WM8903_POWER_MANAGEMENT_5,
1157 snd_soc_component_update_bits(component, WM8903_POWER_MANAGEMENT_5,
1159 WM8903_SPKL_ENA | WM8903_SPKR_ENA,
1160 0);
1161
1158 WM8903_SPKL_ENA | WM8903_SPKR_ENA,
1159 0);
1160
1162 snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
1161 snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
1163 WM8903_VMID_SOFT_MASK, 0);
1164
1162 WM8903_VMID_SOFT_MASK, 0);
1163
1165 snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
1164 snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
1166 WM8903_VMID_RES_MASK,
1167 WM8903_VMID_RES_50K);
1168
1165 WM8903_VMID_RES_MASK,
1166 WM8903_VMID_RES_50K);
1167
1169 snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
1168 snd_soc_component_update_bits(component, WM8903_BIAS_CONTROL_0,
1170 WM8903_BIAS_ENA | WM8903_POBCTRL,
1171 WM8903_BIAS_ENA);
1172
1173 /* By default no bypass paths are enabled so
1174 * enable Class W support.
1175 */
1169 WM8903_BIAS_ENA | WM8903_POBCTRL,
1170 WM8903_BIAS_ENA);
1171
1172 /* By default no bypass paths are enabled so
1173 * enable Class W support.
1174 */
1176 dev_dbg(codec->dev, "Enabling Class W\n");
1177 snd_soc_update_bits(codec, WM8903_CLASS_W_0,
1175 dev_dbg(component->dev, "Enabling Class W\n");
1176 snd_soc_component_update_bits(component, WM8903_CLASS_W_0,
1178 WM8903_CP_DYN_FREQ |
1179 WM8903_CP_DYN_V,
1180 WM8903_CP_DYN_FREQ |
1181 WM8903_CP_DYN_V);
1182 }
1183
1177 WM8903_CP_DYN_FREQ |
1178 WM8903_CP_DYN_V,
1179 WM8903_CP_DYN_FREQ |
1180 WM8903_CP_DYN_V);
1181 }
1182
1184 snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
1183 snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
1185 WM8903_VMID_RES_MASK,
1186 WM8903_VMID_RES_250K);
1187 break;
1188
1189 case SND_SOC_BIAS_OFF:
1184 WM8903_VMID_RES_MASK,
1185 WM8903_VMID_RES_250K);
1186 break;
1187
1188 case SND_SOC_BIAS_OFF:
1190 snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
1189 snd_soc_component_update_bits(component, WM8903_BIAS_CONTROL_0,
1191 WM8903_BIAS_ENA, 0);
1192
1190 WM8903_BIAS_ENA, 0);
1191
1193 snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
1192 snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
1194 WM8903_VMID_SOFT_MASK,
1195 2 << WM8903_VMID_SOFT_SHIFT);
1196
1193 WM8903_VMID_SOFT_MASK,
1194 2 << WM8903_VMID_SOFT_SHIFT);
1195
1197 snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
1196 snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
1198 WM8903_VMID_BUF_ENA, 0);
1199
1200 msleep(290);
1201
1197 WM8903_VMID_BUF_ENA, 0);
1198
1199 msleep(290);
1200
1202 snd_soc_update_bits(codec, WM8903_VMID_CONTROL_0,
1201 snd_soc_component_update_bits(component, WM8903_VMID_CONTROL_0,
1203 WM8903_VMID_TIE_ENA | WM8903_BUFIO_ENA |
1204 WM8903_VMID_IO_ENA | WM8903_VMID_RES_MASK |
1205 WM8903_VMID_SOFT_MASK |
1206 WM8903_VMID_BUF_ENA, 0);
1207
1202 WM8903_VMID_TIE_ENA | WM8903_BUFIO_ENA |
1203 WM8903_VMID_IO_ENA | WM8903_VMID_RES_MASK |
1204 WM8903_VMID_SOFT_MASK |
1205 WM8903_VMID_BUF_ENA, 0);
1206
1208 snd_soc_update_bits(codec, WM8903_BIAS_CONTROL_0,
1207 snd_soc_component_update_bits(component, WM8903_BIAS_CONTROL_0,
1209 WM8903_STARTUP_BIAS_ENA, 0);
1210 break;
1211 }
1212
1213 return 0;
1214}
1215
1216static int wm8903_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1217 int clk_id, unsigned int freq, int dir)
1218{
1208 WM8903_STARTUP_BIAS_ENA, 0);
1209 break;
1210 }
1211
1212 return 0;
1213}
1214
1215static int wm8903_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1216 int clk_id, unsigned int freq, int dir)
1217{
1219 struct snd_soc_codec *codec = codec_dai->codec;
1220 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
1218 struct snd_soc_component *component = codec_dai->component;
1219 struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
1221
1222 wm8903->sysclk = freq;
1223
1224 return 0;
1225}
1226
1227static int wm8903_set_dai_fmt(struct snd_soc_dai *codec_dai,
1228 unsigned int fmt)
1229{
1220
1221 wm8903->sysclk = freq;
1222
1223 return 0;
1224}
1225
1226static int wm8903_set_dai_fmt(struct snd_soc_dai *codec_dai,
1227 unsigned int fmt)
1228{
1230 struct snd_soc_codec *codec = codec_dai->codec;
1231 u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
1229 struct snd_soc_component *component = codec_dai->component;
1230 u16 aif1 = snd_soc_component_read32(component, WM8903_AUDIO_INTERFACE_1);
1232
1233 aif1 &= ~(WM8903_LRCLK_DIR | WM8903_BCLK_DIR | WM8903_AIF_FMT_MASK |
1234 WM8903_AIF_LRCLK_INV | WM8903_AIF_BCLK_INV);
1235
1236 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1237 case SND_SOC_DAIFMT_CBS_CFS:
1238 break;
1239 case SND_SOC_DAIFMT_CBS_CFM:

--- 61 unchanged lines hidden (view full) ---

1301 default:
1302 return -EINVAL;
1303 }
1304 break;
1305 default:
1306 return -EINVAL;
1307 }
1308
1231
1232 aif1 &= ~(WM8903_LRCLK_DIR | WM8903_BCLK_DIR | WM8903_AIF_FMT_MASK |
1233 WM8903_AIF_LRCLK_INV | WM8903_AIF_BCLK_INV);
1234
1235 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1236 case SND_SOC_DAIFMT_CBS_CFS:
1237 break;
1238 case SND_SOC_DAIFMT_CBS_CFM:

--- 61 unchanged lines hidden (view full) ---

1300 default:
1301 return -EINVAL;
1302 }
1303 break;
1304 default:
1305 return -EINVAL;
1306 }
1307
1309 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
1308 snd_soc_component_write(component, WM8903_AUDIO_INTERFACE_1, aif1);
1310
1311 return 0;
1312}
1313
1314static int wm8903_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1315{
1309
1310 return 0;
1311}
1312
1313static int wm8903_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1314{
1316 struct snd_soc_codec *codec = codec_dai->codec;
1315 struct snd_soc_component *component = codec_dai->component;
1317 u16 reg;
1318
1316 u16 reg;
1317
1319 reg = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1318 reg = snd_soc_component_read32(component, WM8903_DAC_DIGITAL_1);
1320
1321 if (mute)
1322 reg |= WM8903_DAC_MUTE;
1323 else
1324 reg &= ~WM8903_DAC_MUTE;
1325
1319
1320 if (mute)
1321 reg |= WM8903_DAC_MUTE;
1322 else
1323 reg &= ~WM8903_DAC_MUTE;
1324
1326 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, reg);
1325 snd_soc_component_write(component, WM8903_DAC_DIGITAL_1, reg);
1327
1328 return 0;
1329}
1330
1331/* Lookup table for CLK_SYS/fs ratio. 256fs or more is recommended
1332 * for optimal performance so we list the lower rates first and match
1333 * on the last match we find. */
1334static struct {

--- 103 unchanged lines hidden (view full) ---

1438 { 96000, 10 },
1439 { 0, 0 },
1440};
1441
1442static int wm8903_hw_params(struct snd_pcm_substream *substream,
1443 struct snd_pcm_hw_params *params,
1444 struct snd_soc_dai *dai)
1445{
1326
1327 return 0;
1328}
1329
1330/* Lookup table for CLK_SYS/fs ratio. 256fs or more is recommended
1331 * for optimal performance so we list the lower rates first and match
1332 * on the last match we find. */
1333static struct {

--- 103 unchanged lines hidden (view full) ---

1437 { 96000, 10 },
1438 { 0, 0 },
1439};
1440
1441static int wm8903_hw_params(struct snd_pcm_substream *substream,
1442 struct snd_pcm_hw_params *params,
1443 struct snd_soc_dai *dai)
1444{
1446 struct snd_soc_codec *codec = dai->codec;
1447 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
1445 struct snd_soc_component *component = dai->component;
1446 struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
1448 int fs = params_rate(params);
1449 int bclk;
1450 int bclk_div;
1451 int i;
1452 int dsp_config;
1453 int clk_config;
1454 int best_val;
1455 int cur_val;
1456 int clk_sys;
1457
1447 int fs = params_rate(params);
1448 int bclk;
1449 int bclk_div;
1450 int i;
1451 int dsp_config;
1452 int clk_config;
1453 int best_val;
1454 int cur_val;
1455 int clk_sys;
1456
1458 u16 aif1 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_1);
1459 u16 aif2 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_2);
1460 u16 aif3 = snd_soc_read(codec, WM8903_AUDIO_INTERFACE_3);
1461 u16 clock0 = snd_soc_read(codec, WM8903_CLOCK_RATES_0);
1462 u16 clock1 = snd_soc_read(codec, WM8903_CLOCK_RATES_1);
1463 u16 dac_digital1 = snd_soc_read(codec, WM8903_DAC_DIGITAL_1);
1457 u16 aif1 = snd_soc_component_read32(component, WM8903_AUDIO_INTERFACE_1);
1458 u16 aif2 = snd_soc_component_read32(component, WM8903_AUDIO_INTERFACE_2);
1459 u16 aif3 = snd_soc_component_read32(component, WM8903_AUDIO_INTERFACE_3);
1460 u16 clock0 = snd_soc_component_read32(component, WM8903_CLOCK_RATES_0);
1461 u16 clock1 = snd_soc_component_read32(component, WM8903_CLOCK_RATES_1);
1462 u16 dac_digital1 = snd_soc_component_read32(component, WM8903_DAC_DIGITAL_1);
1464
1465 /* Enable sloping stopband filter for low sample rates */
1466 if (fs <= 24000)
1467 dac_digital1 |= WM8903_DAC_SB_FILT;
1468 else
1469 dac_digital1 &= ~WM8903_DAC_SB_FILT;
1470
1471 /* Configure sample rate logic for DSP - choose nearest rate */
1472 dsp_config = 0;
1473 best_val = abs(sample_rates[dsp_config].rate - fs);
1474 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1475 cur_val = abs(sample_rates[i].rate - fs);
1476 if (cur_val <= best_val) {
1477 dsp_config = i;
1478 best_val = cur_val;
1479 }
1480 }
1481
1463
1464 /* Enable sloping stopband filter for low sample rates */
1465 if (fs <= 24000)
1466 dac_digital1 |= WM8903_DAC_SB_FILT;
1467 else
1468 dac_digital1 &= ~WM8903_DAC_SB_FILT;
1469
1470 /* Configure sample rate logic for DSP - choose nearest rate */
1471 dsp_config = 0;
1472 best_val = abs(sample_rates[dsp_config].rate - fs);
1473 for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1474 cur_val = abs(sample_rates[i].rate - fs);
1475 if (cur_val <= best_val) {
1476 dsp_config = i;
1477 best_val = cur_val;
1478 }
1479 }
1480
1482 dev_dbg(codec->dev, "DSP fs = %dHz\n", sample_rates[dsp_config].rate);
1481 dev_dbg(component->dev, "DSP fs = %dHz\n", sample_rates[dsp_config].rate);
1483 clock1 &= ~WM8903_SAMPLE_RATE_MASK;
1484 clock1 |= sample_rates[dsp_config].value;
1485
1486 aif1 &= ~WM8903_AIF_WL_MASK;
1487 bclk = 2 * fs;
1488 switch (params_width(params)) {
1489 case 16:
1490 bclk *= 16;

--- 9 unchanged lines hidden (view full) ---

1500 case 32:
1501 bclk *= 32;
1502 aif1 |= 0xc;
1503 break;
1504 default:
1505 return -EINVAL;
1506 }
1507
1482 clock1 &= ~WM8903_SAMPLE_RATE_MASK;
1483 clock1 |= sample_rates[dsp_config].value;
1484
1485 aif1 &= ~WM8903_AIF_WL_MASK;
1486 bclk = 2 * fs;
1487 switch (params_width(params)) {
1488 case 16:
1489 bclk *= 16;

--- 9 unchanged lines hidden (view full) ---

1499 case 32:
1500 bclk *= 32;
1501 aif1 |= 0xc;
1502 break;
1503 default:
1504 return -EINVAL;
1505 }
1506
1508 dev_dbg(codec->dev, "MCLK = %dHz, target sample rate = %dHz\n",
1507 dev_dbg(component->dev, "MCLK = %dHz, target sample rate = %dHz\n",
1509 wm8903->sysclk, fs);
1510
1511 /* We may not have an MCLK which allows us to generate exactly
1512 * the clock we want, particularly with USB derived inputs, so
1513 * approximate.
1514 */
1515 clk_config = 0;
1516 best_val = abs((wm8903->sysclk /

--- 18 unchanged lines hidden (view full) ---

1535 clk_sys = wm8903->sysclk;
1536 }
1537
1538 clock1 &= ~(WM8903_CLK_SYS_RATE_MASK |
1539 WM8903_CLK_SYS_MODE_MASK);
1540 clock1 |= clk_sys_ratios[clk_config].rate << WM8903_CLK_SYS_RATE_SHIFT;
1541 clock1 |= clk_sys_ratios[clk_config].mode << WM8903_CLK_SYS_MODE_SHIFT;
1542
1508 wm8903->sysclk, fs);
1509
1510 /* We may not have an MCLK which allows us to generate exactly
1511 * the clock we want, particularly with USB derived inputs, so
1512 * approximate.
1513 */
1514 clk_config = 0;
1515 best_val = abs((wm8903->sysclk /

--- 18 unchanged lines hidden (view full) ---

1534 clk_sys = wm8903->sysclk;
1535 }
1536
1537 clock1 &= ~(WM8903_CLK_SYS_RATE_MASK |
1538 WM8903_CLK_SYS_MODE_MASK);
1539 clock1 |= clk_sys_ratios[clk_config].rate << WM8903_CLK_SYS_RATE_SHIFT;
1540 clock1 |= clk_sys_ratios[clk_config].mode << WM8903_CLK_SYS_MODE_SHIFT;
1541
1543 dev_dbg(codec->dev, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
1542 dev_dbg(component->dev, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
1544 clk_sys_ratios[clk_config].rate,
1545 clk_sys_ratios[clk_config].mode,
1546 clk_sys_ratios[clk_config].div);
1547
1543 clk_sys_ratios[clk_config].rate,
1544 clk_sys_ratios[clk_config].mode,
1545 clk_sys_ratios[clk_config].div);
1546
1548 dev_dbg(codec->dev, "Actual CLK_SYS = %dHz\n", clk_sys);
1547 dev_dbg(component->dev, "Actual CLK_SYS = %dHz\n", clk_sys);
1549
1550 /* We may not get quite the right frequency if using
1551 * approximate clocks so look for the closest match that is
1552 * higher than the target (we need to ensure that there enough
1553 * BCLKs to clock out the samples).
1554 */
1555 bclk_div = 0;
1556 best_val = ((clk_sys * 10) / bclk_divs[0].ratio) - bclk;

--- 5 unchanged lines hidden (view full) ---

1562 bclk_div = i;
1563 best_val = cur_val;
1564 i++;
1565 }
1566
1567 aif2 &= ~WM8903_BCLK_DIV_MASK;
1568 aif3 &= ~WM8903_LRCLK_RATE_MASK;
1569
1548
1549 /* We may not get quite the right frequency if using
1550 * approximate clocks so look for the closest match that is
1551 * higher than the target (we need to ensure that there enough
1552 * BCLKs to clock out the samples).
1553 */
1554 bclk_div = 0;
1555 best_val = ((clk_sys * 10) / bclk_divs[0].ratio) - bclk;

--- 5 unchanged lines hidden (view full) ---

1561 bclk_div = i;
1562 best_val = cur_val;
1563 i++;
1564 }
1565
1566 aif2 &= ~WM8903_BCLK_DIV_MASK;
1567 aif3 &= ~WM8903_LRCLK_RATE_MASK;
1568
1570 dev_dbg(codec->dev, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
1569 dev_dbg(component->dev, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
1571 bclk_divs[bclk_div].ratio / 10, bclk,
1572 (clk_sys * 10) / bclk_divs[bclk_div].ratio);
1573
1574 aif2 |= bclk_divs[bclk_div].div;
1575 aif3 |= bclk / fs;
1576
1577 wm8903->fs = params_rate(params);
1570 bclk_divs[bclk_div].ratio / 10, bclk,
1571 (clk_sys * 10) / bclk_divs[bclk_div].ratio);
1572
1573 aif2 |= bclk_divs[bclk_div].div;
1574 aif3 |= bclk / fs;
1575
1576 wm8903->fs = params_rate(params);
1578 wm8903_set_deemph(codec);
1577 wm8903_set_deemph(component);
1579
1578
1580 snd_soc_write(codec, WM8903_CLOCK_RATES_0, clock0);
1581 snd_soc_write(codec, WM8903_CLOCK_RATES_1, clock1);
1582 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_1, aif1);
1583 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_2, aif2);
1584 snd_soc_write(codec, WM8903_AUDIO_INTERFACE_3, aif3);
1585 snd_soc_write(codec, WM8903_DAC_DIGITAL_1, dac_digital1);
1579 snd_soc_component_write(component, WM8903_CLOCK_RATES_0, clock0);
1580 snd_soc_component_write(component, WM8903_CLOCK_RATES_1, clock1);
1581 snd_soc_component_write(component, WM8903_AUDIO_INTERFACE_1, aif1);
1582 snd_soc_component_write(component, WM8903_AUDIO_INTERFACE_2, aif2);
1583 snd_soc_component_write(component, WM8903_AUDIO_INTERFACE_3, aif3);
1584 snd_soc_component_write(component, WM8903_DAC_DIGITAL_1, dac_digital1);
1586
1587 return 0;
1588}
1589
1590/**
1591 * wm8903_mic_detect - Enable microphone detection via the WM8903 IRQ
1592 *
1585
1586 return 0;
1587}
1588
1589/**
1590 * wm8903_mic_detect - Enable microphone detection via the WM8903 IRQ
1591 *
1593 * @codec: WM8903 codec
1592 * @component: WM8903 component
1594 * @jack: jack to report detection events on
1595 * @det: value to report for presence detection
1596 * @shrt: value to report for short detection
1597 *
1598 * Enable microphone detection via IRQ on the WM8903. If GPIOs are
1599 * being used to bring out signals to the processor then only platform
1600 * data configuration is needed for WM8903 and processor GPIOs should
1601 * be configured using snd_soc_jack_add_gpios() instead.
1602 *
1603 * The current threasholds for detection should be configured using
1604 * micdet_cfg in the platform data. Using this function will force on
1605 * the microphone bias for the device.
1606 */
1593 * @jack: jack to report detection events on
1594 * @det: value to report for presence detection
1595 * @shrt: value to report for short detection
1596 *
1597 * Enable microphone detection via IRQ on the WM8903. If GPIOs are
1598 * being used to bring out signals to the processor then only platform
1599 * data configuration is needed for WM8903 and processor GPIOs should
1600 * be configured using snd_soc_jack_add_gpios() instead.
1601 *
1602 * The current threasholds for detection should be configured using
1603 * micdet_cfg in the platform data. Using this function will force on
1604 * the microphone bias for the device.
1605 */
1607int wm8903_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack,
1606int wm8903_mic_detect(struct snd_soc_component *component, struct snd_soc_jack *jack,
1608 int det, int shrt)
1609{
1607 int det, int shrt)
1608{
1610 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
1609 struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
1611 int irq_mask = WM8903_MICDET_EINT | WM8903_MICSHRT_EINT;
1612
1610 int irq_mask = WM8903_MICDET_EINT | WM8903_MICSHRT_EINT;
1611
1613 dev_dbg(codec->dev, "Enabling microphone detection: %x %x\n",
1612 dev_dbg(component->dev, "Enabling microphone detection: %x %x\n",
1614 det, shrt);
1615
1616 /* Store the configuration */
1617 wm8903->mic_jack = jack;
1618 wm8903->mic_det = det;
1619 wm8903->mic_short = shrt;
1620
1621 /* Enable interrupts we've got a report configured for */
1622 if (det)
1623 irq_mask &= ~WM8903_MICDET_EINT;
1624 if (shrt)
1625 irq_mask &= ~WM8903_MICSHRT_EINT;
1626
1613 det, shrt);
1614
1615 /* Store the configuration */
1616 wm8903->mic_jack = jack;
1617 wm8903->mic_det = det;
1618 wm8903->mic_short = shrt;
1619
1620 /* Enable interrupts we've got a report configured for */
1621 if (det)
1622 irq_mask &= ~WM8903_MICDET_EINT;
1623 if (shrt)
1624 irq_mask &= ~WM8903_MICSHRT_EINT;
1625
1627 snd_soc_update_bits(codec, WM8903_INTERRUPT_STATUS_1_MASK,
1626 snd_soc_component_update_bits(component, WM8903_INTERRUPT_STATUS_1_MASK,
1628 WM8903_MICDET_EINT | WM8903_MICSHRT_EINT,
1629 irq_mask);
1630
1631 if (det || shrt) {
1632 /* Enable mic detection, this may not have been set through
1633 * platform data (eg, if the defaults are OK). */
1627 WM8903_MICDET_EINT | WM8903_MICSHRT_EINT,
1628 irq_mask);
1629
1630 if (det || shrt) {
1631 /* Enable mic detection, this may not have been set through
1632 * platform data (eg, if the defaults are OK). */
1634 snd_soc_update_bits(codec, WM8903_WRITE_SEQUENCER_0,
1633 snd_soc_component_update_bits(component, WM8903_WRITE_SEQUENCER_0,
1635 WM8903_WSEQ_ENA, WM8903_WSEQ_ENA);
1634 WM8903_WSEQ_ENA, WM8903_WSEQ_ENA);
1636 snd_soc_update_bits(codec, WM8903_MIC_BIAS_CONTROL_0,
1635 snd_soc_component_update_bits(component, WM8903_MIC_BIAS_CONTROL_0,
1637 WM8903_MICDET_ENA, WM8903_MICDET_ENA);
1638 } else {
1636 WM8903_MICDET_ENA, WM8903_MICDET_ENA);
1637 } else {
1639 snd_soc_update_bits(codec, WM8903_MIC_BIAS_CONTROL_0,
1638 snd_soc_component_update_bits(component, WM8903_MIC_BIAS_CONTROL_0,
1640 WM8903_MICDET_ENA, 0);
1641 }
1642
1643 return 0;
1644}
1645EXPORT_SYMBOL_GPL(wm8903_mic_detect);
1646
1647static irqreturn_t wm8903_irq(int irq, void *data)

--- 113 unchanged lines hidden (view full) ---

1761 .channels_max = 2,
1762 .rates = WM8903_CAPTURE_RATES,
1763 .formats = WM8903_FORMATS,
1764 },
1765 .ops = &wm8903_dai_ops,
1766 .symmetric_rates = 1,
1767};
1768
1639 WM8903_MICDET_ENA, 0);
1640 }
1641
1642 return 0;
1643}
1644EXPORT_SYMBOL_GPL(wm8903_mic_detect);
1645
1646static irqreturn_t wm8903_irq(int irq, void *data)

--- 113 unchanged lines hidden (view full) ---

1760 .channels_max = 2,
1761 .rates = WM8903_CAPTURE_RATES,
1762 .formats = WM8903_FORMATS,
1763 },
1764 .ops = &wm8903_dai_ops,
1765 .symmetric_rates = 1,
1766};
1767
1769static int wm8903_resume(struct snd_soc_codec *codec)
1768static int wm8903_resume(struct snd_soc_component *component)
1770{
1769{
1771 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
1770 struct wm8903_priv *wm8903 = snd_soc_component_get_drvdata(component);
1772
1773 regcache_sync(wm8903->regmap);
1774
1775 return 0;
1776}
1777
1778#ifdef CONFIG_GPIOLIB
1779static int wm8903_gpio_request(struct gpio_chip *chip, unsigned offset)

--- 99 unchanged lines hidden (view full) ---

1879{
1880}
1881
1882static void wm8903_free_gpio(struct wm8903_priv *wm8903)
1883{
1884}
1885#endif
1886
1771
1772 regcache_sync(wm8903->regmap);
1773
1774 return 0;
1775}
1776
1777#ifdef CONFIG_GPIOLIB
1778static int wm8903_gpio_request(struct gpio_chip *chip, unsigned offset)

--- 99 unchanged lines hidden (view full) ---

1878{
1879}
1880
1881static void wm8903_free_gpio(struct wm8903_priv *wm8903)
1882{
1883}
1884#endif
1885
1887static const struct snd_soc_codec_driver soc_codec_dev_wm8903 = {
1888 .resume = wm8903_resume,
1889 .set_bias_level = wm8903_set_bias_level,
1890 .seq_notifier = wm8903_seq_notifier,
1891 .suspend_bias_off = true,
1892
1893 .component_driver = {
1894 .controls = wm8903_snd_controls,
1895 .num_controls = ARRAY_SIZE(wm8903_snd_controls),
1896 .dapm_widgets = wm8903_dapm_widgets,
1897 .num_dapm_widgets = ARRAY_SIZE(wm8903_dapm_widgets),
1898 .dapm_routes = wm8903_intercon,
1899 .num_dapm_routes = ARRAY_SIZE(wm8903_intercon),
1900 },
1886static const struct snd_soc_component_driver soc_component_dev_wm8903 = {
1887 .resume = wm8903_resume,
1888 .set_bias_level = wm8903_set_bias_level,
1889 .seq_notifier = wm8903_seq_notifier,
1890 .controls = wm8903_snd_controls,
1891 .num_controls = ARRAY_SIZE(wm8903_snd_controls),
1892 .dapm_widgets = wm8903_dapm_widgets,
1893 .num_dapm_widgets = ARRAY_SIZE(wm8903_dapm_widgets),
1894 .dapm_routes = wm8903_intercon,
1895 .num_dapm_routes = ARRAY_SIZE(wm8903_intercon),
1896 .suspend_bias_off = 1,
1897 .idle_bias_on = 1,
1898 .use_pmdown_time = 1,
1899 .endianness = 1,
1900 .non_legacy_dai_naming = 1,
1901};
1902
1903static const struct regmap_config wm8903_regmap = {
1904 .reg_bits = 8,
1905 .val_bits = 16,
1906
1907 .max_register = WM8903_MAX_REGISTER,
1908 .volatile_reg = wm8903_volatile_register,

--- 262 unchanged lines hidden (view full) ---

2171 regmap_update_bits(wm8903->regmap, WM8903_ANALOGUE_OUT3_RIGHT,
2172 WM8903_SPKVU, WM8903_SPKVU);
2173
2174 /* Enable DAC soft mute by default */
2175 regmap_update_bits(wm8903->regmap, WM8903_DAC_DIGITAL_1,
2176 WM8903_DAC_MUTEMODE | WM8903_DAC_MUTE,
2177 WM8903_DAC_MUTEMODE | WM8903_DAC_MUTE);
2178
1901};
1902
1903static const struct regmap_config wm8903_regmap = {
1904 .reg_bits = 8,
1905 .val_bits = 16,
1906
1907 .max_register = WM8903_MAX_REGISTER,
1908 .volatile_reg = wm8903_volatile_register,

--- 262 unchanged lines hidden (view full) ---

2171 regmap_update_bits(wm8903->regmap, WM8903_ANALOGUE_OUT3_RIGHT,
2172 WM8903_SPKVU, WM8903_SPKVU);
2173
2174 /* Enable DAC soft mute by default */
2175 regmap_update_bits(wm8903->regmap, WM8903_DAC_DIGITAL_1,
2176 WM8903_DAC_MUTEMODE | WM8903_DAC_MUTE,
2177 WM8903_DAC_MUTEMODE | WM8903_DAC_MUTE);
2178
2179 ret = snd_soc_register_codec(&i2c->dev,
2180 &soc_codec_dev_wm8903, &wm8903_dai, 1);
2179 ret = devm_snd_soc_register_component(&i2c->dev,
2180 &soc_component_dev_wm8903, &wm8903_dai, 1);
2181 if (ret != 0)
2182 goto err;
2183
2184 return 0;
2185err:
2186 regulator_bulk_disable(ARRAY_SIZE(wm8903->supplies),
2187 wm8903->supplies);
2188 return ret;
2189}
2190
2191static int wm8903_i2c_remove(struct i2c_client *client)
2192{
2193 struct wm8903_priv *wm8903 = i2c_get_clientdata(client);
2194
2195 regulator_bulk_disable(ARRAY_SIZE(wm8903->supplies),
2196 wm8903->supplies);
2197 if (client->irq)
2198 free_irq(client->irq, wm8903);
2199 wm8903_free_gpio(wm8903);
2181 if (ret != 0)
2182 goto err;
2183
2184 return 0;
2185err:
2186 regulator_bulk_disable(ARRAY_SIZE(wm8903->supplies),
2187 wm8903->supplies);
2188 return ret;
2189}
2190
2191static int wm8903_i2c_remove(struct i2c_client *client)
2192{
2193 struct wm8903_priv *wm8903 = i2c_get_clientdata(client);
2194
2195 regulator_bulk_disable(ARRAY_SIZE(wm8903->supplies),
2196 wm8903->supplies);
2197 if (client->irq)
2198 free_irq(client->irq, wm8903);
2199 wm8903_free_gpio(wm8903);
2200 snd_soc_unregister_codec(&client->dev);
2201
2202 return 0;
2203}
2204
2205static const struct of_device_id wm8903_of_match[] = {
2206 { .compatible = "wlf,wm8903", },
2207 {},
2208};

--- 23 unchanged lines hidden --- 		2200
2201 return 0;
2202}
2203
2204static const struct of_device_id wm8903_of_match[] = {
2205 { .compatible = "wlf,wm8903", },
2206 {},
2207};

--- 23 unchanged lines hidden ---