arm_vgic.h (e7c48059248e013772d8da69351ac8b262d8fce2) arm_vgic.h (74fe55dc9ab77142e3c4783ecc5b87d494164452)
1/*
2 * Copyright (C) 2015, 2016 ARM Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,

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21#include <linux/irqreturn.h>
22#include <linux/spinlock.h>
23#include <linux/static_key.h>
24#include <linux/types.h>
25#include <kvm/iodev.h>
26#include <linux/list.h>
27#include <linux/jump_label.h>
28
1/*
2 * Copyright (C) 2015, 2016 ARM Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,

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21#include <linux/irqreturn.h>
22#include <linux/spinlock.h>
23#include <linux/static_key.h>
24#include <linux/types.h>
25#include <kvm/iodev.h>
26#include <linux/list.h>
27#include <linux/jump_label.h>
28
29#include <linux/irqchip/arm-gic-v4.h>
30
29#define VGIC_V3_MAX_CPUS 255
30#define VGIC_V2_MAX_CPUS 8
31#define VGIC_NR_IRQS_LEGACY 256
32#define VGIC_NR_SGIS 16
33#define VGIC_NR_PPIS 16
34#define VGIC_NR_PRIVATE_IRQS (VGIC_NR_SGIS + VGIC_NR_PPIS)
35#define VGIC_MAX_PRIVATE (VGIC_NR_PRIVATE_IRQS - 1)
36#define VGIC_MAX_SPI 1019

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231
232 /* Protects the lpi_list and the count value below. */
233 spinlock_t lpi_list_lock;
234 struct list_head lpi_list_head;
235 int lpi_list_count;
236
237 /* used by vgic-debug */
238 struct vgic_state_iter *iter;
31#define VGIC_V3_MAX_CPUS 255
32#define VGIC_V2_MAX_CPUS 8
33#define VGIC_NR_IRQS_LEGACY 256
34#define VGIC_NR_SGIS 16
35#define VGIC_NR_PPIS 16
36#define VGIC_NR_PRIVATE_IRQS (VGIC_NR_SGIS + VGIC_NR_PPIS)
37#define VGIC_MAX_PRIVATE (VGIC_NR_PRIVATE_IRQS - 1)
38#define VGIC_MAX_SPI 1019

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233
234 /* Protects the lpi_list and the count value below. */
235 spinlock_t lpi_list_lock;
236 struct list_head lpi_list_head;
237 int lpi_list_count;
238
239 /* used by vgic-debug */
240 struct vgic_state_iter *iter;
241
242 /*
243 * GICv4 ITS per-VM data, containing the IRQ domain, the VPE
244 * array, the property table pointer as well as allocation
245 * data. This essentially ties the Linux IRQ core and ITS
246 * together, and avoids leaking KVM's data structures anywhere
247 * else.
248 */
249 struct its_vm its_vm;
239};
240
241struct vgic_v2_cpu_if {
242 u32 vgic_hcr;
243 u32 vgic_vmcr;
244 u64 vgic_elrsr; /* Saved only */
245 u32 vgic_apr;
246 u32 vgic_lr[VGIC_V2_MAX_LRS];
247};
248
249struct vgic_v3_cpu_if {
250 u32 vgic_hcr;
251 u32 vgic_vmcr;
252 u32 vgic_sre; /* Restored only, change ignored */
253 u32 vgic_elrsr; /* Saved only */
254 u32 vgic_ap0r[4];
255 u32 vgic_ap1r[4];
256 u64 vgic_lr[VGIC_V3_MAX_LRS];
250};
251
252struct vgic_v2_cpu_if {
253 u32 vgic_hcr;
254 u32 vgic_vmcr;
255 u64 vgic_elrsr; /* Saved only */
256 u32 vgic_apr;
257 u32 vgic_lr[VGIC_V2_MAX_LRS];
258};
259
260struct vgic_v3_cpu_if {
261 u32 vgic_hcr;
262 u32 vgic_vmcr;
263 u32 vgic_sre; /* Restored only, change ignored */
264 u32 vgic_elrsr; /* Saved only */
265 u32 vgic_ap0r[4];
266 u32 vgic_ap1r[4];
267 u64 vgic_lr[VGIC_V3_MAX_LRS];
268
269 /*
270 * GICv4 ITS per-VPE data, containing the doorbell IRQ, the
271 * pending table pointer, the its_vm pointer and a few other
272 * HW specific things. As for the its_vm structure, this is
273 * linking the Linux IRQ subsystem and the ITS together.
274 */
275 struct its_vpe its_vpe;
257};
258
259struct vgic_cpu {
260 /* CPU vif control registers for world switch */
261 union {
262 struct vgic_v2_cpu_if vgic_v2;
263 struct vgic_v3_cpu_if vgic_v3;
264 };

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277
278struct vgic_cpu {
279 /* CPU vif control registers for world switch */
280 union {
281 struct vgic_v2_cpu_if vgic_v2;
282 struct vgic_v3_cpu_if vgic_v3;
283 };

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