exynos_tmu.c (0c1554a6d868a89928c03be0be081f0249eb50f5) exynos_tmu.c (c8f8f7682e13d219699f6980cd0ba067f06d0dcf)
1/*
2 * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
3 *
4 * Copyright (C) 2014 Samsung Electronics
5 * Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
6 * Lukasz Majewski <l.majewski@samsung.com>
7 *
8 * Copyright (C) 2011 Samsung Electronics

--- 206 unchanged lines hidden (view full) ---

215 u16 temp_error1, temp_error2;
216 u8 gain;
217 u8 reference_voltage;
218 struct regulator *regulator;
219 struct thermal_zone_device *tzd;
220 unsigned int ntrip;
221 bool enabled;
222
1/*
2 * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
3 *
4 * Copyright (C) 2014 Samsung Electronics
5 * Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
6 * Lukasz Majewski <l.majewski@samsung.com>
7 *
8 * Copyright (C) 2011 Samsung Electronics

--- 206 unchanged lines hidden (view full) ---

215 u16 temp_error1, temp_error2;
216 u8 gain;
217 u8 reference_voltage;
218 struct regulator *regulator;
219 struct thermal_zone_device *tzd;
220 unsigned int ntrip;
221 bool enabled;
222
223 void (*tmu_set_trip_temp)(struct exynos_tmu_data *data, int trip,
224 u8 temp);
225 void (*tmu_set_trip_hyst)(struct exynos_tmu_data *data, int trip,
226 u8 temp, u8 hyst);
223 void (*tmu_initialize)(struct platform_device *pdev);
224 void (*tmu_control)(struct platform_device *pdev, bool on);
225 int (*tmu_read)(struct exynos_tmu_data *data);
226 void (*tmu_set_emulation)(struct exynos_tmu_data *data, int temp);
227 void (*tmu_clear_irqs)(struct exynos_tmu_data *data);
228};
229
230static void exynos_report_trigger(struct exynos_tmu_data *p)

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307
308static int exynos_tmu_initialize(struct platform_device *pdev)
309{
310 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
311 struct thermal_zone_device *tzd = data->tzd;
312 const struct thermal_trip * const trips =
313 of_thermal_get_trip_points(tzd);
314 unsigned int status;
227 void (*tmu_initialize)(struct platform_device *pdev);
228 void (*tmu_control)(struct platform_device *pdev, bool on);
229 int (*tmu_read)(struct exynos_tmu_data *data);
230 void (*tmu_set_emulation)(struct exynos_tmu_data *data, int temp);
231 void (*tmu_clear_irqs)(struct exynos_tmu_data *data);
232};
233
234static void exynos_report_trigger(struct exynos_tmu_data *p)

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311
312static int exynos_tmu_initialize(struct platform_device *pdev)
313{
314 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
315 struct thermal_zone_device *tzd = data->tzd;
316 const struct thermal_trip * const trips =
317 of_thermal_get_trip_points(tzd);
318 unsigned int status;
315 int ret = 0, temp;
319 int ret = 0, temp, hyst;
316
317 if (!trips) {
318 dev_err(&pdev->dev,
319 "Cannot get trip points from device tree!\n");
320 return -ENODEV;
321 }
322
323 if (data->soc != SOC_ARCH_EXYNOS5433) /* FIXME */

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340 clk_enable(data->clk);
341 if (!IS_ERR(data->clk_sec))
342 clk_enable(data->clk_sec);
343
344 status = readb(data->base + EXYNOS_TMU_REG_STATUS);
345 if (!status) {
346 ret = -EBUSY;
347 } else {
320
321 if (!trips) {
322 dev_err(&pdev->dev,
323 "Cannot get trip points from device tree!\n");
324 return -ENODEV;
325 }
326
327 if (data->soc != SOC_ARCH_EXYNOS5433) /* FIXME */

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344 clk_enable(data->clk);
345 if (!IS_ERR(data->clk_sec))
346 clk_enable(data->clk_sec);
347
348 status = readb(data->base + EXYNOS_TMU_REG_STATUS);
349 if (!status) {
350 ret = -EBUSY;
351 } else {
352 int i, ntrips =
353 min_t(int, of_thermal_get_ntrips(tzd), data->ntrip);
354
348 data->tmu_initialize(pdev);
355 data->tmu_initialize(pdev);
356
357 /* Write temperature code for rising and falling threshold */
358 for (i = 0; i < ntrips; i++) {
359 /* Write temperature code for rising threshold */
360 tzd->ops->get_trip_temp(tzd, i, &temp);
361 temp /= MCELSIUS;
362 data->tmu_set_trip_temp(data, i, temp);
363
364 /* Write temperature code for falling threshold */
365 tzd->ops->get_trip_hyst(tzd, i, &hyst);
366 hyst /= MCELSIUS;
367 data->tmu_set_trip_hyst(data, i, temp, hyst);
368 }
369
349 data->tmu_clear_irqs(data);
350 }
351
352 clk_disable(data->clk);
353 mutex_unlock(&data->lock);
354 if (!IS_ERR(data->clk_sec))
355 clk_disable(data->clk_sec);
356out:

--- 43 unchanged lines hidden (view full) ---

400 th_code = temp_to_code(data, ref);
401 writeb(th_code, data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
402 }
403
404 temp -= ref;
405 writeb(temp, data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + trip * 4);
406}
407
370 data->tmu_clear_irqs(data);
371 }
372
373 clk_disable(data->clk);
374 mutex_unlock(&data->lock);
375 if (!IS_ERR(data->clk_sec))
376 clk_disable(data->clk_sec);
377out:

--- 43 unchanged lines hidden (view full) ---

421 th_code = temp_to_code(data, ref);
422 writeb(th_code, data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
423 }
424
425 temp -= ref;
426 writeb(temp, data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + trip * 4);
427}
428
429/* failing thresholds are not supported on Exynos4210 */
430static void exynos4210_tmu_set_trip_hyst(struct exynos_tmu_data *data,
431 int trip, u8 temp, u8 hyst)
432{
433}
434
408static void exynos4210_tmu_initialize(struct platform_device *pdev)
409{
410 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
435static void exynos4210_tmu_initialize(struct platform_device *pdev)
436{
437 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
411 struct thermal_zone_device *tz = data->tzd;
412 int i, temp;
413
414 sanitize_temp_error(data, readl(data->base + EXYNOS_TMU_REG_TRIMINFO));
438
439 sanitize_temp_error(data, readl(data->base + EXYNOS_TMU_REG_TRIMINFO));
415
416 for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
417 tz->ops->get_trip_temp(tz, i, &temp);
418 temp /= MCELSIUS;
419 exynos4210_tmu_set_trip_temp(data, i, temp);
420 }
421}
422
423static void exynos4412_tmu_set_trip_temp(struct exynos_tmu_data *data,
424 int trip, u8 temp)
425{
426 u32 th, con;
427
428 th = readl(data->base + EXYNOS_THD_TEMP_RISE);

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447 if (hyst)
448 th |= temp_to_code(data, temp - hyst) << 8 * trip;
449 writel(th, data->base + EXYNOS_THD_TEMP_FALL);
450}
451
452static void exynos4412_tmu_initialize(struct platform_device *pdev)
453{
454 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
440}
441
442static void exynos4412_tmu_set_trip_temp(struct exynos_tmu_data *data,
443 int trip, u8 temp)
444{
445 u32 th, con;
446
447 th = readl(data->base + EXYNOS_THD_TEMP_RISE);

--- 18 unchanged lines hidden (view full) ---

466 if (hyst)
467 th |= temp_to_code(data, temp - hyst) << 8 * trip;
468 writel(th, data->base + EXYNOS_THD_TEMP_FALL);
469}
470
471static void exynos4412_tmu_initialize(struct platform_device *pdev)
472{
473 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
455 struct thermal_zone_device *tz = data->tzd;
456 unsigned int trim_info, ctrl;
474 unsigned int trim_info, ctrl;
457 int i, ntrips = min_t(int, of_thermal_get_ntrips(tz), data->ntrip);
458 int temp, hyst;
459
460 if (data->soc == SOC_ARCH_EXYNOS3250 ||
461 data->soc == SOC_ARCH_EXYNOS4412 ||
462 data->soc == SOC_ARCH_EXYNOS5250) {
463 if (data->soc == SOC_ARCH_EXYNOS3250) {
464 ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON1);
465 ctrl |= EXYNOS_TRIMINFO_RELOAD_ENABLE;
466 writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON1);

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472
473 /* On exynos5420 the triminfo register is in the shared space */
474 if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)
475 trim_info = readl(data->base_second + EXYNOS_TMU_REG_TRIMINFO);
476 else
477 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
478
479 sanitize_temp_error(data, trim_info);
475
476 if (data->soc == SOC_ARCH_EXYNOS3250 ||
477 data->soc == SOC_ARCH_EXYNOS4412 ||
478 data->soc == SOC_ARCH_EXYNOS5250) {
479 if (data->soc == SOC_ARCH_EXYNOS3250) {
480 ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON1);
481 ctrl |= EXYNOS_TRIMINFO_RELOAD_ENABLE;
482 writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON1);

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488
489 /* On exynos5420 the triminfo register is in the shared space */
490 if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)
491 trim_info = readl(data->base_second + EXYNOS_TMU_REG_TRIMINFO);
492 else
493 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
494
495 sanitize_temp_error(data, trim_info);
480
481 /* Write temperature code for rising and falling threshold */
482 for (i = 0; i < ntrips; i++) {
483 tz->ops->get_trip_temp(tz, i, &temp);
484 temp /= MCELSIUS;
485 exynos4412_tmu_set_trip_temp(data, i, temp);
486
487 tz->ops->get_trip_hyst(tz, i, &hyst);
488 hyst /= MCELSIUS;
489 exynos4412_tmu_set_trip_hyst(data, i, temp, hyst);
490 }
491}
492
493static void exynos5433_tmu_set_trip_temp(struct exynos_tmu_data *data,
494 int trip, u8 temp)
495{
496 unsigned int reg_off, j;
497 u32 th;
498

--- 29 unchanged lines hidden (view full) ---

528 th &= ~(0xff << j * 8);
529 th |= (temp_to_code(data, temp - hyst) << j * 8);
530 writel(th, data->base + reg_off);
531}
532
533static void exynos5433_tmu_initialize(struct platform_device *pdev)
534{
535 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
496}
497
498static void exynos5433_tmu_set_trip_temp(struct exynos_tmu_data *data,
499 int trip, u8 temp)
500{
501 unsigned int reg_off, j;
502 u32 th;
503

--- 29 unchanged lines hidden (view full) ---

533 th &= ~(0xff << j * 8);
534 th |= (temp_to_code(data, temp - hyst) << j * 8);
535 writel(th, data->base + reg_off);
536}
537
538static void exynos5433_tmu_initialize(struct platform_device *pdev)
539{
540 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
536 struct thermal_zone_device *tz = data->tzd;
537 unsigned int trim_info;
541 unsigned int trim_info;
538 int sensor_id, cal_type, i, temp, hyst;
542 int sensor_id, cal_type;
539
540 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
541 sanitize_temp_error(data, trim_info);
542
543 /* Read the temperature sensor id */
544 sensor_id = (trim_info & EXYNOS5433_TRIMINFO_SENSOR_ID_MASK)
545 >> EXYNOS5433_TRIMINFO_SENSOR_ID_SHIFT;
546 dev_info(&pdev->dev, "Temperature sensor ID: 0x%x\n", sensor_id);

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557 case EXYNOS5433_TRIMINFO_ONE_POINT_TRIMMING:
558 default:
559 data->cal_type = TYPE_ONE_POINT_TRIMMING;
560 break;
561 }
562
563 dev_info(&pdev->dev, "Calibration type is %d-point calibration\n",
564 cal_type ? 2 : 1);
543
544 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
545 sanitize_temp_error(data, trim_info);
546
547 /* Read the temperature sensor id */
548 sensor_id = (trim_info & EXYNOS5433_TRIMINFO_SENSOR_ID_MASK)
549 >> EXYNOS5433_TRIMINFO_SENSOR_ID_SHIFT;
550 dev_info(&pdev->dev, "Temperature sensor ID: 0x%x\n", sensor_id);

--- 10 unchanged lines hidden (view full) ---

561 case EXYNOS5433_TRIMINFO_ONE_POINT_TRIMMING:
562 default:
563 data->cal_type = TYPE_ONE_POINT_TRIMMING;
564 break;
565 }
566
567 dev_info(&pdev->dev, "Calibration type is %d-point calibration\n",
568 cal_type ? 2 : 1);
565
566 /* Write temperature code for rising and falling threshold */
567 for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
568 /* Write temperature code for rising threshold */
569 tz->ops->get_trip_temp(tz, i, &temp);
570 temp /= MCELSIUS;
571 exynos5433_tmu_set_trip_temp(data, i, temp);
572
573 /* Write temperature code for falling threshold */
574 tz->ops->get_trip_hyst(tz, i, &hyst);
575 hyst /= MCELSIUS;
576 exynos5433_tmu_set_trip_hyst(data, i, temp, hyst);
577 }
578}
579
580static void exynos7_tmu_set_trip_temp(struct exynos_tmu_data *data,
581 int trip, u8 temp)
582{
583 unsigned int reg_off, bit_off;
584 u32 th;
585

--- 19 unchanged lines hidden (view full) ---

605 th &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off));
606 th |= temp_to_code(data, temp - hyst) << (16 * bit_off);
607 writel(th, data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
608}
609
610static void exynos7_tmu_initialize(struct platform_device *pdev)
611{
612 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
569}
570
571static void exynos7_tmu_set_trip_temp(struct exynos_tmu_data *data,
572 int trip, u8 temp)
573{
574 unsigned int reg_off, bit_off;
575 u32 th;
576

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596 th &= ~(EXYNOS7_TMU_TEMP_MASK << (16 * bit_off));
597 th |= temp_to_code(data, temp - hyst) << (16 * bit_off);
598 writel(th, data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
599}
600
601static void exynos7_tmu_initialize(struct platform_device *pdev)
602{
603 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
613 struct thermal_zone_device *tz = data->tzd;
614 unsigned int trim_info;
604 unsigned int trim_info;
615 int i, temp, hyst;
616
617 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
618 sanitize_temp_error(data, trim_info);
605
606 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
607 sanitize_temp_error(data, trim_info);
619
620 /* Write temperature code for rising and falling threshold */
621 for (i = 0; i < of_thermal_get_ntrips(tz); i++) {
622 tz->ops->get_trip_temp(tz, i, &temp);
623 temp /= MCELSIUS;
624 exynos7_tmu_set_trip_temp(data, i, temp);
625
626 tz->ops->get_trip_hyst(tz, i, &hyst);
627 hyst /= MCELSIUS;
628 exynos7_tmu_set_trip_hyst(data, i, temp, hyst);
629 }
630}
631
632static void exynos4210_tmu_control(struct platform_device *pdev, bool on)
633{
634 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
635 struct thermal_zone_device *tz = data->tzd;
636 unsigned int con, interrupt_en;
637

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984 dev_err(&pdev->dev, "Failed to ioremap memory\n");
985 return -EADDRNOTAVAIL;
986 }
987
988 data->soc = (enum soc_type)of_device_get_match_data(&pdev->dev);
989
990 switch (data->soc) {
991 case SOC_ARCH_EXYNOS4210:
608}
609
610static void exynos4210_tmu_control(struct platform_device *pdev, bool on)
611{
612 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
613 struct thermal_zone_device *tz = data->tzd;
614 unsigned int con, interrupt_en;
615

--- 346 unchanged lines hidden (view full) ---

962 dev_err(&pdev->dev, "Failed to ioremap memory\n");
963 return -EADDRNOTAVAIL;
964 }
965
966 data->soc = (enum soc_type)of_device_get_match_data(&pdev->dev);
967
968 switch (data->soc) {
969 case SOC_ARCH_EXYNOS4210:
970 data->tmu_set_trip_temp = exynos4210_tmu_set_trip_temp;
971 data->tmu_set_trip_hyst = exynos4210_tmu_set_trip_hyst;
992 data->tmu_initialize = exynos4210_tmu_initialize;
993 data->tmu_control = exynos4210_tmu_control;
994 data->tmu_read = exynos4210_tmu_read;
995 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
996 data->ntrip = 4;
997 data->gain = 15;
998 data->reference_voltage = 7;
999 data->efuse_value = 55;
1000 data->min_efuse_value = 40;
1001 data->max_efuse_value = 100;
1002 break;
1003 case SOC_ARCH_EXYNOS3250:
1004 case SOC_ARCH_EXYNOS4412:
1005 case SOC_ARCH_EXYNOS5250:
1006 case SOC_ARCH_EXYNOS5260:
1007 case SOC_ARCH_EXYNOS5420:
1008 case SOC_ARCH_EXYNOS5420_TRIMINFO:
972 data->tmu_initialize = exynos4210_tmu_initialize;
973 data->tmu_control = exynos4210_tmu_control;
974 data->tmu_read = exynos4210_tmu_read;
975 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
976 data->ntrip = 4;
977 data->gain = 15;
978 data->reference_voltage = 7;
979 data->efuse_value = 55;
980 data->min_efuse_value = 40;
981 data->max_efuse_value = 100;
982 break;
983 case SOC_ARCH_EXYNOS3250:
984 case SOC_ARCH_EXYNOS4412:
985 case SOC_ARCH_EXYNOS5250:
986 case SOC_ARCH_EXYNOS5260:
987 case SOC_ARCH_EXYNOS5420:
988 case SOC_ARCH_EXYNOS5420_TRIMINFO:
989 data->tmu_set_trip_temp = exynos4412_tmu_set_trip_temp;
990 data->tmu_set_trip_hyst = exynos4412_tmu_set_trip_hyst;
1009 data->tmu_initialize = exynos4412_tmu_initialize;
1010 data->tmu_control = exynos4210_tmu_control;
1011 data->tmu_read = exynos4412_tmu_read;
1012 data->tmu_set_emulation = exynos4412_tmu_set_emulation;
1013 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
1014 data->ntrip = 4;
1015 data->gain = 8;
1016 data->reference_voltage = 16;
1017 data->efuse_value = 55;
1018 if (data->soc != SOC_ARCH_EXYNOS5420 &&
1019 data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO)
1020 data->min_efuse_value = 40;
1021 else
1022 data->min_efuse_value = 0;
1023 data->max_efuse_value = 100;
1024 break;
1025 case SOC_ARCH_EXYNOS5433:
991 data->tmu_initialize = exynos4412_tmu_initialize;
992 data->tmu_control = exynos4210_tmu_control;
993 data->tmu_read = exynos4412_tmu_read;
994 data->tmu_set_emulation = exynos4412_tmu_set_emulation;
995 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
996 data->ntrip = 4;
997 data->gain = 8;
998 data->reference_voltage = 16;
999 data->efuse_value = 55;
1000 if (data->soc != SOC_ARCH_EXYNOS5420 &&
1001 data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO)
1002 data->min_efuse_value = 40;
1003 else
1004 data->min_efuse_value = 0;
1005 data->max_efuse_value = 100;
1006 break;
1007 case SOC_ARCH_EXYNOS5433:
1008 data->tmu_set_trip_temp = exynos5433_tmu_set_trip_temp;
1009 data->tmu_set_trip_hyst = exynos5433_tmu_set_trip_hyst;
1026 data->tmu_initialize = exynos5433_tmu_initialize;
1027 data->tmu_control = exynos5433_tmu_control;
1028 data->tmu_read = exynos4412_tmu_read;
1029 data->tmu_set_emulation = exynos4412_tmu_set_emulation;
1030 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
1031 data->ntrip = 8;
1032 data->gain = 8;
1033 if (res.start == EXYNOS5433_G3D_BASE)
1034 data->reference_voltage = 23;
1035 else
1036 data->reference_voltage = 16;
1037 data->efuse_value = 75;
1038 data->min_efuse_value = 40;
1039 data->max_efuse_value = 150;
1040 break;
1041 case SOC_ARCH_EXYNOS7:
1010 data->tmu_initialize = exynos5433_tmu_initialize;
1011 data->tmu_control = exynos5433_tmu_control;
1012 data->tmu_read = exynos4412_tmu_read;
1013 data->tmu_set_emulation = exynos4412_tmu_set_emulation;
1014 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
1015 data->ntrip = 8;
1016 data->gain = 8;
1017 if (res.start == EXYNOS5433_G3D_BASE)
1018 data->reference_voltage = 23;
1019 else
1020 data->reference_voltage = 16;
1021 data->efuse_value = 75;
1022 data->min_efuse_value = 40;
1023 data->max_efuse_value = 150;
1024 break;
1025 case SOC_ARCH_EXYNOS7:
1026 data->tmu_set_trip_temp = exynos7_tmu_set_trip_temp;
1027 data->tmu_set_trip_hyst = exynos7_tmu_set_trip_hyst;
1042 data->tmu_initialize = exynos7_tmu_initialize;
1043 data->tmu_control = exynos7_tmu_control;
1044 data->tmu_read = exynos7_tmu_read;
1045 data->tmu_set_emulation = exynos4412_tmu_set_emulation;
1046 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
1047 data->ntrip = 8;
1048 data->gain = 9;
1049 data->reference_voltage = 17;

--- 226 unchanged lines hidden --- 		1028 data->tmu_initialize = exynos7_tmu_initialize;
1029 data->tmu_control = exynos7_tmu_control;
1030 data->tmu_read = exynos7_tmu_read;
1031 data->tmu_set_emulation = exynos4412_tmu_set_emulation;
1032 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
1033 data->ntrip = 8;
1034 data->gain = 9;
1035 data->reference_voltage = 17;

--- 226 unchanged lines hidden ---