| Kconfig (c969afb4e55a2c6eec7c4195f67c5227be991393) | Kconfig (e789e61f9e852a4cc31042810b34552f6de667b2) |
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| 1# SPDX-License-Identifier: GPL-2.0 2# Intel pin control drivers 3 4if (X86 || COMPILE_TEST) 5 6config PINCTRL_BAYTRAIL 7 bool "Intel Baytrail GPIO pin control" 8 depends on ACPI --- 41 unchanged lines hidden (view full) --- 50config PINCTRL_INTEL 51 tristate 52 select PINMUX 53 select PINCONF 54 select GENERIC_PINCONF 55 select GPIOLIB 56 select GPIOLIB_IRQCHIP 57 | 1# SPDX-License-Identifier: GPL-2.0 2# Intel pin control drivers 3 4if (X86 || COMPILE_TEST) 5 6config PINCTRL_BAYTRAIL 7 bool "Intel Baytrail GPIO pin control" 8 depends on ACPI --- 41 unchanged lines hidden (view full) --- 50config PINCTRL_INTEL 51 tristate 52 select PINMUX 53 select PINCONF 54 select GENERIC_PINCONF 55 select GPIOLIB 56 select GPIOLIB_IRQCHIP 57 |
| 58config PINCTRL_ALDERLAKE 59 tristate "Intel Alder Lake pinctrl and GPIO driver" 60 depends on ACPI 61 select PINCTRL_INTEL 62 help 63 This pinctrl driver provides an interface that allows configuring 64 of Intel Alder Lake PCH pins and using them as GPIOs. 65 |
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| 58config PINCTRL_BROXTON 59 tristate "Intel Broxton pinctrl and GPIO driver" 60 depends on ACPI 61 select PINCTRL_INTEL 62 help 63 Broxton pinctrl driver provides an interface that allows 64 configuring of SoC pins and using them as GPIOs. 65 --- 98 unchanged lines hidden --- | 66config PINCTRL_BROXTON 67 tristate "Intel Broxton pinctrl and GPIO driver" 68 depends on ACPI 69 select PINCTRL_INTEL 70 help 71 Broxton pinctrl driver provides an interface that allows 72 configuring of SoC pins and using them as GPIOs. 73 --- 98 unchanged lines hidden --- |