Kconfig (5fae8b86fdf083bc43bf759abad6661be9d0b9ac) | Kconfig (6e08d6bbebebcf70f982d7190c4b6dc456cedd57) |
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1# 2# Intel pin control drivers 3# 4 5config PINCTRL_BAYTRAIL 6 bool "Intel Baytrail GPIO pin control" 7 depends on GPIOLIB && ACPI 8 select GPIOLIB_IRQCHIP 9 help 10 driver for memory mapped GPIO functionality on Intel Baytrail 11 platforms. Supports 3 banks with 102, 28 and 44 gpios. 12 Most pins are usually muxed to some other functionality by firmware, 13 so only a small amount is available for gpio use. 14 15 Requires ACPI device enumeration code to set up a platform device. | 1# 2# Intel pin control drivers 3# 4 5config PINCTRL_BAYTRAIL 6 bool "Intel Baytrail GPIO pin control" 7 depends on GPIOLIB && ACPI 8 select GPIOLIB_IRQCHIP 9 help 10 driver for memory mapped GPIO functionality on Intel Baytrail 11 platforms. Supports 3 banks with 102, 28 and 44 gpios. 12 Most pins are usually muxed to some other functionality by firmware, 13 so only a small amount is available for gpio use. 14 15 Requires ACPI device enumeration code to set up a platform device. |
16 17config PINCTRL_CHERRYVIEW 18 tristate "Intel Cherryview/Braswell pinctrl and GPIO driver" 19 depends on ACPI 20 select PINMUX 21 select PINCONF 22 select GENERIC_PINCONF 23 select GPIOLIB 24 select GPIOLIB_IRQCHIP 25 help 26 Cherryview/Braswell pinctrl driver provides an interface that 27 allows configuring of SoC pins and using them as GPIOs. |
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