| Kconfig (14e77332e74603efab8347c89d3cda447c3b97c9) | Kconfig (b14ef61314b37a4a720a1f5686627d5061387480) |
|---|---|
| 1# SPDX-License-Identifier: GPL-2.0 2# Intel pin control drivers 3menu "Intel pinctrl drivers" 4 depends on X86 || COMPILE_TEST 5 6config PINCTRL_BAYTRAIL 7 bool "Intel Baytrail GPIO pin control" 8 depends on ACPI --- 33 unchanged lines hidden (view full) --- 42 select PINMUX 43 select PINCONF 44 select GENERIC_PINCONF 45 help 46 Merrifield Family-Level Interface Shim (FLIS) driver provides an 47 interface that allows configuring of SoC pins and using them as 48 GPIOs. 49 | 1# SPDX-License-Identifier: GPL-2.0 2# Intel pin control drivers 3menu "Intel pinctrl drivers" 4 depends on X86 || COMPILE_TEST 5 6config PINCTRL_BAYTRAIL 7 bool "Intel Baytrail GPIO pin control" 8 depends on ACPI --- 33 unchanged lines hidden (view full) --- 42 select PINMUX 43 select PINCONF 44 select GENERIC_PINCONF 45 help 46 Merrifield Family-Level Interface Shim (FLIS) driver provides an 47 interface that allows configuring of SoC pins and using them as 48 GPIOs. 49 |
| 50config PINCTRL_MOOREFIELD 51 tristate "Intel Moorefield pinctrl driver" 52 depends on X86_INTEL_MID 53 select PINMUX 54 select PINCONF 55 select GENERIC_PINCONF 56 help 57 Moorefield Family-Level Interface Shim (FLIS) driver provides an 58 interface that allows configuring of SoC pins and using them as 59 GPIOs. 60 |
|
| 50config PINCTRL_INTEL 51 tristate 52 select PINMUX 53 select PINCONF 54 select GENERIC_PINCONF 55 select GPIOLIB 56 select GPIOLIB_IRQCHIP 57 --- 122 unchanged lines hidden --- | 61config PINCTRL_INTEL 62 tristate 63 select PINMUX 64 select PINCONF 65 select GENERIC_PINCONF 66 select GPIOLIB 67 select GPIOLIB_IRQCHIP 68 --- 122 unchanged lines hidden --- |