| Kconfig (023265ed75d8792ca1d555430a8985511d3f8788) | Kconfig (eb83479e18999e34b3b800f54aa31137f7f41c33) |
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| 1# SPDX-License-Identifier: GPL-2.0 2# Intel pin control drivers 3 4if (X86 || COMPILE_TEST) 5 6config PINCTRL_BAYTRAIL 7 bool "Intel Baytrail GPIO pin control" 8 depends on ACPI --- 17 unchanged lines hidden (view full) --- 26 select PINCONF 27 select GENERIC_PINCONF 28 select GPIOLIB 29 select GPIOLIB_IRQCHIP 30 help 31 Cherryview/Braswell pinctrl driver provides an interface that 32 allows configuring of SoC pins and using them as GPIOs. 33 | 1# SPDX-License-Identifier: GPL-2.0 2# Intel pin control drivers 3 4if (X86 || COMPILE_TEST) 5 6config PINCTRL_BAYTRAIL 7 bool "Intel Baytrail GPIO pin control" 8 depends on ACPI --- 17 unchanged lines hidden (view full) --- 26 select PINCONF 27 select GENERIC_PINCONF 28 select GPIOLIB 29 select GPIOLIB_IRQCHIP 30 help 31 Cherryview/Braswell pinctrl driver provides an interface that 32 allows configuring of SoC pins and using them as GPIOs. 33 |
| 34config PINCTRL_LYNXPOINT 35 tristate "Intel Lynxpoint pinctrl and GPIO driver" 36 depends on ACPI 37 select GPIOLIB 38 select GPIOLIB_IRQCHIP 39 help 40 Lynxpoint is the PCH of Intel Haswell. This pinctrl driver 41 provides an interface that allows configuring of PCH pins and 42 using them as GPIOs. 43 |
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| 34config PINCTRL_MERRIFIELD 35 tristate "Intel Merrifield pinctrl driver" 36 depends on X86_INTEL_MID 37 select PINMUX 38 select PINCONF 39 select GENERIC_PINCONF 40 help 41 Merrifield Family-Level Interface Shim (FLIS) driver provides an --- 84 unchanged lines hidden --- | 44config PINCTRL_MERRIFIELD 45 tristate "Intel Merrifield pinctrl driver" 46 depends on X86_INTEL_MID 47 select PINMUX 48 select PINCONF 49 select GENERIC_PINCONF 50 help 51 Merrifield Family-Level Interface Shim (FLIS) driver provides an --- 84 unchanged lines hidden --- |