xmit.c (dd0a11815a339d6deeea8357574f8126a8404c92) | xmit.c (ef6b19e40f525777a0052956bf7d9a1985f74993) |
---|---|
1/* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES --- 1227 unchanged lines hidden (view full) --- 1236 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1237 struct ath_frame_info *fi = get_frame_info(skb); 1238 bool aggr = !!(bf->bf_state.bf_type & BUF_AGGR); 1239 1240 info.type = get_hw_packet_type(skb); 1241 if (bf->bf_next) 1242 info.link = bf->bf_next->bf_daddr; 1243 else | 1/* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES --- 1227 unchanged lines hidden (view full) --- 1236 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1237 struct ath_frame_info *fi = get_frame_info(skb); 1238 bool aggr = !!(bf->bf_state.bf_type & BUF_AGGR); 1239 1240 info.type = get_hw_packet_type(skb); 1241 if (bf->bf_next) 1242 info.link = bf->bf_next->bf_daddr; 1243 else |
1244 info.link = 0; | 1244 info.link = (sc->tx99_state) ? bf->bf_daddr : 0; |
1245 1246 if (!bf_first) { 1247 bf_first = bf; 1248 | 1245 1246 if (!bf_first) { 1247 bf_first = bf; 1248 |
1249 info.flags = ATH9K_TXDESC_INTREQ; | 1249 if (!sc->tx99_state) 1250 info.flags = ATH9K_TXDESC_INTREQ; |
1250 if ((tx_info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT) || 1251 txq == sc->tx.uapsdq) 1252 info.flags |= ATH9K_TXDESC_CLRDMASK; 1253 1254 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) 1255 info.flags |= ATH9K_TXDESC_NOACK; 1256 if (tx_info->flags & IEEE80211_TX_CTL_LDPC) 1257 info.flags |= ATH9K_TXDESC_LDPC; --- 441 unchanged lines hidden (view full) --- 1699 1700int ath_cabq_update(struct ath_softc *sc) 1701{ 1702 struct ath9k_tx_queue_info qi; 1703 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf; 1704 int qnum = sc->beacon.cabq->axq_qnum; 1705 1706 ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi); | 1251 if ((tx_info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT) || 1252 txq == sc->tx.uapsdq) 1253 info.flags |= ATH9K_TXDESC_CLRDMASK; 1254 1255 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) 1256 info.flags |= ATH9K_TXDESC_NOACK; 1257 if (tx_info->flags & IEEE80211_TX_CTL_LDPC) 1258 info.flags |= ATH9K_TXDESC_LDPC; --- 441 unchanged lines hidden (view full) --- 1700 1701int ath_cabq_update(struct ath_softc *sc) 1702{ 1703 struct ath9k_tx_queue_info qi; 1704 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf; 1705 int qnum = sc->beacon.cabq->axq_qnum; 1706 1707 ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi); |
1707 /* 1708 * Ensure the readytime % is within the bounds. 1709 */ 1710 if (sc->config.cabqReadytime < ATH9K_READY_TIME_LO_BOUND) 1711 sc->config.cabqReadytime = ATH9K_READY_TIME_LO_BOUND; 1712 else if (sc->config.cabqReadytime > ATH9K_READY_TIME_HI_BOUND) 1713 sc->config.cabqReadytime = ATH9K_READY_TIME_HI_BOUND; | |
1714 1715 qi.tqi_readyTime = (cur_conf->beacon_interval * | 1708 1709 qi.tqi_readyTime = (cur_conf->beacon_interval * |
1716 sc->config.cabqReadytime) / 100; | 1710 ATH_CABQ_READY_TIME) / 100; |
1717 ath_txq_update(sc, qnum, &qi); 1718 1719 return 0; 1720} 1721 1722static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq, 1723 struct list_head *list) 1724{ --- 218 unchanged lines hidden (view full) --- 1943 1944 if (puttxbuf) { 1945 TX_STAT_INC(txq->axq_qnum, puttxbuf); 1946 ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr); 1947 ath_dbg(common, XMIT, "TXDP[%u] = %llx (%p)\n", 1948 txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc); 1949 } 1950 | 1711 ath_txq_update(sc, qnum, &qi); 1712 1713 return 0; 1714} 1715 1716static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq, 1717 struct list_head *list) 1718{ --- 218 unchanged lines hidden (view full) --- 1937 1938 if (puttxbuf) { 1939 TX_STAT_INC(txq->axq_qnum, puttxbuf); 1940 ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr); 1941 ath_dbg(common, XMIT, "TXDP[%u] = %llx (%p)\n", 1942 txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc); 1943 } 1944 |
1951 if (!edma) { | 1945 if (!edma || sc->tx99_state) { |
1952 TX_STAT_INC(txq->axq_qnum, txstart); 1953 ath9k_hw_txstart(ah, txq->axq_qnum); 1954 } 1955 1956 if (!internal) { 1957 while (bf) { 1958 txq->axq_depth++; 1959 if (bf_is_ampdu_not_probing(bf)) --- 62 unchanged lines hidden (view full) --- 2022 if (hw_key) 2023 fi->keyix = hw_key->hw_key_idx; 2024 else if (an && ieee80211_is_data(hdr->frame_control) && an->ps_key > 0) 2025 fi->keyix = an->ps_key; 2026 else 2027 fi->keyix = ATH9K_TXKEYIX_INVALID; 2028 fi->keytype = keytype; 2029 fi->framelen = framelen; | 1946 TX_STAT_INC(txq->axq_qnum, txstart); 1947 ath9k_hw_txstart(ah, txq->axq_qnum); 1948 } 1949 1950 if (!internal) { 1951 while (bf) { 1952 txq->axq_depth++; 1953 if (bf_is_ampdu_not_probing(bf)) --- 62 unchanged lines hidden (view full) --- 2016 if (hw_key) 2017 fi->keyix = hw_key->hw_key_idx; 2018 else if (an && ieee80211_is_data(hdr->frame_control) && an->ps_key > 0) 2019 fi->keyix = an->ps_key; 2020 else 2021 fi->keyix = ATH9K_TXKEYIX_INVALID; 2022 fi->keytype = keytype; 2023 fi->framelen = framelen; |
2024 2025 if (!rate) 2026 return; |
|
2030 fi->rtscts_rate = rate->hw_value; 2031 if (short_preamble) 2032 fi->rtscts_rate |= rate->hw_value_short; 2033} 2034 2035u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate) 2036{ 2037 struct ath_hw *ah = sc->sc_ah; 2038 struct ath9k_channel *curchan = ah->curchan; 2039 | 2027 fi->rtscts_rate = rate->hw_value; 2028 if (short_preamble) 2029 fi->rtscts_rate |= rate->hw_value_short; 2030} 2031 2032u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate) 2033{ 2034 struct ath_hw *ah = sc->sc_ah; 2035 struct ath9k_channel *curchan = ah->curchan; 2036 |
2040 if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && 2041 (curchan->channelFlags & CHANNEL_5GHZ) && | 2037 if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && IS_CHAN_5GHZ(curchan) && |
2042 (chainmask == 0x7) && (rate < 0x90)) 2043 return 0x3; 2044 else if (AR_SREV_9462(ah) && ath9k_hw_btcoex_is_enabled(ah) && 2045 IS_CCK_RATE(rate)) 2046 return 0x2; 2047 else 2048 return chainmask; 2049} --- 274 unchanged lines hidden (view full) --- 2324 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 2325 struct ieee80211_hdr * hdr = (struct ieee80211_hdr *)skb->data; 2326 int padpos, padsize; 2327 unsigned long flags; 2328 2329 ath_dbg(common, XMIT, "TX complete: skb: %p\n", skb); 2330 2331 if (sc->sc_ah->caldata) | 2038 (chainmask == 0x7) && (rate < 0x90)) 2039 return 0x3; 2040 else if (AR_SREV_9462(ah) && ath9k_hw_btcoex_is_enabled(ah) && 2041 IS_CCK_RATE(rate)) 2042 return 0x2; 2043 else 2044 return chainmask; 2045} --- 274 unchanged lines hidden (view full) --- 2320 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 2321 struct ieee80211_hdr * hdr = (struct ieee80211_hdr *)skb->data; 2322 int padpos, padsize; 2323 unsigned long flags; 2324 2325 ath_dbg(common, XMIT, "TX complete: skb: %p\n", skb); 2326 2327 if (sc->sc_ah->caldata) |
2332 sc->sc_ah->caldata->paprd_packet_sent = true; | 2328 set_bit(PAPRD_PACKET_SENT, &sc->sc_ah->caldata->cal_flags); |
2333 2334 if (!(tx_flags & ATH_TX_ERROR)) 2335 /* Frame was ACKed */ 2336 tx_info->flags |= IEEE80211_TX_STAT_ACK; 2337 2338 padpos = ieee80211_hdrlen(hdr->frame_control); 2339 padsize = padpos & 3; 2340 if (padsize && skb->len>padpos+padsize) { --- 33 unchanged lines hidden (view full) --- 2374 if (!txok) 2375 tx_flags |= ATH_TX_ERROR; 2376 2377 if (ts->ts_status & ATH9K_TXERR_FILT) 2378 tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED; 2379 2380 dma_unmap_single(sc->dev, bf->bf_buf_addr, skb->len, DMA_TO_DEVICE); 2381 bf->bf_buf_addr = 0; | 2329 2330 if (!(tx_flags & ATH_TX_ERROR)) 2331 /* Frame was ACKed */ 2332 tx_info->flags |= IEEE80211_TX_STAT_ACK; 2333 2334 padpos = ieee80211_hdrlen(hdr->frame_control); 2335 padsize = padpos & 3; 2336 if (padsize && skb->len>padpos+padsize) { --- 33 unchanged lines hidden (view full) --- 2370 if (!txok) 2371 tx_flags |= ATH_TX_ERROR; 2372 2373 if (ts->ts_status & ATH9K_TXERR_FILT) 2374 tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED; 2375 2376 dma_unmap_single(sc->dev, bf->bf_buf_addr, skb->len, DMA_TO_DEVICE); 2377 bf->bf_buf_addr = 0; |
2378 if (sc->tx99_state) 2379 goto skip_tx_complete; |
|
2382 2383 if (bf->bf_state.bfs_paprd) { 2384 if (time_after(jiffies, 2385 bf->bf_state.bfs_paprd_timestamp + 2386 msecs_to_jiffies(ATH_PAPRD_TIMEOUT))) 2387 dev_kfree_skb_any(skb); 2388 else 2389 complete(&sc->paprd_complete); 2390 } else { 2391 ath_debug_stat_tx(sc, bf, ts, txq, tx_flags); 2392 ath_tx_complete(sc, skb, tx_flags, txq); 2393 } | 2380 2381 if (bf->bf_state.bfs_paprd) { 2382 if (time_after(jiffies, 2383 bf->bf_state.bfs_paprd_timestamp + 2384 msecs_to_jiffies(ATH_PAPRD_TIMEOUT))) 2385 dev_kfree_skb_any(skb); 2386 else 2387 complete(&sc->paprd_complete); 2388 } else { 2389 ath_debug_stat_tx(sc, bf, ts, txq, tx_flags); 2390 ath_tx_complete(sc, skb, tx_flags, txq); 2391 } |
2392skip_tx_complete: |
|
2394 /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't 2395 * accidentally reference it later. 2396 */ 2397 bf->bf_mpdu = NULL; 2398 2399 /* 2400 * Return the list of ath_buf of this mpdu to free queue 2401 */ --- 342 unchanged lines hidden (view full) --- 2744 } 2745 2746 ath_tid_drain(sc, txq, tid); 2747 tid->active = false; 2748 2749 ath_txq_unlock(sc, txq); 2750 } 2751} | 2393 /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't 2394 * accidentally reference it later. 2395 */ 2396 bf->bf_mpdu = NULL; 2397 2398 /* 2399 * Return the list of ath_buf of this mpdu to free queue 2400 */ --- 342 unchanged lines hidden (view full) --- 2743 } 2744 2745 ath_tid_drain(sc, txq, tid); 2746 tid->active = false; 2747 2748 ath_txq_unlock(sc, txq); 2749 } 2750} |
2751 2752#ifdef CONFIG_ATH9K_TX99 2753 2754int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb, 2755 struct ath_tx_control *txctl) 2756{ 2757 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 2758 struct ath_frame_info *fi = get_frame_info(skb); 2759 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 2760 struct ath_buf *bf; 2761 int padpos, padsize; 2762 2763 padpos = ieee80211_hdrlen(hdr->frame_control); 2764 padsize = padpos & 3; 2765 2766 if (padsize && skb->len > padpos) { 2767 if (skb_headroom(skb) < padsize) { 2768 ath_dbg(common, XMIT, 2769 "tx99 padding failed\n"); 2770 return -EINVAL; 2771 } 2772 2773 skb_push(skb, padsize); 2774 memmove(skb->data, skb->data + padsize, padpos); 2775 } 2776 2777 fi->keyix = ATH9K_TXKEYIX_INVALID; 2778 fi->framelen = skb->len + FCS_LEN; 2779 fi->keytype = ATH9K_KEY_TYPE_CLEAR; 2780 2781 bf = ath_tx_setup_buffer(sc, txctl->txq, NULL, skb); 2782 if (!bf) { 2783 ath_dbg(common, XMIT, "tx99 buffer setup failed\n"); 2784 return -EINVAL; 2785 } 2786 2787 ath_set_rates(sc->tx99_vif, NULL, bf); 2788 2789 ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, bf->bf_daddr); 2790 ath9k_hw_tx99_start(sc->sc_ah, txctl->txq->axq_qnum); 2791 2792 ath_tx_send_normal(sc, txctl->txq, NULL, skb); 2793 2794 return 0; 2795} 2796 2797#endif /* CONFIG_ATH9K_TX99 */ |
|