Kconfig (db985cbd67c45f875ef43cb5febfaa8cbd203c27) | Kconfig (8598066cddd186809c4edf5aae5f018c00079e8c) |
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1config IRQCHIP 2 def_bool y 3 depends on OF_IRQ 4 5config ARM_GIC 6 bool 7 select IRQ_DOMAIN 8 select MULTI_IRQ_HANDLER --- 61 unchanged lines hidden (view full) --- 70 select MULTI_IRQ_HANDLER 71 select SPARSE_IRQ 72 default y 73 74config OR1K_PIC 75 bool 76 select IRQ_DOMAIN 77 | 1config IRQCHIP 2 def_bool y 3 depends on OF_IRQ 4 5config ARM_GIC 6 bool 7 select IRQ_DOMAIN 8 select MULTI_IRQ_HANDLER --- 61 unchanged lines hidden (view full) --- 70 select MULTI_IRQ_HANDLER 71 select SPARSE_IRQ 72 default y 73 74config OR1K_PIC 75 bool 76 select IRQ_DOMAIN 77 |
78config OMAP_IRQCHIP 79 bool 80 select GENERIC_IRQ_CHIP 81 select IRQ_DOMAIN 82 |
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78config ORION_IRQCHIP 79 bool 80 select IRQ_DOMAIN 81 select MULTI_IRQ_HANDLER 82 83config RENESAS_INTC_IRQPIN 84 bool 85 select IRQ_DOMAIN --- 22 unchanged lines hidden (view full) --- 108 109config IRQ_CROSSBAR 110 bool 111 help 112 Support for a CROSSBAR ip that preceeds the main interrupt controller. 113 The primary irqchip invokes the crossbar's callback which inturn allocates 114 a free irq and configures the IP. Thus the peripheral interrupts are 115 routed to one of the free irqchip interrupt lines. | 83config ORION_IRQCHIP 84 bool 85 select IRQ_DOMAIN 86 select MULTI_IRQ_HANDLER 87 88config RENESAS_INTC_IRQPIN 89 bool 90 select IRQ_DOMAIN --- 22 unchanged lines hidden (view full) --- 113 114config IRQ_CROSSBAR 115 bool 116 help 117 Support for a CROSSBAR ip that preceeds the main interrupt controller. 118 The primary irqchip invokes the crossbar's callback which inturn allocates 119 a free irq and configures the IP. Thus the peripheral interrupts are 120 routed to one of the free irqchip interrupt lines. |
116 117config KEYSTONE_IRQ 118 tristate "Keystone 2 IRQ controller IP" 119 depends on ARCH_KEYSTONE 120 help 121 Support for Texas Instruments Keystone 2 IRQ controller IP which 122 is part of the Keystone 2 IPC mechanism | |