dc.c (aacdf19849734d1be5e407932228ae101ba5b92f) | dc.c (7e3c53a096a9e75b12e69f93ef1fbc7cb1b27297) |
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1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2012 Avionic Design GmbH 4 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. 5 */ 6 7#include <linux/clk.h> 8#include <linux/debugfs.h> --- 703 unchanged lines hidden (view full) --- 712 window.zpos = plane->state->normalized_zpos; 713 window.tiling = state->tiling; 714 window.format = state->format; 715 window.swap = state->swap; 716 717 for (i = 0; i < fb->format->num_planes; i++) { 718 struct tegra_bo *bo = tegra_fb_get_plane(fb, i); 719 | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2012 Avionic Design GmbH 4 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. 5 */ 6 7#include <linux/clk.h> 8#include <linux/debugfs.h> --- 703 unchanged lines hidden (view full) --- 712 window.zpos = plane->state->normalized_zpos; 713 window.tiling = state->tiling; 714 window.format = state->format; 715 window.swap = state->swap; 716 717 for (i = 0; i < fb->format->num_planes; i++) { 718 struct tegra_bo *bo = tegra_fb_get_plane(fb, i); 719 |
720 window.base[i] = bo->paddr + fb->offsets[i]; | 720 window.base[i] = bo->iova + fb->offsets[i]; |
721 722 /* 723 * Tegra uses a shared stride for UV planes. Framebuffers are 724 * already checked for this in the tegra_plane_atomic_check() 725 * function, so it's safe to ignore the V-plane pitch here. 726 */ 727 if (i < 2) 728 window.stride[i] = fb->pitches[i]; --- 135 unchanged lines hidden (view full) --- 864 break; 865 866 default: 867 WARN(1, "cursor size %ux%u not supported\n", state->crtc_w, 868 state->crtc_h); 869 return; 870 } 871 | 721 722 /* 723 * Tegra uses a shared stride for UV planes. Framebuffers are 724 * already checked for this in the tegra_plane_atomic_check() 725 * function, so it's safe to ignore the V-plane pitch here. 726 */ 727 if (i < 2) 728 window.stride[i] = fb->pitches[i]; --- 135 unchanged lines hidden (view full) --- 864 break; 865 866 default: 867 WARN(1, "cursor size %ux%u not supported\n", state->crtc_w, 868 state->crtc_h); 869 return; 870 } 871 |
872 value |= (bo->paddr >> 10) & 0x3fffff; | 872 value |= (bo->iova >> 10) & 0x3fffff; |
873 tegra_dc_writel(dc, value, DC_DISP_CURSOR_START_ADDR); 874 875#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT | 873 tegra_dc_writel(dc, value, DC_DISP_CURSOR_START_ADDR); 874 875#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT |
876 value = (bo->paddr >> 32) & 0x3; | 876 value = (bo->iova >> 32) & 0x3; |
877 tegra_dc_writel(dc, value, DC_DISP_CURSOR_START_ADDR_HI); 878#endif 879 880 /* enable cursor and set blend mode */ 881 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); 882 value |= CURSOR_ENABLE; 883 tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS); 884 --- 1714 unchanged lines hidden --- | 877 tegra_dc_writel(dc, value, DC_DISP_CURSOR_START_ADDR_HI); 878#endif 879 880 /* enable cursor and set blend mode */ 881 value = tegra_dc_readl(dc, DC_DISP_DISP_WIN_OPTIONS); 882 value |= CURSOR_ENABLE; 883 tegra_dc_writel(dc, value, DC_DISP_DISP_WIN_OPTIONS); 884 --- 1714 unchanged lines hidden --- |