handlers.c (6a4500c7b83f9e4470dd20cf89f691abd132d090) handlers.c (b01739fb865a268aec617f6bb5d2ef498da72697)
1/*
2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

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698 u32 data;
699
700 write_vreg(vgpu, offset, p_data, bytes);
701 data = vgpu_vreg(vgpu, offset);
702
703 if (data & PIPECONF_ENABLE) {
704 vgpu_vreg(vgpu, offset) |= I965_PIPECONF_ACTIVE;
705 vgpu_update_refresh_rate(vgpu);
1/*
2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

--- 689 unchanged lines hidden (view full) ---

698 u32 data;
699
700 write_vreg(vgpu, offset, p_data, bytes);
701 data = vgpu_vreg(vgpu, offset);
702
703 if (data & PIPECONF_ENABLE) {
704 vgpu_vreg(vgpu, offset) |= I965_PIPECONF_ACTIVE;
705 vgpu_update_refresh_rate(vgpu);
706
706 vgpu_update_vblank_emulation(vgpu, true);
707 } else {
708 vgpu_vreg(vgpu, offset) &= ~I965_PIPECONF_ACTIVE;
707 } else {
708 vgpu_vreg(vgpu, offset) &= ~I965_PIPECONF_ACTIVE;
709 vgpu_update_vblank_emulation(vgpu, false);
709 }
710 }
710 /* vgpu_lock already hold by emulate mmio r/w */
711 mutex_unlock(&vgpu->vgpu_lock);
712 intel_gvt_check_vblank_emulation(vgpu->gvt);
713 mutex_lock(&vgpu->vgpu_lock);
714 return 0;
715}
716
717/* sorted in ascending order */
718static i915_reg_t force_nonpriv_white_list[] = {
719 _MMIO(0xd80),
720 GEN9_CS_DEBUG_MODE1, //_MMIO(0x20ec)
721 GEN9_CTX_PREEMPT_REG,//_MMIO(0x2248)

--- 3241 unchanged lines hidden --- 		711 return 0;
712}
713
714/* sorted in ascending order */
715static i915_reg_t force_nonpriv_white_list[] = {
716 _MMIO(0xd80),
717 GEN9_CS_DEBUG_MODE1, //_MMIO(0x20ec)
718 GEN9_CTX_PREEMPT_REG,//_MMIO(0x2248)

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