dc.h (fb8c3ef8058456eceae1d7a746f9e45d3f161ac9) | dc.h (8774029f76b9806f2f3586bb0502408076767fd5) |
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1/* 2 * Copyright 2012-2023 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the --- 1013 unchanged lines hidden (view full) --- 1022 struct dc_debug_data debug_data; 1023 struct dpcd_vendor_signature vendor_signature; 1024 1025 const char *build_id; 1026 struct vm_helper *vm_helper; 1027 1028 uint32_t *dcn_reg_offsets; 1029 uint32_t *nbio_reg_offsets; | 1/* 2 * Copyright 2012-2023 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the --- 1013 unchanged lines hidden (view full) --- 1022 struct dc_debug_data debug_data; 1023 struct dpcd_vendor_signature vendor_signature; 1024 1025 const char *build_id; 1026 struct vm_helper *vm_helper; 1027 1028 uint32_t *dcn_reg_offsets; 1029 uint32_t *nbio_reg_offsets; |
1030 uint32_t *clk_reg_offsets; |
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1030 1031 /* Scratch memory */ 1032 struct { 1033 struct { 1034 /* 1035 * For matching clock_limits table in driver with table 1036 * from PMFW. 1037 */ --- 43 unchanged lines hidden (view full) --- 1081 * IP offset for run time initializaion of register addresses 1082 * 1083 * DCN3.5+ will fail dc_create() if these fields are null for them. They are 1084 * applicable starting with DCN32/321 and are not used for ASICs upstreamed 1085 * before them. 1086 */ 1087 uint32_t *dcn_reg_offsets; 1088 uint32_t *nbio_reg_offsets; | 1031 1032 /* Scratch memory */ 1033 struct { 1034 struct { 1035 /* 1036 * For matching clock_limits table in driver with table 1037 * from PMFW. 1038 */ --- 43 unchanged lines hidden (view full) --- 1082 * IP offset for run time initializaion of register addresses 1083 * 1084 * DCN3.5+ will fail dc_create() if these fields are null for them. They are 1085 * applicable starting with DCN32/321 and are not used for ASICs upstreamed 1086 * before them. 1087 */ 1088 uint32_t *dcn_reg_offsets; 1089 uint32_t *nbio_reg_offsets; |
1090 uint32_t *clk_reg_offsets; |
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1089}; 1090 1091struct dc_callback_init { 1092 struct cp_psp cp_psp; 1093}; 1094 1095struct dc *dc_create(const struct dc_init_data *init_params); 1096void dc_hardware_init(struct dc *dc); --- 1270 unchanged lines hidden --- | 1091}; 1092 1093struct dc_callback_init { 1094 struct cp_psp cp_psp; 1095}; 1096 1097struct dc *dc_create(const struct dc_init_data *init_params); 1098void dc_hardware_init(struct dc *dc); --- 1270 unchanged lines hidden --- |