| Kconfig (9f639269ed1522c7d69c54cc8b80ab8ee53fcb10) | Kconfig (77820ffae678fa7ff6cc155354825b6b1a023afb) |
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| 1# 2# GPIO infrastructure and drivers 3# 4 5config ARCH_WANT_OPTIONAL_GPIOLIB 6 bool 7 help 8 Select this config option from the architecture Kconfig, if --- 77 unchanged lines hidden (view full) --- 86 Say yes here to support basic platform_device memory-mapped GPIO controllers. 87 88config GPIO_IT8761E 89 tristate "IT8761E GPIO support" 90 depends on X86 # unconditional access to IO space. 91 help 92 Say yes here to support GPIO functionality of IT8761E super I/O chip. 93 | 1# 2# GPIO infrastructure and drivers 3# 4 5config ARCH_WANT_OPTIONAL_GPIOLIB 6 bool 7 help 8 Select this config option from the architecture Kconfig, if --- 77 unchanged lines hidden (view full) --- 86 Say yes here to support basic platform_device memory-mapped GPIO controllers. 87 88config GPIO_IT8761E 89 tristate "IT8761E GPIO support" 90 depends on X86 # unconditional access to IO space. 91 help 92 Say yes here to support GPIO functionality of IT8761E super I/O chip. 93 |
| 94config GPIO_EM 95 tristate "Emma Mobile GPIO" 96 depends on ARM 97 help 98 Say yes here to support GPIO on Renesas Emma Mobile SoCs. 99 | |
| 100config GPIO_EP93XX 101 def_bool y 102 depends on ARCH_EP93XX 103 select GPIO_GENERIC 104 105config GPIO_MPC5200 106 def_bool y 107 depends on PPC_MPC52xx --- 42 unchanged lines hidden (view full) --- 150 Say yes here to support the PrimeCell PL061 GPIO device 151 152config GPIO_PXA 153 bool "PXA GPIO support" 154 depends on ARCH_PXA || ARCH_MMP 155 help 156 Say yes here to support the PXA GPIO device 157 | 94config GPIO_EP93XX 95 def_bool y 96 depends on ARCH_EP93XX 97 select GPIO_GENERIC 98 99config GPIO_MPC5200 100 def_bool y 101 depends on PPC_MPC52xx --- 42 unchanged lines hidden (view full) --- 144 Say yes here to support the PrimeCell PL061 GPIO device 145 146config GPIO_PXA 147 bool "PXA GPIO support" 148 depends on ARCH_PXA || ARCH_MMP 149 help 150 Say yes here to support the PXA GPIO device 151 |
| 152config GPIO_STA2X11 153 bool "STA2x11/ConneXt GPIO support" 154 depends on MFD_STA2X11 155 select GENERIC_IRQ_CHIP 156 help 157 Say yes here to support the STA2x11/ConneXt GPIO device. 158 The GPIO module has 128 GPIO pins with alternate functions. 159 |
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| 158config GPIO_XILINX 159 bool "Xilinx GPIO support" 160 depends on PPC_OF || MICROBLAZE 161 help 162 Say yes here to support the Xilinx FPGA GPIO device 163 164config GPIO_VR41XX 165 tristate "NEC VR4100 series General-purpose I/O Uint support" 166 depends on CPU_VR41XX 167 help 168 Say yes here to support the NEC VR4100 series General-purpose I/O Uint 169 170config GPIO_SCH | 160config GPIO_XILINX 161 bool "Xilinx GPIO support" 162 depends on PPC_OF || MICROBLAZE 163 help 164 Say yes here to support the Xilinx FPGA GPIO device 165 166config GPIO_VR41XX 167 tristate "NEC VR4100 series General-purpose I/O Uint support" 168 depends on CPU_VR41XX 169 help 170 Say yes here to support the NEC VR4100 series General-purpose I/O Uint 171 172config GPIO_SCH |
| 171 tristate "Intel SCH/TunnelCreek GPIO" | 173 tristate "Intel SCH/TunnelCreek/Centerton GPIO" |
| 172 depends on PCI && X86 173 select MFD_CORE 174 select LPC_SCH 175 help | 174 depends on PCI && X86 175 select MFD_CORE 176 select LPC_SCH 177 help |
| 176 Say yes here to support GPIO interface on Intel Poulsbo SCH 177 or Intel Tunnel Creek processor. | 178 Say yes here to support GPIO interface on Intel Poulsbo SCH, 179 Intel Tunnel Creek processor or Intel Centerton processor. |
| 178 The Intel SCH contains a total of 14 GPIO pins. Ten GPIOs are 179 powered by the core power rail and are turned off during sleep 180 modes (S3 and higher). The remaining four GPIOs are powered by 181 the Intel SCH suspend power supply. These GPIOs remain 182 active during S3. The suspend powered GPIOs can be used to wake the 183 system from the Suspend-to-RAM state. 184 The Intel Tunnel Creek processor has 5 GPIOs powered by the 185 core power rail and 9 from suspend power supply. | 180 The Intel SCH contains a total of 14 GPIO pins. Ten GPIOs are 181 powered by the core power rail and are turned off during sleep 182 modes (S3 and higher). The remaining four GPIOs are powered by 183 the Intel SCH suspend power supply. These GPIOs remain 184 active during S3. The suspend powered GPIOs can be used to wake the 185 system from the Suspend-to-RAM state. 186 The Intel Tunnel Creek processor has 5 GPIOs powered by the 187 core power rail and 9 from suspend power supply. |
| 188 The Intel Centerton processor has a total of 30 GPIO pins. 189 Twenty-one are powered by the core power rail and 9 from the 190 suspend power supply. |
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| 186 | 191 |
| 192config GPIO_ICH 193 tristate "Intel ICH GPIO" 194 depends on PCI && X86 195 select MFD_CORE 196 select LPC_ICH 197 help 198 Say yes here to support the GPIO functionality of a number of Intel 199 ICH-based chipsets. Currently supported devices: ICH6, ICH7, ICH8 200 ICH9, ICH10, Series 5/3400 (eg Ibex Peak), Series 6/C200 (eg 201 Cougar Point), NM10 (Tiger Point), and 3100 (Whitmore Lake). 202 203 If unsure, say N. 204 |
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| 187config GPIO_VX855 188 tristate "VIA VX855/VX875 GPIO" 189 depends on PCI 190 select MFD_CORE 191 select MFD_VX855 192 help 193 Support access to the VX855/VX875 GPIO lines through the gpio library. 194 --- 329 unchanged lines hidden --- | 205config GPIO_VX855 206 tristate "VIA VX855/VX875 GPIO" 207 depends on PCI 208 select MFD_CORE 209 select MFD_VX855 210 help 211 Support access to the VX855/VX875 GPIO lines through the gpio library. 212 --- 329 unchanged lines hidden --- |