init.c (599d49de7f69cb5a23e913db24e168ba2f09bd05) init.c (3372de5813e4da8305002ff6ffbfc0c7012cb319)
1/*
2 * Intel I/OAT DMA Linux driver
3 * Copyright(c) 2004 - 2015 Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *

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730 list_add_tail(&ioat_chan->dma_chan.device_node, &dma->channels);
731 ioat_dma->idx[idx] = ioat_chan;
732 init_timer(&ioat_chan->timer);
733 ioat_chan->timer.function = ioat_dma->timer_fn;
734 ioat_chan->timer.data = data;
735 tasklet_init(&ioat_chan->cleanup_task, ioat_dma->cleanup_fn, data);
736}
737
1/*
2 * Intel I/OAT DMA Linux driver
3 * Copyright(c) 2004 - 2015 Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *

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730 list_add_tail(&ioat_chan->dma_chan.device_node, &dma->channels);
731 ioat_dma->idx[idx] = ioat_chan;
732 init_timer(&ioat_chan->timer);
733 ioat_chan->timer.function = ioat_dma->timer_fn;
734 ioat_chan->timer.data = data;
735 tasklet_init(&ioat_chan->cleanup_task, ioat_dma->cleanup_fn, data);
736}
737
738static void ioat3_dma_test_callback(void *dma_async_param)
739{
740 struct completion *cmp = dma_async_param;
741
742 complete(cmp);
743}
744
745#define IOAT_NUM_SRC_TEST 6 /* must be <= 8 */
746static int ioat_xor_val_self_test(struct ioatdma_device *ioat_dma)
747{
748 int i, src_idx;
749 struct page *dest;
750 struct page *xor_srcs[IOAT_NUM_SRC_TEST];
751 struct page *xor_val_srcs[IOAT_NUM_SRC_TEST + 1];
752 dma_addr_t dma_srcs[IOAT_NUM_SRC_TEST + 1];

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830 if (!tx) {
831 dev_err(dev, "Self-test xor prep failed\n");
832 err = -ENODEV;
833 goto dma_unmap;
834 }
835
836 async_tx_ack(tx);
837 init_completion(&cmp);
738#define IOAT_NUM_SRC_TEST 6 /* must be <= 8 */
739static int ioat_xor_val_self_test(struct ioatdma_device *ioat_dma)
740{
741 int i, src_idx;
742 struct page *dest;
743 struct page *xor_srcs[IOAT_NUM_SRC_TEST];
744 struct page *xor_val_srcs[IOAT_NUM_SRC_TEST + 1];
745 dma_addr_t dma_srcs[IOAT_NUM_SRC_TEST + 1];

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823 if (!tx) {
824 dev_err(dev, "Self-test xor prep failed\n");
825 err = -ENODEV;
826 goto dma_unmap;
827 }
828
829 async_tx_ack(tx);
830 init_completion(&cmp);
838 tx->callback = ioat3_dma_test_callback;
831 tx->callback = ioat_dma_test_callback;
839 tx->callback_param = &cmp;
840 cookie = tx->tx_submit(tx);
841 if (cookie < 0) {
842 dev_err(dev, "Self-test xor setup failed\n");
843 err = -ENODEV;
844 goto dma_unmap;
845 }
846 dma->device_issue_pending(dma_chan);

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898 if (!tx) {
899 dev_err(dev, "Self-test zero prep failed\n");
900 err = -ENODEV;
901 goto dma_unmap;
902 }
903
904 async_tx_ack(tx);
905 init_completion(&cmp);
832 tx->callback_param = &cmp;
833 cookie = tx->tx_submit(tx);
834 if (cookie < 0) {
835 dev_err(dev, "Self-test xor setup failed\n");
836 err = -ENODEV;
837 goto dma_unmap;
838 }
839 dma->device_issue_pending(dma_chan);

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891 if (!tx) {
892 dev_err(dev, "Self-test zero prep failed\n");
893 err = -ENODEV;
894 goto dma_unmap;
895 }
896
897 async_tx_ack(tx);
898 init_completion(&cmp);
906 tx->callback = ioat3_dma_test_callback;
899 tx->callback = ioat_dma_test_callback;
907 tx->callback_param = &cmp;
908 cookie = tx->tx_submit(tx);
909 if (cookie < 0) {
910 dev_err(dev, "Self-test zero setup failed\n");
911 err = -ENODEV;
912 goto dma_unmap;
913 }
914 dma->device_issue_pending(dma_chan);

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951 if (!tx) {
952 dev_err(dev, "Self-test 2nd zero prep failed\n");
953 err = -ENODEV;
954 goto dma_unmap;
955 }
956
957 async_tx_ack(tx);
958 init_completion(&cmp);
900 tx->callback_param = &cmp;
901 cookie = tx->tx_submit(tx);
902 if (cookie < 0) {
903 dev_err(dev, "Self-test zero setup failed\n");
904 err = -ENODEV;
905 goto dma_unmap;
906 }
907 dma->device_issue_pending(dma_chan);

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944 if (!tx) {
945 dev_err(dev, "Self-test 2nd zero prep failed\n");
946 err = -ENODEV;
947 goto dma_unmap;
948 }
949
950 async_tx_ack(tx);
951 init_completion(&cmp);
959 tx->callback = ioat3_dma_test_callback;
952 tx->callback = ioat_dma_test_callback;
960 tx->callback_param = &cmp;
961 cookie = tx->tx_submit(tx);
962 if (cookie < 0) {
963 dev_err(dev, "Self-test 2nd zero setup failed\n");
964 err = -ENODEV;
965 goto dma_unmap;
966 }
967 dma->device_issue_pending(dma_chan);

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1019
1020 rc = ioat_xor_val_self_test(ioat_dma);
1021 if (rc)
1022 return rc;
1023
1024 return 0;
1025}
1026
953 tx->callback_param = &cmp;
954 cookie = tx->tx_submit(tx);
955 if (cookie < 0) {
956 dev_err(dev, "Self-test 2nd zero setup failed\n");
957 err = -ENODEV;
958 goto dma_unmap;
959 }
960 dma->device_issue_pending(dma_chan);

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1012
1013 rc = ioat_xor_val_self_test(ioat_dma);
1014 if (rc)
1015 return rc;
1016
1017 return 0;
1018}
1019
1027static void ioat3_intr_quirk(struct ioatdma_device *ioat_dma)
1020static void ioat_intr_quirk(struct ioatdma_device *ioat_dma)
1028{
1029 struct dma_device *dma;
1030 struct dma_chan *c;
1031 struct ioatdma_chan *ioat_chan;
1032 u32 errmask;
1033
1034 dma = &ioat_dma->dma_dev;
1035

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1058 struct dma_chan *c;
1059 struct ioatdma_chan *ioat_chan;
1060 bool is_raid_device = false;
1061 int err;
1062
1063 ioat_dma->enumerate_channels = ioat_enumerate_channels;
1064 ioat_dma->reset_hw = ioat_reset_hw;
1065 ioat_dma->self_test = ioat3_dma_self_test;
1021{
1022 struct dma_device *dma;
1023 struct dma_chan *c;
1024 struct ioatdma_chan *ioat_chan;
1025 u32 errmask;
1026
1027 dma = &ioat_dma->dma_dev;
1028

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1051 struct dma_chan *c;
1052 struct ioatdma_chan *ioat_chan;
1053 bool is_raid_device = false;
1054 int err;
1055
1056 ioat_dma->enumerate_channels = ioat_enumerate_channels;
1057 ioat_dma->reset_hw = ioat_reset_hw;
1058 ioat_dma->self_test = ioat3_dma_self_test;
1066 ioat_dma->intr_quirk = ioat3_intr_quirk;
1059 ioat_dma->intr_quirk = ioat_intr_quirk;
1067 dma = &ioat_dma->dma_dev;
1068 dma->device_prep_dma_memcpy = ioat_dma_prep_memcpy_lock;
1069 dma->device_issue_pending = ioat_issue_pending;
1070 dma->device_alloc_chan_resources = ioat_alloc_chan_resources;
1071 dma->device_free_chan_resources = ioat_free_chan_resources;
1072
1073 dma_cap_set(DMA_INTERRUPT, dma->cap_mask);
1074 dma->device_prep_dma_interrupt = ioat_prep_interrupt_lock;

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1157
1158 err = ioat_register(ioat_dma);
1159 if (err)
1160 return err;
1161
1162 ioat_kobject_add(ioat_dma, &ioat_ktype);
1163
1164 if (dca)
1060 dma = &ioat_dma->dma_dev;
1061 dma->device_prep_dma_memcpy = ioat_dma_prep_memcpy_lock;
1062 dma->device_issue_pending = ioat_issue_pending;
1063 dma->device_alloc_chan_resources = ioat_alloc_chan_resources;
1064 dma->device_free_chan_resources = ioat_free_chan_resources;
1065
1066 dma_cap_set(DMA_INTERRUPT, dma->cap_mask);
1067 dma->device_prep_dma_interrupt = ioat_prep_interrupt_lock;

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1150
1151 err = ioat_register(ioat_dma);
1152 if (err)
1153 return err;
1154
1155 ioat_kobject_add(ioat_dma, &ioat_ktype);
1156
1157 if (dca)
1165 ioat_dma->dca = ioat3_dca_init(pdev, ioat_dma->reg_base);
1158 ioat_dma->dca = ioat_dca_init(pdev, ioat_dma->reg_base);
1166
1167 return 0;
1168}
1169
1170#define DRV_NAME "ioatdma"
1171
1172static struct pci_driver ioat_pci_driver = {
1173 .name = DRV_NAME,

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1160 return 0;
1161}
1162
1163#define DRV_NAME "ioatdma"
1164
1165static struct pci_driver ioat_pci_driver = {
1166 .name = DRV_NAME,

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