dma.h (92243b6fc8fcb16bf401b055f7a0ba79f70a4115) dma.h (ad4a7b5065c1b4f5176e7d031c3cc2b36f776884)
1/*
2 * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
7 * any later version.
8 *

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77 struct pci_dev *pdev;
78 void __iomem *reg_base;
79 struct pci_pool *dma_pool;
80 struct pci_pool *completion_pool;
81#define MAX_SED_POOLS 5
82 struct dma_pool *sed_hw_pool[MAX_SED_POOLS];
83 struct dma_device dma_dev;
84 u8 version;
1/*
2 * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
7 * any later version.
8 *

--- 68 unchanged lines hidden (view full) ---

77 struct pci_dev *pdev;
78 void __iomem *reg_base;
79 struct pci_pool *dma_pool;
80 struct pci_pool *completion_pool;
81#define MAX_SED_POOLS 5
82 struct dma_pool *sed_hw_pool[MAX_SED_POOLS];
83 struct dma_device dma_dev;
84 u8 version;
85 struct msix_entry msix_entries[4];
86 struct ioatdma_chan *idx[4];
85#define IOAT_MAX_CHANS 4
86 struct msix_entry msix_entries[IOAT_MAX_CHANS];
87 struct ioatdma_chan *idx[IOAT_MAX_CHANS];
87 struct dca_provider *dca;
88 enum ioat_irq_mode irq_mode;
89 u32 cap;
90};
91
92struct ioatdma_chan {
93 struct dma_chan dma_chan;
94 void __iomem *reg_base;
95 dma_addr_t last_completion;
96 spinlock_t cleanup_lock;
97 unsigned long state;
88 struct dca_provider *dca;
89 enum ioat_irq_mode irq_mode;
90 u32 cap;
91};
92
93struct ioatdma_chan {
94 struct dma_chan dma_chan;
95 void __iomem *reg_base;
96 dma_addr_t last_completion;
97 spinlock_t cleanup_lock;
98 unsigned long state;
99 #define IOAT_CHAN_DOWN 0
98 #define IOAT_COMPLETION_ACK 1
99 #define IOAT_RESET_PENDING 2
100 #define IOAT_KOBJ_INIT_FAIL 3
101 #define IOAT_RESHAPE_PENDING 4
102 #define IOAT_RUN 5
103 #define IOAT_CHAN_ACTIVE 6
104 struct timer_list timer;
105 #define COMPLETION_TIMEOUT msecs_to_jiffies(100)

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100 #define IOAT_COMPLETION_ACK 1
101 #define IOAT_RESET_PENDING 2
102 #define IOAT_KOBJ_INIT_FAIL 3
103 #define IOAT_RESHAPE_PENDING 4
104 #define IOAT_RUN 5
105 #define IOAT_CHAN_ACTIVE 6
106 struct timer_list timer;
107 #define COMPLETION_TIMEOUT msecs_to_jiffies(100)

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