fsl-edma-common.h (537df9ab2d72bb782926a7d263a9f0a101e60b2e) fsl-edma-common.h (e0a08ed25492b6437e366b347113db484037b9b9)
1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * Copyright 2018 Angelo Dureghello <angelo@sysam.it>
5 */
6#ifndef _FSL_EDMA_COMMON_H_
7#define _FSL_EDMA_COMMON_H_
8

--- 131 unchanged lines hidden (view full) ---

140 u32 attr;
141 bool is_sw;
142 struct dma_pool *tcd_pool;
143 dma_addr_t dma_dev_addr;
144 u32 dma_dev_size;
145 enum dma_data_direction dma_dir;
146 char chan_name[32];
147 struct fsl_edma_hw_tcd __iomem *tcd;
1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * Copyright 2018 Angelo Dureghello <angelo@sysam.it>
5 */
6#ifndef _FSL_EDMA_COMMON_H_
7#define _FSL_EDMA_COMMON_H_
8

--- 131 unchanged lines hidden (view full) ---

140 u32 attr;
141 bool is_sw;
142 struct dma_pool *tcd_pool;
143 dma_addr_t dma_dev_addr;
144 u32 dma_dev_size;
145 enum dma_data_direction dma_dir;
146 char chan_name[32];
147 struct fsl_edma_hw_tcd __iomem *tcd;
148 void __iomem *mux_addr;
148 u32 real_count;
149 struct work_struct issue_worker;
150 struct platform_device *pdev;
151 struct device *pd_dev;
152 u32 srcid;
153 struct clk *clk;
154 int priority;
155 int hw_chanid;

--- 45 unchanged lines hidden (view full) ---

201 FSL_EDMA_DRV_ALIGN_64BYTE | \
202 FSL_EDMA_DRV_CLEAR_DONE_E_LINK)
203
204struct fsl_edma_drvdata {
205 u32 dmamuxs; /* only used before v3 */
206 u32 chreg_off;
207 u32 chreg_space_sz;
208 u32 flags;
149 u32 real_count;
150 struct work_struct issue_worker;
151 struct platform_device *pdev;
152 struct device *pd_dev;
153 u32 srcid;
154 struct clk *clk;
155 int priority;
156 int hw_chanid;

--- 45 unchanged lines hidden (view full) ---

202 FSL_EDMA_DRV_ALIGN_64BYTE | \
203 FSL_EDMA_DRV_CLEAR_DONE_E_LINK)
204
205struct fsl_edma_drvdata {
206 u32 dmamuxs; /* only used before v3 */
207 u32 chreg_off;
208 u32 chreg_space_sz;
209 u32 flags;
210 u32 mux_off; /* channel mux register offset */
211 u32 mux_skip; /* how much skip for each channel */
209 int (*setup_irq)(struct platform_device *pdev,
210 struct fsl_edma_engine *fsl_edma);
211};
212
213struct fsl_edma_engine {
214 struct dma_device dma_dev;
215 void __iomem *membase;
216 void __iomem *muxbase[DMAMUX_NR];

--- 160 unchanged lines hidden ---
212 int (*setup_irq)(struct platform_device *pdev,
213 struct fsl_edma_engine *fsl_edma);
214};
215
216struct fsl_edma_engine {
217 struct dma_device dma_dev;
218 void __iomem *membase;
219 void __iomem *muxbase[DMAMUX_NR];

--- 160 unchanged lines hidden ---