Makefile (470e3f0d0b1529abf9759c93e23ac8dd678e0e70) | Makefile (24aaff6a6ce4c4defd18147f5078223a96283fd7) |
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1# SPDX-License-Identifier: GPL-2.0 2# SoC 3obj-$(CONFIG_CLK_EMEV2) += clk-emev2.o 4obj-$(CONFIG_CLK_RZA1) += clk-rz.o 5obj-$(CONFIG_CLK_R7S9210) += r7s9210-cpg-mssr.o 6obj-$(CONFIG_CLK_R8A73A4) += clk-r8a73a4.o 7obj-$(CONFIG_CLK_R8A7740) += clk-r8a7740.o 8obj-$(CONFIG_CLK_R8A7742) += r8a7742-cpg-mssr.o --- 14 unchanged lines hidden (view full) --- 23obj-$(CONFIG_CLK_R8A77960) += r8a7796-cpg-mssr.o 24obj-$(CONFIG_CLK_R8A77961) += r8a7796-cpg-mssr.o 25obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o 26obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o 27obj-$(CONFIG_CLK_R8A77980) += r8a77980-cpg-mssr.o 28obj-$(CONFIG_CLK_R8A77990) += r8a77990-cpg-mssr.o 29obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o 30obj-$(CONFIG_CLK_R8A779A0) += r8a779a0-cpg-mssr.o | 1# SPDX-License-Identifier: GPL-2.0 2# SoC 3obj-$(CONFIG_CLK_EMEV2) += clk-emev2.o 4obj-$(CONFIG_CLK_RZA1) += clk-rz.o 5obj-$(CONFIG_CLK_R7S9210) += r7s9210-cpg-mssr.o 6obj-$(CONFIG_CLK_R8A73A4) += clk-r8a73a4.o 7obj-$(CONFIG_CLK_R8A7740) += clk-r8a7740.o 8obj-$(CONFIG_CLK_R8A7742) += r8a7742-cpg-mssr.o --- 14 unchanged lines hidden (view full) --- 23obj-$(CONFIG_CLK_R8A77960) += r8a7796-cpg-mssr.o 24obj-$(CONFIG_CLK_R8A77961) += r8a7796-cpg-mssr.o 25obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o 26obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o 27obj-$(CONFIG_CLK_R8A77980) += r8a77980-cpg-mssr.o 28obj-$(CONFIG_CLK_R8A77990) += r8a77990-cpg-mssr.o 29obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o 30obj-$(CONFIG_CLK_R8A779A0) += r8a779a0-cpg-mssr.o |
31obj-$(CONFIG_CLK_R8A779F0) += r8a779f0-cpg-mssr.o |
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31obj-$(CONFIG_CLK_R9A06G032) += r9a06g032-clocks.o 32obj-$(CONFIG_CLK_R9A07G044) += r9a07g044-cpg.o 33obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o 34 35# Family 36obj-$(CONFIG_CLK_RCAR_CPG_LIB) += rcar-cpg-lib.o 37obj-$(CONFIG_CLK_RCAR_GEN2_CPG) += rcar-gen2-cpg.o 38obj-$(CONFIG_CLK_RCAR_GEN3_CPG) += rcar-gen3-cpg.o 39obj-$(CONFIG_CLK_RCAR_GEN4_CPG) += rcar-gen4-cpg.o 40obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL) += rcar-usb2-clock-sel.o 41obj-$(CONFIG_CLK_RZG2L) += rzg2l-cpg.o 42 43# Generic 44obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o 45obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o 46obj-$(CONFIG_CLK_RENESAS_DIV6) += clk-div6.o | 32obj-$(CONFIG_CLK_R9A06G032) += r9a06g032-clocks.o 33obj-$(CONFIG_CLK_R9A07G044) += r9a07g044-cpg.o 34obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o 35 36# Family 37obj-$(CONFIG_CLK_RCAR_CPG_LIB) += rcar-cpg-lib.o 38obj-$(CONFIG_CLK_RCAR_GEN2_CPG) += rcar-gen2-cpg.o 39obj-$(CONFIG_CLK_RCAR_GEN3_CPG) += rcar-gen3-cpg.o 40obj-$(CONFIG_CLK_RCAR_GEN4_CPG) += rcar-gen4-cpg.o 41obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL) += rcar-usb2-clock-sel.o 42obj-$(CONFIG_CLK_RZG2L) += rzg2l-cpg.o 43 44# Generic 45obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o 46obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o 47obj-$(CONFIG_CLK_RENESAS_DIV6) += clk-div6.o |