axg-audio.c (05d3b7c68e6205b2036a7c854e94a62556eeee0f) axg-audio.c (4638263114ab872104699b0d47aa384c90ef8f76)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (c) 2018 BayLibre, SAS.
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
5 */
6
7#include <linux/clk.h>
8#include <linux/clk-provider.h>

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16#include <linux/slab.h>
17
18#include "meson-clkc-utils.h"
19#include "axg-audio.h"
20#include "clk-regmap.h"
21#include "clk-phase.h"
22#include "sclk-div.h"
23
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (c) 2018 BayLibre, SAS.
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
5 */
6
7#include <linux/clk.h>
8#include <linux/clk-provider.h>

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16#include <linux/slab.h>
17
18#include "meson-clkc-utils.h"
19#include "axg-audio.h"
20#include "clk-regmap.h"
21#include "clk-phase.h"
22#include "sclk-div.h"
23
24#include <dt-bindings/clock/axg-audio-clkc.h>
25
24#define AUD_GATE(_name, _reg, _bit, _pname, _iflags) { \
25 .data = &(struct clk_regmap_gate_data){ \
26 .offset = (_reg), \
27 .bit_idx = (_bit), \
28 }, \
29 .hw.init = &(struct clk_init_data) { \
30 .name = "aud_"#_name, \
31 .ops = &clk_regmap_gate_ops, \

--- 1847 unchanged lines hidden --- 		26#define AUD_GATE(_name, _reg, _bit, _pname, _iflags) { \
27 .data = &(struct clk_regmap_gate_data){ \
28 .offset = (_reg), \
29 .bit_idx = (_bit), \
30 }, \
31 .hw.init = &(struct clk_init_data) { \
32 .name = "aud_"#_name, \
33 .ops = &clk_regmap_gate_ops, \

--- 1847 unchanged lines hidden ---