ivpu_fw.c (02d5b0aacd0590dbaf25f35834631e5bc11002e3) ivpu_fw.c (852be13f3bd32c1eab808840cfac41b1fea25991)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2020-2023 Intel Corporation
4 */
5
6#include <linux/firmware.h>
7#include <linux/highmem.h>
8#include <linux/moduleparam.h>
9#include <linux/pci.h>
10
11#include "vpu_boot_api.h"
12#include "ivpu_drv.h"
13#include "ivpu_fw.h"
14#include "ivpu_gem.h"
15#include "ivpu_hw.h"
16#include "ivpu_ipc.h"
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2020-2023 Intel Corporation
4 */
5
6#include <linux/firmware.h>
7#include <linux/highmem.h>
8#include <linux/moduleparam.h>
9#include <linux/pci.h>
10
11#include "vpu_boot_api.h"
12#include "ivpu_drv.h"
13#include "ivpu_fw.h"
14#include "ivpu_gem.h"
15#include "ivpu_hw.h"
16#include "ivpu_ipc.h"
17#include "ivpu_pm.h"
17
18#define FW_GLOBAL_MEM_START (2ull * SZ_1G)
19#define FW_GLOBAL_MEM_END (3ull * SZ_1G)
20#define FW_SHARED_MEM_SIZE SZ_256M /* Must be aligned to FW_SHARED_MEM_ALIGNMENT */
21#define FW_SHARED_MEM_ALIGNMENT SZ_128K /* VPU MTRR limitation */
22#define FW_RUNTIME_MAX_SIZE SZ_512M
23#define FW_SHAVE_NN_MAX_SIZE SZ_2M
24#define FW_RUNTIME_MIN_ADDR (FW_GLOBAL_MEM_START)

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356
357void ivpu_fw_boot_params_setup(struct ivpu_device *vdev, struct vpu_boot_params *boot_params)
358{
359 struct ivpu_bo *ipc_mem_rx = vdev->ipc->mem_rx;
360
361 /* In case of warm boot we only have to reset the entrypoint addr */
362 if (!ivpu_fw_is_cold_boot(vdev)) {
363 boot_params->save_restore_ret_address = 0;
18
19#define FW_GLOBAL_MEM_START (2ull * SZ_1G)
20#define FW_GLOBAL_MEM_END (3ull * SZ_1G)
21#define FW_SHARED_MEM_SIZE SZ_256M /* Must be aligned to FW_SHARED_MEM_ALIGNMENT */
22#define FW_SHARED_MEM_ALIGNMENT SZ_128K /* VPU MTRR limitation */
23#define FW_RUNTIME_MAX_SIZE SZ_512M
24#define FW_SHAVE_NN_MAX_SIZE SZ_2M
25#define FW_RUNTIME_MIN_ADDR (FW_GLOBAL_MEM_START)

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357
358void ivpu_fw_boot_params_setup(struct ivpu_device *vdev, struct vpu_boot_params *boot_params)
359{
360 struct ivpu_bo *ipc_mem_rx = vdev->ipc->mem_rx;
361
362 /* In case of warm boot we only have to reset the entrypoint addr */
363 if (!ivpu_fw_is_cold_boot(vdev)) {
364 boot_params->save_restore_ret_address = 0;
365 vdev->pm->is_warmboot = true;
364 return;
365 }
366
366 return;
367 }
368
369 vdev->pm->is_warmboot = false;
370
367 boot_params->magic = VPU_BOOT_PARAMS_MAGIC;
368 boot_params->vpu_id = to_pci_dev(vdev->drm.dev)->bus->number;
369 boot_params->frequency = ivpu_hw_reg_pll_freq_get(vdev);
370
371 /*
372 * Uncached region of VPU address space, covers IPC buffers, job queues
373 * and log buffers, programmable to L2$ Uncached by VPU MTRR
374 */

--- 45 unchanged lines hidden --- 		371 boot_params->magic = VPU_BOOT_PARAMS_MAGIC;
372 boot_params->vpu_id = to_pci_dev(vdev->drm.dev)->bus->number;
373 boot_params->frequency = ivpu_hw_reg_pll_freq_get(vdev);
374
375 /*
376 * Uncached region of VPU address space, covers IPC buffers, job queues
377 * and log buffers, programmable to L2$ Uncached by VPU MTRR
378 */

--- 45 unchanged lines hidden ---