common.c (e5451c8f8330e03ad3cfa16048b4daf961af434f) common.c (6a6256f9e0ebaabf7ded1fef8977a4352dbe7784)
1#include <linux/bootmem.h>
2#include <linux/linkage.h>
3#include <linux/bitops.h>
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/percpu.h>
7#include <linux/string.h>
8#include <linux/ctype.h>

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223 return;
224
225 /* Disable processor serial number: */
226
227 rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
228 lo |= 0x200000;
229 wrmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
230
1#include <linux/bootmem.h>
2#include <linux/linkage.h>
3#include <linux/bitops.h>
4#include <linux/kernel.h>
5#include <linux/module.h>
6#include <linux/percpu.h>
7#include <linux/string.h>
8#include <linux/ctype.h>

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223 return;
224
225 /* Disable processor serial number: */
226
227 rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
228 lo |= 0x200000;
229 wrmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
230
231 printk(KERN_NOTICE "CPU serial number disabled.\n");
231 pr_notice("CPU serial number disabled.\n");
232 clear_cpu_cap(c, X86_FEATURE_PN);
233
234 /* Disabling the serial number may affect the cpuid level */
235 c->cpuid_level = cpuid_eax(0);
236}
237
238static int __init x86_serial_nr_setup(char *s)
239{

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324 (u32)df->level > (u32)c->extended_cpuid_level :
325 (s32)df->level > (s32)c->cpuid_level))
326 continue;
327
328 clear_cpu_cap(c, df->feature);
329 if (!warn)
330 continue;
331
232 clear_cpu_cap(c, X86_FEATURE_PN);
233
234 /* Disabling the serial number may affect the cpuid level */
235 c->cpuid_level = cpuid_eax(0);
236}
237
238static int __init x86_serial_nr_setup(char *s)
239{

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324 (u32)df->level > (u32)c->extended_cpuid_level :
325 (s32)df->level > (s32)c->cpuid_level))
326 continue;
327
328 clear_cpu_cap(c, df->feature);
329 if (!warn)
330 continue;
331
332 printk(KERN_WARNING
333 "CPU: CPU feature " X86_CAP_FMT " disabled, no CPUID level 0x%x\n",
334 x86_cap_flag(df->feature), df->level);
332 pr_warn("CPU: CPU feature " X86_CAP_FMT " disabled, no CPUID level 0x%x\n",
333 x86_cap_flag(df->feature), df->level);
335 }
336}
337
338/*
339 * Naming convention should be: <Name> [(<Codename>)]
340 * This table only is used unless init_<vendor>() below doesn't set it;
341 * in particular, if CPUID levels 0x80000002..4 are supported, this
342 * isn't used

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505 if (cpu_has(c, X86_FEATURE_XTOPOLOGY))
506 return;
507
508 cpuid(1, &eax, &ebx, &ecx, &edx);
509
510 smp_num_siblings = (ebx & 0xff0000) >> 16;
511
512 if (smp_num_siblings == 1) {
334 }
335}
336
337/*
338 * Naming convention should be: <Name> [(<Codename>)]
339 * This table only is used unless init_<vendor>() below doesn't set it;
340 * in particular, if CPUID levels 0x80000002..4 are supported, this
341 * isn't used

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504 if (cpu_has(c, X86_FEATURE_XTOPOLOGY))
505 return;
506
507 cpuid(1, &eax, &ebx, &ecx, &edx);
508
509 smp_num_siblings = (ebx & 0xff0000) >> 16;
510
511 if (smp_num_siblings == 1) {
513 printk_once(KERN_INFO "CPU0: Hyper-Threading is disabled\n");
512 pr_info_once("CPU0: Hyper-Threading is disabled\n");
514 goto out;
515 }
516
517 if (smp_num_siblings <= 1)
518 goto out;
519
520 index_msb = get_count_order(smp_num_siblings);
521 c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb);

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526
527 core_bits = get_count_order(c->x86_max_cores);
528
529 c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) &
530 ((1 << core_bits) - 1);
531
532out:
533 if (!printed && (c->x86_max_cores * smp_num_siblings) > 1) {
513 goto out;
514 }
515
516 if (smp_num_siblings <= 1)
517 goto out;
518
519 index_msb = get_count_order(smp_num_siblings);
520 c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb);

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525
526 core_bits = get_count_order(c->x86_max_cores);
527
528 c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) &
529 ((1 << core_bits) - 1);
530
531out:
532 if (!printed && (c->x86_max_cores * smp_num_siblings) > 1) {
534 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
535 c->phys_proc_id);
536 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
537 c->cpu_core_id);
533 pr_info("CPU: Physical Processor ID: %d\n",
534 c->phys_proc_id);
535 pr_info("CPU: Processor Core ID: %d\n",
536 c->cpu_core_id);
538 printed = 1;
539 }
540#endif
541}
542
543static void get_cpu_vendor(struct cpuinfo_x86 *c)
544{
545 char *v = c->x86_vendor_id;

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554 !strcmp(v, cpu_devs[i]->c_ident[1]))) {
555
556 this_cpu = cpu_devs[i];
557 c->x86_vendor = this_cpu->c_x86_vendor;
558 return;
559 }
560 }
561
537 printed = 1;
538 }
539#endif
540}
541
542static void get_cpu_vendor(struct cpuinfo_x86 *c)
543{
544 char *v = c->x86_vendor_id;

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553 !strcmp(v, cpu_devs[i]->c_ident[1]))) {
554
555 this_cpu = cpu_devs[i];
556 c->x86_vendor = this_cpu->c_x86_vendor;
557 return;
558 }
559 }
560
562 printk_once(KERN_ERR
563 "CPU: vendor_id '%s' unknown, using generic init.\n" \
564 "CPU: Your system may be unstable.\n", v);
561 pr_err_once("CPU: vendor_id '%s' unknown, using generic init.\n" \
562 "CPU: Your system may be unstable.\n", v);
565
566 c->x86_vendor = X86_VENDOR_UNKNOWN;
567 this_cpu = &default_cpu;
568}
569
570void cpu_detect(struct cpuinfo_x86 *c)
571{
572 /* Get vendor name */

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755}
756
757void __init early_cpu_init(void)
758{
759 const struct cpu_dev *const *cdev;
760 int count = 0;
761
762#ifdef CONFIG_PROCESSOR_SELECT
563
564 c->x86_vendor = X86_VENDOR_UNKNOWN;
565 this_cpu = &default_cpu;
566}
567
568void cpu_detect(struct cpuinfo_x86 *c)
569{
570 /* Get vendor name */

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753}
754
755void __init early_cpu_init(void)
756{
757 const struct cpu_dev *const *cdev;
758 int count = 0;
759
760#ifdef CONFIG_PROCESSOR_SELECT
763 printk(KERN_INFO "KERNEL supported cpus:\n");
761 pr_info("KERNEL supported cpus:\n");
764#endif
765
766 for (cdev = __x86_cpu_dev_start; cdev < __x86_cpu_dev_end; cdev++) {
767 const struct cpu_dev *cpudev = *cdev;
768
769 if (count >= X86_VENDOR_NUM)
770 break;
771 cpu_devs[count] = cpudev;
772 count++;
773
774#ifdef CONFIG_PROCESSOR_SELECT
775 {
776 unsigned int j;
777
778 for (j = 0; j < 2; j++) {
779 if (!cpudev->c_ident[j])
780 continue;
762#endif
763
764 for (cdev = __x86_cpu_dev_start; cdev < __x86_cpu_dev_end; cdev++) {
765 const struct cpu_dev *cpudev = *cdev;
766
767 if (count >= X86_VENDOR_NUM)
768 break;
769 cpu_devs[count] = cpudev;
770 count++;
771
772#ifdef CONFIG_PROCESSOR_SELECT
773 {
774 unsigned int j;
775
776 for (j = 0; j < 2; j++) {
777 if (!cpudev->c_ident[j])
778 continue;
781 printk(KERN_INFO " %s %s\n", cpudev->c_vendor,
779 pr_info(" %s %s\n", cpudev->c_vendor,
782 cpudev->c_ident[j]);
783 }
784 }
785#endif
786 }
787 early_identify_cpu(&boot_cpu_data);
788}
789

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881 c->x86_cache_alignment = c->x86_clflush_size;
882 memset(&c->x86_capability, 0, sizeof c->x86_capability);
883
884 generic_identify(c);
885
886 if (this_cpu->c_identify)
887 this_cpu->c_identify(c);
888
780 cpudev->c_ident[j]);
781 }
782 }
783#endif
784 }
785 early_identify_cpu(&boot_cpu_data);
786}
787

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879 c->x86_cache_alignment = c->x86_clflush_size;
880 memset(&c->x86_capability, 0, sizeof c->x86_capability);
881
882 generic_identify(c);
883
884 if (this_cpu->c_identify)
885 this_cpu->c_identify(c);
886
889 /* Clear/Set all flags overriden by options, after probe */
887 /* Clear/Set all flags overridden by options, after probe */
890 for (i = 0; i < NCAPINTS; i++) {
891 c->x86_capability[i] &= ~cpu_caps_cleared[i];
892 c->x86_capability[i] |= cpu_caps_set[i];
893 }
894
895#ifdef CONFIG_X86_64
896 c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
897#endif

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940 detect_ht(c);
941#endif
942
943 init_hypervisor(c);
944 x86_init_rdrand(c);
945 x86_init_cache_qos(c);
946
947 /*
888 for (i = 0; i < NCAPINTS; i++) {
889 c->x86_capability[i] &= ~cpu_caps_cleared[i];
890 c->x86_capability[i] |= cpu_caps_set[i];
891 }
892
893#ifdef CONFIG_X86_64
894 c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
895#endif

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938 detect_ht(c);
939#endif
940
941 init_hypervisor(c);
942 x86_init_rdrand(c);
943 x86_init_cache_qos(c);
944
945 /*
948 * Clear/Set all flags overriden by options, need do it
946 * Clear/Set all flags overridden by options, need do it
949 * before following smp all cpus cap AND.
950 */
951 for (i = 0; i < NCAPINTS; i++) {
952 c->x86_capability[i] &= ~cpu_caps_cleared[i];
953 c->x86_capability[i] |= cpu_caps_set[i];
954 }
955
956 /*

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1056
1057 for (i = 0; i < ARRAY_SIZE(msr_range_array); i++) {
1058 index_min = msr_range_array[i].min;
1059 index_max = msr_range_array[i].max;
1060
1061 for (index = index_min; index < index_max; index++) {
1062 if (rdmsrl_safe(index, &val))
1063 continue;
947 * before following smp all cpus cap AND.
948 */
949 for (i = 0; i < NCAPINTS; i++) {
950 c->x86_capability[i] &= ~cpu_caps_cleared[i];
951 c->x86_capability[i] |= cpu_caps_set[i];
952 }
953
954 /*

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1054
1055 for (i = 0; i < ARRAY_SIZE(msr_range_array); i++) {
1056 index_min = msr_range_array[i].min;
1057 index_max = msr_range_array[i].max;
1058
1059 for (index = index_min; index < index_max; index++) {
1060 if (rdmsrl_safe(index, &val))
1061 continue;
1064 printk(KERN_INFO " MSR%08x: %016llx\n", index, val);
1062 pr_info(" MSR%08x: %016llx\n", index, val);
1065 }
1066 }
1067}
1068
1069static int show_msr;
1070
1071static __init int setup_show_msr(char *arg)
1072{

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1095 if (c->x86_vendor < X86_VENDOR_NUM) {
1096 vendor = this_cpu->c_vendor;
1097 } else {
1098 if (c->cpuid_level >= 0)
1099 vendor = c->x86_vendor_id;
1100 }
1101
1102 if (vendor && !strstr(c->x86_model_id, vendor))
1063 }
1064 }
1065}
1066
1067static int show_msr;
1068
1069static __init int setup_show_msr(char *arg)
1070{

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1093 if (c->x86_vendor < X86_VENDOR_NUM) {
1094 vendor = this_cpu->c_vendor;
1095 } else {
1096 if (c->cpuid_level >= 0)
1097 vendor = c->x86_vendor_id;
1098 }
1099
1100 if (vendor && !strstr(c->x86_model_id, vendor))
1103 printk(KERN_CONT "%s ", vendor);
1101 pr_cont("%s ", vendor);
1104
1105 if (c->x86_model_id[0])
1102
1103 if (c->x86_model_id[0])
1106 printk(KERN_CONT "%s", c->x86_model_id);
1104 pr_cont("%s", c->x86_model_id);
1107 else
1105 else
1108 printk(KERN_CONT "%d86", c->x86);
1106 pr_cont("%d86", c->x86);
1109
1107
1110 printk(KERN_CONT " (family: 0x%x, model: 0x%x", c->x86, c->x86_model);
1108 pr_cont(" (family: 0x%x, model: 0x%x", c->x86, c->x86_model);
1111
1112 if (c->x86_mask || c->cpuid_level >= 0)
1109
1110 if (c->x86_mask || c->cpuid_level >= 0)
1113 printk(KERN_CONT ", stepping: 0x%x)\n", c->x86_mask);
1111 pr_cont(", stepping: 0x%x)\n", c->x86_mask);
1114 else
1112 else
1115 printk(KERN_CONT ")\n");
1113 pr_cont(")\n");
1116
1117 print_cpu_msr(c);
1118}
1119
1120void print_cpu_msr(struct cpuinfo_x86 *c)
1121{
1122 if (c->cpu_index < show_msr)
1123 __print_cpu_msr();

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1433 /*
1434 * Initialize the CR4 shadow before doing anything that could
1435 * try to read it.
1436 */
1437 cr4_init_shadow();
1438
1439 show_ucode_info_early();
1440
1114
1115 print_cpu_msr(c);
1116}
1117
1118void print_cpu_msr(struct cpuinfo_x86 *c)
1119{
1120 if (c->cpu_index < show_msr)
1121 __print_cpu_msr();

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1431 /*
1432 * Initialize the CR4 shadow before doing anything that could
1433 * try to read it.
1434 */
1435 cr4_init_shadow();
1436
1437 show_ucode_info_early();
1438
1441 printk(KERN_INFO "Initializing CPU#%d\n", cpu);
1439 pr_info("Initializing CPU#%d\n", cpu);
1442
1443 if (cpu_feature_enabled(X86_FEATURE_VME) ||
1444 cpu_has_tsc ||
1445 boot_cpu_has(X86_FEATURE_DE))
1446 cr4_clear_bits(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
1447
1448 load_current_idt();
1449 switch_to_new_gdt(cpu);

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1441 if (cpu_feature_enabled(X86_FEATURE_VME) ||
1442 cpu_has_tsc ||
1443 boot_cpu_has(X86_FEATURE_DE))
1444 cr4_clear_bits(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
1445
1446 load_current_idt();
1447 switch_to_new_gdt(cpu);

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