| Kconfig (a4581b35e1bc80becf240238bc787a5ec2727db0) | Kconfig (a0c3832a578c84d4a93c61e22cb09c99fa9447ea) |
|---|---|
| 1# Select 32 or 64 bit 2config 64BIT 3 bool "64-bit kernel" if ARCH = "x86" 4 default ARCH = "x86_64" 5 ---help--- 6 Say yes to build a 64-bit kernel - formerly known as x86_64 7 Say no to build a 32-bit kernel - formerly known as i386 8 --- 376 unchanged lines hidden (view full) --- 385 select X86_REBOOTFIXUPS 386 select OF 387 select OF_EARLY_FLATTREE 388 ---help--- 389 Select for the Intel CE media processor (CE4100) SOC. 390 This option compiles in support for the CE4100 SOC for settop 391 boxes and media devices. 392 | 1# Select 32 or 64 bit 2config 64BIT 3 bool "64-bit kernel" if ARCH = "x86" 4 default ARCH = "x86_64" 5 ---help--- 6 Say yes to build a 64-bit kernel - formerly known as x86_64 7 Say no to build a 32-bit kernel - formerly known as i386 8 --- 376 unchanged lines hidden (view full) --- 385 select X86_REBOOTFIXUPS 386 select OF 387 select OF_EARLY_FLATTREE 388 ---help--- 389 Select for the Intel CE media processor (CE4100) SOC. 390 This option compiles in support for the CE4100 SOC for settop 391 boxes and media devices. 392 |
| 393config X86_WANT_INTEL_MID | 393config X86_INTEL_MID |
| 394 bool "Intel MID platform support" 395 depends on X86_32 396 depends on X86_EXTENDED_PLATFORM 397 ---help--- 398 Select to build a kernel capable of supporting Intel MID platform 399 systems which do not have the PCI legacy interfaces (Moorestown, 400 Medfield). If you are building for a PC class system say N here. 401 | 394 bool "Intel MID platform support" 395 depends on X86_32 396 depends on X86_EXTENDED_PLATFORM 397 ---help--- 398 Select to build a kernel capable of supporting Intel MID platform 399 systems which do not have the PCI legacy interfaces (Moorestown, 400 Medfield). If you are building for a PC class system say N here. 401 |
| 402if X86_WANT_INTEL_MID | 402if X86_INTEL_MID |
| 403 | 403 |
| 404config X86_INTEL_MID 405 bool 406 | |
| 407config X86_MRST 408 bool "Moorestown MID platform" 409 depends on PCI 410 depends on PCI_GOANY 411 depends on X86_IO_APIC 412 select APB_TIMER 413 select I2C 414 select SPI 415 select INTEL_SCU_IPC 416 select X86_PLATFORM_DEVICES | 404config X86_MRST 405 bool "Moorestown MID platform" 406 depends on PCI 407 depends on PCI_GOANY 408 depends on X86_IO_APIC 409 select APB_TIMER 410 select I2C 411 select SPI 412 select INTEL_SCU_IPC 413 select X86_PLATFORM_DEVICES |
| 417 select X86_INTEL_MID | |
| 418 ---help--- 419 Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin 420 Internet Device(MID) platform. Moorestown consists of two chips: 421 Lincroft (CPU core, graphics, and memory controller) and Langwell IOH. 422 Unlike standard x86 PCs, Moorestown does not have many legacy devices 423 nor standard legacy replacement devices/features. e.g. Moorestown does 424 not contain i8259, i8254, HPET, legacy BIOS, most of the io ports. 425 | 414 ---help--- 415 Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin 416 Internet Device(MID) platform. Moorestown consists of two chips: 417 Lincroft (CPU core, graphics, and memory controller) and Langwell IOH. 418 Unlike standard x86 PCs, Moorestown does not have many legacy devices 419 nor standard legacy replacement devices/features. e.g. Moorestown does 420 not contain i8259, i8254, HPET, legacy BIOS, most of the io ports. 421 |
| 422config X86_MDFLD 423 bool "Medfield MID platform" 424 depends on PCI 425 depends on PCI_GOANY 426 depends on X86_IO_APIC 427 select APB_TIMER 428 select I2C 429 select SPI 430 select INTEL_SCU_IPC 431 select X86_PLATFORM_DEVICES 432 select X86_INTEL_MID 433 ---help--- 434 Medfield is Intel's Low Power Intel Architecture (LPIA) based Moblin 435 Internet Device(MID) platform. 436 Unlike standard x86 PCs, Medfield does not have many legacy devices 437 nor standard legacy replacement devices/features. e.g. Medfield does 438 not contain i8259, i8254, HPET, legacy BIOS, most of the io ports. 439 |
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| 426endif 427 428config X86_RDC321X 429 bool "RDC R-321x SoC" 430 depends on X86_32 431 depends on X86_EXTENDED_PLATFORM 432 select M486 433 select X86_REBOOTFIXUPS --- 181 unchanged lines hidden (view full) --- 615 If you are unsure how to answer this question, answer N. 616 617config X86_SUMMIT_NUMA 618 def_bool y 619 depends on X86_32 && NUMA && X86_32_NON_STANDARD 620 621config X86_CYCLONE_TIMER 622 def_bool y | 440endif 441 442config X86_RDC321X 443 bool "RDC R-321x SoC" 444 depends on X86_32 445 depends on X86_EXTENDED_PLATFORM 446 select M486 447 select X86_REBOOTFIXUPS --- 181 unchanged lines hidden (view full) --- 629 If you are unsure how to answer this question, answer N. 630 631config X86_SUMMIT_NUMA 632 def_bool y 633 depends on X86_32 && NUMA && X86_32_NON_STANDARD 634 635config X86_CYCLONE_TIMER 636 def_bool y |
| 623 depends on X86_32_NON_STANDARD | 637 depends on X86_SUMMIT |
| 624 625source "arch/x86/Kconfig.cpu" 626 627config HPET_TIMER 628 def_bool X86_64 629 prompt "HPET Timer Support" if X86_32 630 ---help--- 631 Use the IA-PC HPET (High Precision Event Timer) to manage --- 14 unchanged lines hidden (view full) --- 646config HPET_EMULATE_RTC 647 def_bool y 648 depends on HPET_TIMER && (RTC=y || RTC=m || RTC_DRV_CMOS=m || RTC_DRV_CMOS=y) 649 650config APB_TIMER 651 def_bool y if MRST 652 prompt "Langwell APB Timer Support" if X86_MRST 653 select DW_APB_TIMER | 638 639source "arch/x86/Kconfig.cpu" 640 641config HPET_TIMER 642 def_bool X86_64 643 prompt "HPET Timer Support" if X86_32 644 ---help--- 645 Use the IA-PC HPET (High Precision Event Timer) to manage --- 14 unchanged lines hidden (view full) --- 660config HPET_EMULATE_RTC 661 def_bool y 662 depends on HPET_TIMER && (RTC=y || RTC=m || RTC_DRV_CMOS=m || RTC_DRV_CMOS=y) 663 664config APB_TIMER 665 def_bool y if MRST 666 prompt "Langwell APB Timer Support" if X86_MRST 667 select DW_APB_TIMER |
| 668 depends on X86_INTEL_MID && SFI |
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| 654 help 655 APB timer is the replacement for 8254, HPET on X86 MID platforms. 656 The APBT provides a stable time base on SMP 657 systems, unlike the TSC, but it is more expensive to access, 658 as it is off-chip. APB timers are always running regardless of CPU 659 C states, they are used as per CPU clockevent device when possible. 660 661# Mark as expert because too many people got it wrong. --- 1518 unchanged lines hidden --- | 669 help 670 APB timer is the replacement for 8254, HPET on X86 MID platforms. 671 The APBT provides a stable time base on SMP 672 systems, unlike the TSC, but it is more expensive to access, 673 as it is off-chip. APB timers are always running regardless of CPU 674 C states, they are used as per CPU clockevent device when possible. 675 676# Mark as expert because too many people got it wrong. --- 1518 unchanged lines hidden --- |