setup.c (3a37471551cd3b287ce7f02ed25bcf8ec37a191d) | setup.c (243e25112d06b348f087a6f7aba4bbc288285bdd) |
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1/* 2 * PowerNV setup code. 3 * 4 * Copyright 2011 IBM Corp. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version --- 18 unchanged lines hidden (view full) --- 27#include <linux/interrupt.h> 28#include <linux/bug.h> 29#include <linux/pci.h> 30#include <linux/cpufreq.h> 31 32#include <asm/machdep.h> 33#include <asm/firmware.h> 34#include <asm/xics.h> | 1/* 2 * PowerNV setup code. 3 * 4 * Copyright 2011 IBM Corp. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version --- 18 unchanged lines hidden (view full) --- 27#include <linux/interrupt.h> 28#include <linux/bug.h> 29#include <linux/pci.h> 30#include <linux/cpufreq.h> 31 32#include <asm/machdep.h> 33#include <asm/firmware.h> 34#include <asm/xics.h> |
35#include <asm/xive.h> |
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35#include <asm/opal.h> 36#include <asm/kexec.h> 37#include <asm/smp.h> 38 39#include "powernv.h" 40 41static void __init pnv_setup_arch(void) 42{ --- 28 unchanged lines hidden (view full) --- 71 hvc_opal_init_early(); 72 else 73#endif 74 add_preferred_console("hvc", 0, NULL); 75} 76 77static void __init pnv_init_IRQ(void) 78{ | 36#include <asm/opal.h> 37#include <asm/kexec.h> 38#include <asm/smp.h> 39 40#include "powernv.h" 41 42static void __init pnv_setup_arch(void) 43{ --- 28 unchanged lines hidden (view full) --- 72 hvc_opal_init_early(); 73 else 74#endif 75 add_preferred_console("hvc", 0, NULL); 76} 77 78static void __init pnv_init_IRQ(void) 79{ |
79 xics_init(); | 80 /* Try using a XIVE if available, otherwise use a XICS */ 81 if (!xive_native_init()) 82 xics_init(); |
80 81 WARN_ON(!ppc_md.get_irq); 82} 83 84static void pnv_show_cpuinfo(struct seq_file *m) 85{ 86 struct device_node *root; 87 const char *model = ""; --- 125 unchanged lines hidden (view full) --- 213 break; 214 } 215 } 216 } 217} 218 219static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) 220{ | 83 84 WARN_ON(!ppc_md.get_irq); 85} 86 87static void pnv_show_cpuinfo(struct seq_file *m) 88{ 89 struct device_node *root; 90 const char *model = ""; --- 125 unchanged lines hidden (view full) --- 216 break; 217 } 218 } 219 } 220} 221 222static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) 223{ |
221 xics_kexec_teardown_cpu(secondary); | 224 if (xive_enabled()) 225 xive_kexec_teardown_cpu(secondary); 226 else 227 xics_kexec_teardown_cpu(secondary); |
222 223 /* On OPAL, we return all CPUs to firmware */ | 228 229 /* On OPAL, we return all CPUs to firmware */ |
224 | |
225 if (!firmware_has_feature(FW_FEATURE_OPAL)) 226 return; 227 228 if (secondary) { 229 /* Return secondary CPUs to firmware on OPAL v3 */ 230 mb(); 231 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; 232 mb(); 233 234 /* Return the CPU to OPAL */ 235 opal_return_cpu(); 236 } else { 237 /* Primary waits for the secondaries to have reached OPAL */ 238 pnv_kexec_wait_secondaries_down(); 239 | 230 if (!firmware_has_feature(FW_FEATURE_OPAL)) 231 return; 232 233 if (secondary) { 234 /* Return secondary CPUs to firmware on OPAL v3 */ 235 mb(); 236 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; 237 mb(); 238 239 /* Return the CPU to OPAL */ 240 opal_return_cpu(); 241 } else { 242 /* Primary waits for the secondaries to have reached OPAL */ 243 pnv_kexec_wait_secondaries_down(); 244 |
245 /* Switch XIVE back to emulation mode */ 246 if (xive_enabled()) 247 xive_shutdown(); 248 |
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240 /* 241 * We might be running as little-endian - now that interrupts 242 * are disabled, reset the HILE bit to big-endian so we don't 243 * take interrupts in the wrong endian later 244 */ 245 opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE); 246 } 247} --- 73 unchanged lines hidden --- | 249 /* 250 * We might be running as little-endian - now that interrupts 251 * are disabled, reset the HILE bit to big-endian so we don't 252 * take interrupts in the wrong endian later 253 */ 254 opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE); 255 } 256} --- 73 unchanged lines hidden --- |