1 /* 2 * PowerNV setup code. 3 * 4 * Copyright 2011 IBM Corp. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 12 #undef DEBUG 13 14 #include <linux/cpu.h> 15 #include <linux/errno.h> 16 #include <linux/sched.h> 17 #include <linux/kernel.h> 18 #include <linux/tty.h> 19 #include <linux/reboot.h> 20 #include <linux/init.h> 21 #include <linux/console.h> 22 #include <linux/delay.h> 23 #include <linux/irq.h> 24 #include <linux/seq_file.h> 25 #include <linux/of.h> 26 #include <linux/of_fdt.h> 27 #include <linux/interrupt.h> 28 #include <linux/bug.h> 29 #include <linux/pci.h> 30 #include <linux/cpufreq.h> 31 32 #include <asm/machdep.h> 33 #include <asm/firmware.h> 34 #include <asm/xics.h> 35 #include <asm/xive.h> 36 #include <asm/opal.h> 37 #include <asm/kexec.h> 38 #include <asm/smp.h> 39 40 #include "powernv.h" 41 42 static void __init pnv_setup_arch(void) 43 { 44 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 45 46 /* Initialize SMP */ 47 pnv_smp_init(); 48 49 /* Setup PCI */ 50 pnv_pci_init(); 51 52 /* Setup RTC and NVRAM callbacks */ 53 if (firmware_has_feature(FW_FEATURE_OPAL)) 54 opal_nvram_init(); 55 56 /* Enable NAP mode */ 57 powersave_nap = 1; 58 59 /* XXX PMCS */ 60 } 61 62 static void __init pnv_init(void) 63 { 64 /* 65 * Initialize the LPC bus now so that legacy serial 66 * ports can be found on it 67 */ 68 opal_lpc_init(); 69 70 #ifdef CONFIG_HVC_OPAL 71 if (firmware_has_feature(FW_FEATURE_OPAL)) 72 hvc_opal_init_early(); 73 else 74 #endif 75 add_preferred_console("hvc", 0, NULL); 76 } 77 78 static void __init pnv_init_IRQ(void) 79 { 80 /* Try using a XIVE if available, otherwise use a XICS */ 81 if (!xive_native_init()) 82 xics_init(); 83 84 WARN_ON(!ppc_md.get_irq); 85 } 86 87 static void pnv_show_cpuinfo(struct seq_file *m) 88 { 89 struct device_node *root; 90 const char *model = ""; 91 92 root = of_find_node_by_path("/"); 93 if (root) 94 model = of_get_property(root, "model", NULL); 95 seq_printf(m, "machine\t\t: PowerNV %s\n", model); 96 if (firmware_has_feature(FW_FEATURE_OPAL)) 97 seq_printf(m, "firmware\t: OPAL\n"); 98 else 99 seq_printf(m, "firmware\t: BML\n"); 100 of_node_put(root); 101 } 102 103 static void pnv_prepare_going_down(void) 104 { 105 /* 106 * Disable all notifiers from OPAL, we can't 107 * service interrupts anymore anyway 108 */ 109 opal_event_shutdown(); 110 111 /* Soft disable interrupts */ 112 local_irq_disable(); 113 114 /* 115 * Return secondary CPUs to firwmare if a flash update 116 * is pending otherwise we will get all sort of error 117 * messages about CPU being stuck etc.. This will also 118 * have the side effect of hard disabling interrupts so 119 * past this point, the kernel is effectively dead. 120 */ 121 opal_flash_term_callback(); 122 } 123 124 static void __noreturn pnv_restart(char *cmd) 125 { 126 long rc = OPAL_BUSY; 127 128 pnv_prepare_going_down(); 129 130 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 131 rc = opal_cec_reboot(); 132 if (rc == OPAL_BUSY_EVENT) 133 opal_poll_events(NULL); 134 else 135 mdelay(10); 136 } 137 for (;;) 138 opal_poll_events(NULL); 139 } 140 141 static void __noreturn pnv_power_off(void) 142 { 143 long rc = OPAL_BUSY; 144 145 pnv_prepare_going_down(); 146 147 while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) { 148 rc = opal_cec_power_down(0); 149 if (rc == OPAL_BUSY_EVENT) 150 opal_poll_events(NULL); 151 else 152 mdelay(10); 153 } 154 for (;;) 155 opal_poll_events(NULL); 156 } 157 158 static void __noreturn pnv_halt(void) 159 { 160 pnv_power_off(); 161 } 162 163 static void pnv_progress(char *s, unsigned short hex) 164 { 165 } 166 167 static void pnv_shutdown(void) 168 { 169 /* Let the PCI code clear up IODA tables */ 170 pnv_pci_shutdown(); 171 172 /* 173 * Stop OPAL activity: Unregister all OPAL interrupts so they 174 * don't fire up while we kexec and make sure all potentially 175 * DMA'ing ops are complete (such as dump retrieval). 176 */ 177 opal_shutdown(); 178 } 179 180 #ifdef CONFIG_KEXEC_CORE 181 static void pnv_kexec_wait_secondaries_down(void) 182 { 183 int my_cpu, i, notified = -1; 184 185 my_cpu = get_cpu(); 186 187 for_each_online_cpu(i) { 188 uint8_t status; 189 int64_t rc, timeout = 1000; 190 191 if (i == my_cpu) 192 continue; 193 194 for (;;) { 195 rc = opal_query_cpu_status(get_hard_smp_processor_id(i), 196 &status); 197 if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED) 198 break; 199 barrier(); 200 if (i != notified) { 201 printk(KERN_INFO "kexec: waiting for cpu %d " 202 "(physical %d) to enter OPAL\n", 203 i, paca[i].hw_cpu_id); 204 notified = i; 205 } 206 207 /* 208 * On crash secondaries might be unreachable or hung, 209 * so timeout if we've waited too long 210 * */ 211 mdelay(1); 212 if (timeout-- == 0) { 213 printk(KERN_ERR "kexec: timed out waiting for " 214 "cpu %d (physical %d) to enter OPAL\n", 215 i, paca[i].hw_cpu_id); 216 break; 217 } 218 } 219 } 220 } 221 222 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary) 223 { 224 if (xive_enabled()) 225 xive_kexec_teardown_cpu(secondary); 226 else 227 xics_kexec_teardown_cpu(secondary); 228 229 /* On OPAL, we return all CPUs to firmware */ 230 if (!firmware_has_feature(FW_FEATURE_OPAL)) 231 return; 232 233 if (secondary) { 234 /* Return secondary CPUs to firmware on OPAL v3 */ 235 mb(); 236 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE; 237 mb(); 238 239 /* Return the CPU to OPAL */ 240 opal_return_cpu(); 241 } else { 242 /* Primary waits for the secondaries to have reached OPAL */ 243 pnv_kexec_wait_secondaries_down(); 244 245 /* Switch XIVE back to emulation mode */ 246 if (xive_enabled()) 247 xive_shutdown(); 248 249 /* 250 * We might be running as little-endian - now that interrupts 251 * are disabled, reset the HILE bit to big-endian so we don't 252 * take interrupts in the wrong endian later 253 */ 254 opal_reinit_cpus(OPAL_REINIT_CPUS_HILE_BE); 255 } 256 } 257 #endif /* CONFIG_KEXEC_CORE */ 258 259 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 260 static unsigned long pnv_memory_block_size(void) 261 { 262 return 256UL * 1024 * 1024; 263 } 264 #endif 265 266 static void __init pnv_setup_machdep_opal(void) 267 { 268 ppc_md.get_boot_time = opal_get_boot_time; 269 ppc_md.restart = pnv_restart; 270 pm_power_off = pnv_power_off; 271 ppc_md.halt = pnv_halt; 272 ppc_md.machine_check_exception = opal_machine_check; 273 ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery; 274 ppc_md.hmi_exception_early = opal_hmi_exception_early; 275 ppc_md.handle_hmi_exception = opal_handle_hmi_exception; 276 } 277 278 static int __init pnv_probe(void) 279 { 280 if (!of_machine_is_compatible("ibm,powernv")) 281 return 0; 282 283 if (firmware_has_feature(FW_FEATURE_OPAL)) 284 pnv_setup_machdep_opal(); 285 286 pr_debug("PowerNV detected !\n"); 287 288 pnv_init(); 289 290 return 1; 291 } 292 293 /* 294 * Returns the cpu frequency for 'cpu' in Hz. This is used by 295 * /proc/cpuinfo 296 */ 297 static unsigned long pnv_get_proc_freq(unsigned int cpu) 298 { 299 unsigned long ret_freq; 300 301 ret_freq = cpufreq_quick_get(cpu) * 1000ul; 302 303 /* 304 * If the backend cpufreq driver does not exist, 305 * then fallback to old way of reporting the clockrate. 306 */ 307 if (!ret_freq) 308 ret_freq = ppc_proc_freq; 309 return ret_freq; 310 } 311 312 define_machine(powernv) { 313 .name = "PowerNV", 314 .probe = pnv_probe, 315 .setup_arch = pnv_setup_arch, 316 .init_IRQ = pnv_init_IRQ, 317 .show_cpuinfo = pnv_show_cpuinfo, 318 .get_proc_freq = pnv_get_proc_freq, 319 .progress = pnv_progress, 320 .machine_shutdown = pnv_shutdown, 321 .power_save = NULL, 322 .calibrate_decr = generic_calibrate_decr, 323 #ifdef CONFIG_KEXEC_CORE 324 .kexec_cpu_down = pnv_kexec_cpu_down, 325 #endif 326 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE 327 .memory_block_size = pnv_memory_block_size, 328 #endif 329 }; 330