| feature.c (5629d41d5ce255802cd3c350fbadfe5f3aa5f279) | feature.c (35499c0195e46f479cf6ac16ad8d3f394b5fcc10) |
|---|---|
| 1/* 2 * arch/ppc/platforms/pmac_feature.c 3 * 4 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au) 5 * Ben. Herrenschmidt (benh@kernel.crashing.org) 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License --- 2946 unchanged lines hidden (view full) --- 2955 else 2956 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n", 2957 name, freqs[freq], 2958 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]); 2959} 2960 2961void __init pmac_check_ht_link(void) 2962{ | 1/* 2 * arch/ppc/platforms/pmac_feature.c 3 * 4 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au) 5 * Ben. Herrenschmidt (benh@kernel.crashing.org) 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License --- 2946 unchanged lines hidden (view full) --- 2955 else 2956 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n", 2957 name, freqs[freq], 2958 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]); 2959} 2960 2961void __init pmac_check_ht_link(void) 2962{ |
| 2963#if 0 /* Disabled for now */ | |
| 2964 u32 ufreq, freq, ucfg, cfg; 2965 struct device_node *pcix_node; 2966 u8 px_bus, px_devfn; 2967 struct pci_controller *px_hose; 2968 2969 (void)in_be32(u3_ht + U3_HT_LINK_COMMAND); 2970 ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG); 2971 ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ); --- 14 unchanged lines hidden (view full) --- 2986 return; 2987 } 2988 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg); 2989 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq); 2990 dump_HT_speeds("PCI-X HT Uplink", cfg, freq); 2991 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg); 2992 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq); 2993 dump_HT_speeds("PCI-X HT Downlink", cfg, freq); | 2963 u32 ufreq, freq, ucfg, cfg; 2964 struct device_node *pcix_node; 2965 u8 px_bus, px_devfn; 2966 struct pci_controller *px_hose; 2967 2968 (void)in_be32(u3_ht + U3_HT_LINK_COMMAND); 2969 ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG); 2970 ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ); --- 14 unchanged lines hidden (view full) --- 2985 return; 2986 } 2987 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg); 2988 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq); 2989 dump_HT_speeds("PCI-X HT Uplink", cfg, freq); 2990 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg); 2991 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq); 2992 dump_HT_speeds("PCI-X HT Downlink", cfg, freq); |
| 2994#endif | |
| 2995} | 2993} |
| 2994#endif /* 0 */ |
|
| 2996 | 2995 |
| 2997#endif /* CONFIG_POWER4 */ 2998 | |
| 2999/* 3000 * Early video resume hook 3001 */ 3002 3003static void (*pmac_early_vresume_proc)(void *data); 3004static void *pmac_early_vresume_data; 3005 3006void pmac_set_early_video_resume(void (*proc)(void *data), void *data) --- 60 unchanged lines hidden --- | 2996/* 2997 * Early video resume hook 2998 */ 2999 3000static void (*pmac_early_vresume_proc)(void *data); 3001static void *pmac_early_vresume_data; 3002 3003void pmac_set_early_video_resume(void (*proc)(void *data), void *data) --- 60 unchanged lines hidden --- |