1 /* 2 * arch/ppc/platforms/pmac_feature.c 3 * 4 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au) 5 * Ben. Herrenschmidt (benh@kernel.crashing.org) 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 * 12 * TODO: 13 * 14 * - Replace mdelay with some schedule loop if possible 15 * - Shorten some obfuscated delays on some routines (like modem 16 * power) 17 * - Refcount some clocks (see darwin) 18 * - Split split split... 19 * 20 */ 21 #include <linux/config.h> 22 #include <linux/types.h> 23 #include <linux/init.h> 24 #include <linux/delay.h> 25 #include <linux/kernel.h> 26 #include <linux/sched.h> 27 #include <linux/spinlock.h> 28 #include <linux/adb.h> 29 #include <linux/pmu.h> 30 #include <linux/ioport.h> 31 #include <linux/pci.h> 32 #include <asm/sections.h> 33 #include <asm/errno.h> 34 #include <asm/ohare.h> 35 #include <asm/heathrow.h> 36 #include <asm/keylargo.h> 37 #include <asm/uninorth.h> 38 #include <asm/io.h> 39 #include <asm/prom.h> 40 #include <asm/machdep.h> 41 #include <asm/pmac_feature.h> 42 #include <asm/dbdma.h> 43 #include <asm/pci-bridge.h> 44 #include <asm/pmac_low_i2c.h> 45 46 #undef DEBUG_FEATURE 47 48 #ifdef DEBUG_FEATURE 49 #define DBG(fmt...) printk(KERN_DEBUG fmt) 50 #else 51 #define DBG(fmt...) 52 #endif 53 54 #ifdef CONFIG_6xx 55 extern int powersave_lowspeed; 56 #endif 57 58 extern int powersave_nap; 59 extern struct device_node *k2_skiplist[2]; 60 61 62 /* 63 * We use a single global lock to protect accesses. Each driver has 64 * to take care of its own locking 65 */ 66 static DEFINE_SPINLOCK(feature_lock); 67 68 #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); 69 #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); 70 71 72 /* 73 * Instance of some macio stuffs 74 */ 75 struct macio_chip macio_chips[MAX_MACIO_CHIPS]; 76 77 struct macio_chip *macio_find(struct device_node *child, int type) 78 { 79 while(child) { 80 int i; 81 82 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++) 83 if (child == macio_chips[i].of_node && 84 (!type || macio_chips[i].type == type)) 85 return &macio_chips[i]; 86 child = child->parent; 87 } 88 return NULL; 89 } 90 EXPORT_SYMBOL_GPL(macio_find); 91 92 static const char *macio_names[] = 93 { 94 "Unknown", 95 "Grand Central", 96 "OHare", 97 "OHareII", 98 "Heathrow", 99 "Gatwick", 100 "Paddington", 101 "Keylargo", 102 "Pangea", 103 "Intrepid", 104 "K2" 105 }; 106 107 108 109 /* 110 * Uninorth reg. access. Note that Uni-N regs are big endian 111 */ 112 113 #define UN_REG(r) (uninorth_base + ((r) >> 2)) 114 #define UN_IN(r) (in_be32(UN_REG(r))) 115 #define UN_OUT(r,v) (out_be32(UN_REG(r), (v))) 116 #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) 117 #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) 118 119 static struct device_node *uninorth_node; 120 static u32 __iomem *uninorth_base; 121 static u32 uninorth_rev; 122 static int uninorth_u3; 123 static void __iomem *u3_ht; 124 125 /* 126 * For each motherboard family, we have a table of functions pointers 127 * that handle the various features. 128 */ 129 130 typedef long (*feature_call)(struct device_node *node, long param, long value); 131 132 struct feature_table_entry { 133 unsigned int selector; 134 feature_call function; 135 }; 136 137 struct pmac_mb_def 138 { 139 const char* model_string; 140 const char* model_name; 141 int model_id; 142 struct feature_table_entry* features; 143 unsigned long board_flags; 144 }; 145 static struct pmac_mb_def pmac_mb; 146 147 /* 148 * Here are the chip specific feature functions 149 */ 150 151 static inline int simple_feature_tweak(struct device_node *node, int type, 152 int reg, u32 mask, int value) 153 { 154 struct macio_chip* macio; 155 unsigned long flags; 156 157 macio = macio_find(node, type); 158 if (!macio) 159 return -ENODEV; 160 LOCK(flags); 161 if (value) 162 MACIO_BIS(reg, mask); 163 else 164 MACIO_BIC(reg, mask); 165 (void)MACIO_IN32(reg); 166 UNLOCK(flags); 167 168 return 0; 169 } 170 171 #ifndef CONFIG_POWER4 172 173 static long ohare_htw_scc_enable(struct device_node *node, long param, 174 long value) 175 { 176 struct macio_chip* macio; 177 unsigned long chan_mask; 178 unsigned long fcr; 179 unsigned long flags; 180 int htw, trans; 181 unsigned long rmask; 182 183 macio = macio_find(node, 0); 184 if (!macio) 185 return -ENODEV; 186 if (!strcmp(node->name, "ch-a")) 187 chan_mask = MACIO_FLAG_SCCA_ON; 188 else if (!strcmp(node->name, "ch-b")) 189 chan_mask = MACIO_FLAG_SCCB_ON; 190 else 191 return -ENODEV; 192 193 htw = (macio->type == macio_heathrow || macio->type == macio_paddington 194 || macio->type == macio_gatwick); 195 /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */ 196 trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE && 197 pmac_mb.model_id != PMAC_TYPE_YIKES); 198 if (value) { 199 #ifdef CONFIG_ADB_PMU 200 if ((param & 0xfff) == PMAC_SCC_IRDA) 201 pmu_enable_irled(1); 202 #endif /* CONFIG_ADB_PMU */ 203 LOCK(flags); 204 fcr = MACIO_IN32(OHARE_FCR); 205 /* Check if scc cell need enabling */ 206 if (!(fcr & OH_SCC_ENABLE)) { 207 fcr |= OH_SCC_ENABLE; 208 if (htw) { 209 /* Side effect: this will also power up the 210 * modem, but it's too messy to figure out on which 211 * ports this controls the tranceiver and on which 212 * it controls the modem 213 */ 214 if (trans) 215 fcr &= ~HRW_SCC_TRANS_EN_N; 216 MACIO_OUT32(OHARE_FCR, fcr); 217 fcr |= (rmask = HRW_RESET_SCC); 218 MACIO_OUT32(OHARE_FCR, fcr); 219 } else { 220 fcr |= (rmask = OH_SCC_RESET); 221 MACIO_OUT32(OHARE_FCR, fcr); 222 } 223 UNLOCK(flags); 224 (void)MACIO_IN32(OHARE_FCR); 225 mdelay(15); 226 LOCK(flags); 227 fcr &= ~rmask; 228 MACIO_OUT32(OHARE_FCR, fcr); 229 } 230 if (chan_mask & MACIO_FLAG_SCCA_ON) 231 fcr |= OH_SCCA_IO; 232 if (chan_mask & MACIO_FLAG_SCCB_ON) 233 fcr |= OH_SCCB_IO; 234 MACIO_OUT32(OHARE_FCR, fcr); 235 macio->flags |= chan_mask; 236 UNLOCK(flags); 237 if (param & PMAC_SCC_FLAG_XMON) 238 macio->flags |= MACIO_FLAG_SCC_LOCKED; 239 } else { 240 if (macio->flags & MACIO_FLAG_SCC_LOCKED) 241 return -EPERM; 242 LOCK(flags); 243 fcr = MACIO_IN32(OHARE_FCR); 244 if (chan_mask & MACIO_FLAG_SCCA_ON) 245 fcr &= ~OH_SCCA_IO; 246 if (chan_mask & MACIO_FLAG_SCCB_ON) 247 fcr &= ~OH_SCCB_IO; 248 MACIO_OUT32(OHARE_FCR, fcr); 249 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) { 250 fcr &= ~OH_SCC_ENABLE; 251 if (htw && trans) 252 fcr |= HRW_SCC_TRANS_EN_N; 253 MACIO_OUT32(OHARE_FCR, fcr); 254 } 255 macio->flags &= ~(chan_mask); 256 UNLOCK(flags); 257 mdelay(10); 258 #ifdef CONFIG_ADB_PMU 259 if ((param & 0xfff) == PMAC_SCC_IRDA) 260 pmu_enable_irled(0); 261 #endif /* CONFIG_ADB_PMU */ 262 } 263 return 0; 264 } 265 266 static long ohare_floppy_enable(struct device_node *node, long param, 267 long value) 268 { 269 return simple_feature_tweak(node, macio_ohare, 270 OHARE_FCR, OH_FLOPPY_ENABLE, value); 271 } 272 273 static long ohare_mesh_enable(struct device_node *node, long param, long value) 274 { 275 return simple_feature_tweak(node, macio_ohare, 276 OHARE_FCR, OH_MESH_ENABLE, value); 277 } 278 279 static long ohare_ide_enable(struct device_node *node, long param, long value) 280 { 281 switch(param) { 282 case 0: 283 /* For some reason, setting the bit in set_initial_features() 284 * doesn't stick. I'm still investigating... --BenH. 285 */ 286 if (value) 287 simple_feature_tweak(node, macio_ohare, 288 OHARE_FCR, OH_IOBUS_ENABLE, 1); 289 return simple_feature_tweak(node, macio_ohare, 290 OHARE_FCR, OH_IDE0_ENABLE, value); 291 case 1: 292 return simple_feature_tweak(node, macio_ohare, 293 OHARE_FCR, OH_BAY_IDE_ENABLE, value); 294 default: 295 return -ENODEV; 296 } 297 } 298 299 static long ohare_ide_reset(struct device_node *node, long param, long value) 300 { 301 switch(param) { 302 case 0: 303 return simple_feature_tweak(node, macio_ohare, 304 OHARE_FCR, OH_IDE0_RESET_N, !value); 305 case 1: 306 return simple_feature_tweak(node, macio_ohare, 307 OHARE_FCR, OH_IDE1_RESET_N, !value); 308 default: 309 return -ENODEV; 310 } 311 } 312 313 static long ohare_sleep_state(struct device_node *node, long param, long value) 314 { 315 struct macio_chip* macio = &macio_chips[0]; 316 317 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 318 return -EPERM; 319 if (value == 1) { 320 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE); 321 } else if (value == 0) { 322 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 323 } 324 325 return 0; 326 } 327 328 static long heathrow_modem_enable(struct device_node *node, long param, 329 long value) 330 { 331 struct macio_chip* macio; 332 u8 gpio; 333 unsigned long flags; 334 335 macio = macio_find(node, macio_unknown); 336 if (!macio) 337 return -ENODEV; 338 gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1; 339 if (!value) { 340 LOCK(flags); 341 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio); 342 UNLOCK(flags); 343 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 344 mdelay(250); 345 } 346 if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE && 347 pmac_mb.model_id != PMAC_TYPE_YIKES) { 348 LOCK(flags); 349 if (value) 350 MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 351 else 352 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 353 UNLOCK(flags); 354 (void)MACIO_IN32(HEATHROW_FCR); 355 mdelay(250); 356 } 357 if (value) { 358 LOCK(flags); 359 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1); 360 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 361 UNLOCK(flags); mdelay(250); LOCK(flags); 362 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio); 363 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 364 UNLOCK(flags); mdelay(250); LOCK(flags); 365 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1); 366 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET); 367 UNLOCK(flags); mdelay(250); 368 } 369 return 0; 370 } 371 372 static long heathrow_floppy_enable(struct device_node *node, long param, 373 long value) 374 { 375 return simple_feature_tweak(node, macio_unknown, 376 HEATHROW_FCR, 377 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE, 378 value); 379 } 380 381 static long heathrow_mesh_enable(struct device_node *node, long param, 382 long value) 383 { 384 struct macio_chip* macio; 385 unsigned long flags; 386 387 macio = macio_find(node, macio_unknown); 388 if (!macio) 389 return -ENODEV; 390 LOCK(flags); 391 /* Set clear mesh cell enable */ 392 if (value) 393 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE); 394 else 395 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE); 396 (void)MACIO_IN32(HEATHROW_FCR); 397 udelay(10); 398 /* Set/Clear termination power */ 399 if (value) 400 MACIO_BIC(HEATHROW_MBCR, 0x04000000); 401 else 402 MACIO_BIS(HEATHROW_MBCR, 0x04000000); 403 (void)MACIO_IN32(HEATHROW_MBCR); 404 udelay(10); 405 UNLOCK(flags); 406 407 return 0; 408 } 409 410 static long heathrow_ide_enable(struct device_node *node, long param, 411 long value) 412 { 413 switch(param) { 414 case 0: 415 return simple_feature_tweak(node, macio_unknown, 416 HEATHROW_FCR, HRW_IDE0_ENABLE, value); 417 case 1: 418 return simple_feature_tweak(node, macio_unknown, 419 HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value); 420 default: 421 return -ENODEV; 422 } 423 } 424 425 static long heathrow_ide_reset(struct device_node *node, long param, 426 long value) 427 { 428 switch(param) { 429 case 0: 430 return simple_feature_tweak(node, macio_unknown, 431 HEATHROW_FCR, HRW_IDE0_RESET_N, !value); 432 case 1: 433 return simple_feature_tweak(node, macio_unknown, 434 HEATHROW_FCR, HRW_IDE1_RESET_N, !value); 435 default: 436 return -ENODEV; 437 } 438 } 439 440 static long heathrow_bmac_enable(struct device_node *node, long param, 441 long value) 442 { 443 struct macio_chip* macio; 444 unsigned long flags; 445 446 macio = macio_find(node, 0); 447 if (!macio) 448 return -ENODEV; 449 if (value) { 450 LOCK(flags); 451 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE); 452 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET); 453 UNLOCK(flags); 454 (void)MACIO_IN32(HEATHROW_FCR); 455 mdelay(10); 456 LOCK(flags); 457 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET); 458 UNLOCK(flags); 459 (void)MACIO_IN32(HEATHROW_FCR); 460 mdelay(10); 461 } else { 462 LOCK(flags); 463 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE); 464 UNLOCK(flags); 465 } 466 return 0; 467 } 468 469 static long heathrow_sound_enable(struct device_node *node, long param, 470 long value) 471 { 472 struct macio_chip* macio; 473 unsigned long flags; 474 475 /* B&W G3 and Yikes don't support that properly (the 476 * sound appear to never come back after beeing shut down). 477 */ 478 if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE || 479 pmac_mb.model_id == PMAC_TYPE_YIKES) 480 return 0; 481 482 macio = macio_find(node, 0); 483 if (!macio) 484 return -ENODEV; 485 if (value) { 486 LOCK(flags); 487 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 488 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N); 489 UNLOCK(flags); 490 (void)MACIO_IN32(HEATHROW_FCR); 491 } else { 492 LOCK(flags); 493 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N); 494 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 495 UNLOCK(flags); 496 } 497 return 0; 498 } 499 500 static u32 save_fcr[6]; 501 static u32 save_mbcr; 502 static u32 save_gpio_levels[2]; 503 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT]; 504 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT]; 505 static u32 save_unin_clock_ctl; 506 static struct dbdma_regs save_dbdma[13]; 507 static struct dbdma_regs save_alt_dbdma[13]; 508 509 static void dbdma_save(struct macio_chip *macio, struct dbdma_regs *save) 510 { 511 int i; 512 513 /* Save state & config of DBDMA channels */ 514 for (i = 0; i < 13; i++) { 515 volatile struct dbdma_regs __iomem * chan = (void __iomem *) 516 (macio->base + ((0x8000+i*0x100)>>2)); 517 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi); 518 save[i].cmdptr = in_le32(&chan->cmdptr); 519 save[i].intr_sel = in_le32(&chan->intr_sel); 520 save[i].br_sel = in_le32(&chan->br_sel); 521 save[i].wait_sel = in_le32(&chan->wait_sel); 522 } 523 } 524 525 static void dbdma_restore(struct macio_chip *macio, struct dbdma_regs *save) 526 { 527 int i; 528 529 /* Save state & config of DBDMA channels */ 530 for (i = 0; i < 13; i++) { 531 volatile struct dbdma_regs __iomem * chan = (void __iomem *) 532 (macio->base + ((0x8000+i*0x100)>>2)); 533 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16); 534 while (in_le32(&chan->status) & ACTIVE) 535 mb(); 536 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi); 537 out_le32(&chan->cmdptr, save[i].cmdptr); 538 out_le32(&chan->intr_sel, save[i].intr_sel); 539 out_le32(&chan->br_sel, save[i].br_sel); 540 out_le32(&chan->wait_sel, save[i].wait_sel); 541 } 542 } 543 544 static void heathrow_sleep(struct macio_chip *macio, int secondary) 545 { 546 if (secondary) { 547 dbdma_save(macio, save_alt_dbdma); 548 save_fcr[2] = MACIO_IN32(0x38); 549 save_fcr[3] = MACIO_IN32(0x3c); 550 } else { 551 dbdma_save(macio, save_dbdma); 552 save_fcr[0] = MACIO_IN32(0x38); 553 save_fcr[1] = MACIO_IN32(0x3c); 554 save_mbcr = MACIO_IN32(0x34); 555 /* Make sure sound is shut down */ 556 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N); 557 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 558 /* This seems to be necessary as well or the fan 559 * keeps coming up and battery drains fast */ 560 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE); 561 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N); 562 /* Make sure eth is down even if module or sleep 563 * won't work properly */ 564 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET); 565 } 566 /* Make sure modem is shut down */ 567 MACIO_OUT8(HRW_GPIO_MODEM_RESET, 568 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1); 569 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N); 570 MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE); 571 572 /* Let things settle */ 573 (void)MACIO_IN32(HEATHROW_FCR); 574 } 575 576 static void heathrow_wakeup(struct macio_chip *macio, int secondary) 577 { 578 if (secondary) { 579 MACIO_OUT32(0x38, save_fcr[2]); 580 (void)MACIO_IN32(0x38); 581 mdelay(1); 582 MACIO_OUT32(0x3c, save_fcr[3]); 583 (void)MACIO_IN32(0x38); 584 mdelay(10); 585 dbdma_restore(macio, save_alt_dbdma); 586 } else { 587 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE); 588 (void)MACIO_IN32(0x38); 589 mdelay(1); 590 MACIO_OUT32(0x3c, save_fcr[1]); 591 (void)MACIO_IN32(0x38); 592 mdelay(1); 593 MACIO_OUT32(0x34, save_mbcr); 594 (void)MACIO_IN32(0x38); 595 mdelay(10); 596 dbdma_restore(macio, save_dbdma); 597 } 598 } 599 600 static long heathrow_sleep_state(struct device_node *node, long param, 601 long value) 602 { 603 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 604 return -EPERM; 605 if (value == 1) { 606 if (macio_chips[1].type == macio_gatwick) 607 heathrow_sleep(&macio_chips[0], 1); 608 heathrow_sleep(&macio_chips[0], 0); 609 } else if (value == 0) { 610 heathrow_wakeup(&macio_chips[0], 0); 611 if (macio_chips[1].type == macio_gatwick) 612 heathrow_wakeup(&macio_chips[0], 1); 613 } 614 return 0; 615 } 616 617 static long core99_scc_enable(struct device_node *node, long param, long value) 618 { 619 struct macio_chip* macio; 620 unsigned long flags; 621 unsigned long chan_mask; 622 u32 fcr; 623 624 macio = macio_find(node, 0); 625 if (!macio) 626 return -ENODEV; 627 if (!strcmp(node->name, "ch-a")) 628 chan_mask = MACIO_FLAG_SCCA_ON; 629 else if (!strcmp(node->name, "ch-b")) 630 chan_mask = MACIO_FLAG_SCCB_ON; 631 else 632 return -ENODEV; 633 634 if (value) { 635 int need_reset_scc = 0; 636 int need_reset_irda = 0; 637 638 LOCK(flags); 639 fcr = MACIO_IN32(KEYLARGO_FCR0); 640 /* Check if scc cell need enabling */ 641 if (!(fcr & KL0_SCC_CELL_ENABLE)) { 642 fcr |= KL0_SCC_CELL_ENABLE; 643 need_reset_scc = 1; 644 } 645 if (chan_mask & MACIO_FLAG_SCCA_ON) { 646 fcr |= KL0_SCCA_ENABLE; 647 /* Don't enable line drivers for I2S modem */ 648 if ((param & 0xfff) == PMAC_SCC_I2S1) 649 fcr &= ~KL0_SCC_A_INTF_ENABLE; 650 else 651 fcr |= KL0_SCC_A_INTF_ENABLE; 652 } 653 if (chan_mask & MACIO_FLAG_SCCB_ON) { 654 fcr |= KL0_SCCB_ENABLE; 655 /* Perform irda specific inits */ 656 if ((param & 0xfff) == PMAC_SCC_IRDA) { 657 fcr &= ~KL0_SCC_B_INTF_ENABLE; 658 fcr |= KL0_IRDA_ENABLE; 659 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE; 660 fcr |= KL0_IRDA_SOURCE1_SEL; 661 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0); 662 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND); 663 need_reset_irda = 1; 664 } else 665 fcr |= KL0_SCC_B_INTF_ENABLE; 666 } 667 MACIO_OUT32(KEYLARGO_FCR0, fcr); 668 macio->flags |= chan_mask; 669 if (need_reset_scc) { 670 MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET); 671 (void)MACIO_IN32(KEYLARGO_FCR0); 672 UNLOCK(flags); 673 mdelay(15); 674 LOCK(flags); 675 MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET); 676 } 677 if (need_reset_irda) { 678 MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET); 679 (void)MACIO_IN32(KEYLARGO_FCR0); 680 UNLOCK(flags); 681 mdelay(15); 682 LOCK(flags); 683 MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET); 684 } 685 UNLOCK(flags); 686 if (param & PMAC_SCC_FLAG_XMON) 687 macio->flags |= MACIO_FLAG_SCC_LOCKED; 688 } else { 689 if (macio->flags & MACIO_FLAG_SCC_LOCKED) 690 return -EPERM; 691 LOCK(flags); 692 fcr = MACIO_IN32(KEYLARGO_FCR0); 693 if (chan_mask & MACIO_FLAG_SCCA_ON) 694 fcr &= ~KL0_SCCA_ENABLE; 695 if (chan_mask & MACIO_FLAG_SCCB_ON) { 696 fcr &= ~KL0_SCCB_ENABLE; 697 /* Perform irda specific clears */ 698 if ((param & 0xfff) == PMAC_SCC_IRDA) { 699 fcr &= ~KL0_IRDA_ENABLE; 700 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE); 701 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0); 702 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND); 703 } 704 } 705 MACIO_OUT32(KEYLARGO_FCR0, fcr); 706 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) { 707 fcr &= ~KL0_SCC_CELL_ENABLE; 708 MACIO_OUT32(KEYLARGO_FCR0, fcr); 709 } 710 macio->flags &= ~(chan_mask); 711 UNLOCK(flags); 712 mdelay(10); 713 } 714 return 0; 715 } 716 717 static long 718 core99_modem_enable(struct device_node *node, long param, long value) 719 { 720 struct macio_chip* macio; 721 u8 gpio; 722 unsigned long flags; 723 724 /* Hack for internal USB modem */ 725 if (node == NULL) { 726 if (macio_chips[0].type != macio_keylargo) 727 return -ENODEV; 728 node = macio_chips[0].of_node; 729 } 730 macio = macio_find(node, 0); 731 if (!macio) 732 return -ENODEV; 733 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET); 734 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE; 735 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA; 736 737 if (!value) { 738 LOCK(flags); 739 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 740 UNLOCK(flags); 741 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 742 mdelay(250); 743 } 744 LOCK(flags); 745 if (value) { 746 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 747 UNLOCK(flags); 748 (void)MACIO_IN32(KEYLARGO_FCR2); 749 mdelay(250); 750 } else { 751 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 752 UNLOCK(flags); 753 } 754 if (value) { 755 LOCK(flags); 756 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 757 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 758 UNLOCK(flags); mdelay(250); LOCK(flags); 759 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 760 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 761 UNLOCK(flags); mdelay(250); LOCK(flags); 762 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 763 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 764 UNLOCK(flags); mdelay(250); 765 } 766 return 0; 767 } 768 769 static long 770 pangea_modem_enable(struct device_node *node, long param, long value) 771 { 772 struct macio_chip* macio; 773 u8 gpio; 774 unsigned long flags; 775 776 /* Hack for internal USB modem */ 777 if (node == NULL) { 778 if (macio_chips[0].type != macio_pangea && 779 macio_chips[0].type != macio_intrepid) 780 return -ENODEV; 781 node = macio_chips[0].of_node; 782 } 783 macio = macio_find(node, 0); 784 if (!macio) 785 return -ENODEV; 786 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET); 787 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE; 788 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA; 789 790 if (!value) { 791 LOCK(flags); 792 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 793 UNLOCK(flags); 794 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 795 mdelay(250); 796 } 797 LOCK(flags); 798 if (value) { 799 MACIO_OUT8(KL_GPIO_MODEM_POWER, 800 KEYLARGO_GPIO_OUTPUT_ENABLE); 801 UNLOCK(flags); 802 (void)MACIO_IN32(KEYLARGO_FCR2); 803 mdelay(250); 804 } else { 805 MACIO_OUT8(KL_GPIO_MODEM_POWER, 806 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA); 807 UNLOCK(flags); 808 } 809 if (value) { 810 LOCK(flags); 811 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 812 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 813 UNLOCK(flags); mdelay(250); LOCK(flags); 814 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio); 815 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 816 UNLOCK(flags); mdelay(250); LOCK(flags); 817 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA); 818 (void)MACIO_IN8(KL_GPIO_MODEM_RESET); 819 UNLOCK(flags); mdelay(250); 820 } 821 return 0; 822 } 823 824 static long 825 core99_ata100_enable(struct device_node *node, long value) 826 { 827 unsigned long flags; 828 struct pci_dev *pdev = NULL; 829 u8 pbus, pid; 830 831 if (uninorth_rev < 0x24) 832 return -ENODEV; 833 834 LOCK(flags); 835 if (value) 836 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100); 837 else 838 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100); 839 (void)UN_IN(UNI_N_CLOCK_CNTL); 840 UNLOCK(flags); 841 udelay(20); 842 843 if (value) { 844 if (pci_device_from_OF_node(node, &pbus, &pid) == 0) 845 pdev = pci_find_slot(pbus, pid); 846 if (pdev == NULL) 847 return 0; 848 pci_enable_device(pdev); 849 pci_set_master(pdev); 850 } 851 return 0; 852 } 853 854 static long 855 core99_ide_enable(struct device_node *node, long param, long value) 856 { 857 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2 858 * based ata-100 859 */ 860 switch(param) { 861 case 0: 862 return simple_feature_tweak(node, macio_unknown, 863 KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value); 864 case 1: 865 return simple_feature_tweak(node, macio_unknown, 866 KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value); 867 case 2: 868 return simple_feature_tweak(node, macio_unknown, 869 KEYLARGO_FCR1, KL1_UIDE_ENABLE, value); 870 case 3: 871 return core99_ata100_enable(node, value); 872 default: 873 return -ENODEV; 874 } 875 } 876 877 static long 878 core99_ide_reset(struct device_node *node, long param, long value) 879 { 880 switch(param) { 881 case 0: 882 return simple_feature_tweak(node, macio_unknown, 883 KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value); 884 case 1: 885 return simple_feature_tweak(node, macio_unknown, 886 KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value); 887 case 2: 888 return simple_feature_tweak(node, macio_unknown, 889 KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value); 890 default: 891 return -ENODEV; 892 } 893 } 894 895 static long 896 core99_gmac_enable(struct device_node *node, long param, long value) 897 { 898 unsigned long flags; 899 900 LOCK(flags); 901 if (value) 902 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC); 903 else 904 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC); 905 (void)UN_IN(UNI_N_CLOCK_CNTL); 906 UNLOCK(flags); 907 udelay(20); 908 909 return 0; 910 } 911 912 static long 913 core99_gmac_phy_reset(struct device_node *node, long param, long value) 914 { 915 unsigned long flags; 916 struct macio_chip *macio; 917 918 macio = &macio_chips[0]; 919 if (macio->type != macio_keylargo && macio->type != macio_pangea && 920 macio->type != macio_intrepid) 921 return -ENODEV; 922 923 LOCK(flags); 924 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE); 925 (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET); 926 UNLOCK(flags); 927 mdelay(10); 928 LOCK(flags); 929 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */ 930 KEYLARGO_GPIO_OUTOUT_DATA); 931 UNLOCK(flags); 932 mdelay(10); 933 934 return 0; 935 } 936 937 static long 938 core99_sound_chip_enable(struct device_node *node, long param, long value) 939 { 940 struct macio_chip* macio; 941 unsigned long flags; 942 943 macio = macio_find(node, 0); 944 if (!macio) 945 return -ENODEV; 946 947 /* Do a better probe code, screamer G4 desktops & 948 * iMacs can do that too, add a recalibrate in 949 * the driver as well 950 */ 951 if (pmac_mb.model_id == PMAC_TYPE_PISMO || 952 pmac_mb.model_id == PMAC_TYPE_TITANIUM) { 953 LOCK(flags); 954 if (value) 955 MACIO_OUT8(KL_GPIO_SOUND_POWER, 956 KEYLARGO_GPIO_OUTPUT_ENABLE | 957 KEYLARGO_GPIO_OUTOUT_DATA); 958 else 959 MACIO_OUT8(KL_GPIO_SOUND_POWER, 960 KEYLARGO_GPIO_OUTPUT_ENABLE); 961 (void)MACIO_IN8(KL_GPIO_SOUND_POWER); 962 UNLOCK(flags); 963 } 964 return 0; 965 } 966 967 static long 968 core99_airport_enable(struct device_node *node, long param, long value) 969 { 970 struct macio_chip* macio; 971 unsigned long flags; 972 int state; 973 974 macio = macio_find(node, 0); 975 if (!macio) 976 return -ENODEV; 977 978 /* Hint: we allow passing of macio itself for the sake of the 979 * sleep code 980 */ 981 if (node != macio->of_node && 982 (!node->parent || node->parent != macio->of_node)) 983 return -ENODEV; 984 state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0; 985 if (value == state) 986 return 0; 987 if (value) { 988 /* This code is a reproduction of OF enable-cardslot 989 * and init-wireless methods, slightly hacked until 990 * I got it working. 991 */ 992 LOCK(flags); 993 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5); 994 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf); 995 UNLOCK(flags); 996 mdelay(10); 997 LOCK(flags); 998 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4); 999 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf); 1000 UNLOCK(flags); 1001 1002 mdelay(10); 1003 1004 LOCK(flags); 1005 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16); 1006 (void)MACIO_IN32(KEYLARGO_FCR2); 1007 udelay(10); 1008 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0); 1009 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb); 1010 udelay(10); 1011 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28); 1012 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa); 1013 udelay(10); 1014 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28); 1015 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd); 1016 udelay(10); 1017 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28); 1018 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd); 1019 udelay(10); 1020 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28); 1021 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe); 1022 UNLOCK(flags); 1023 udelay(10); 1024 MACIO_OUT32(0x1c000, 0); 1025 mdelay(1); 1026 MACIO_OUT8(0x1a3e0, 0x41); 1027 (void)MACIO_IN8(0x1a3e0); 1028 udelay(10); 1029 LOCK(flags); 1030 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16); 1031 (void)MACIO_IN32(KEYLARGO_FCR2); 1032 UNLOCK(flags); 1033 mdelay(100); 1034 1035 macio->flags |= MACIO_FLAG_AIRPORT_ON; 1036 } else { 1037 LOCK(flags); 1038 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16); 1039 (void)MACIO_IN32(KEYLARGO_FCR2); 1040 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0); 1041 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0); 1042 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0); 1043 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0); 1044 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0); 1045 (void)MACIO_IN8(KL_GPIO_AIRPORT_4); 1046 UNLOCK(flags); 1047 1048 macio->flags &= ~MACIO_FLAG_AIRPORT_ON; 1049 } 1050 return 0; 1051 } 1052 1053 #ifdef CONFIG_SMP 1054 static long 1055 core99_reset_cpu(struct device_node *node, long param, long value) 1056 { 1057 unsigned int reset_io = 0; 1058 unsigned long flags; 1059 struct macio_chip *macio; 1060 struct device_node *np; 1061 const int dflt_reset_lines[] = { KL_GPIO_RESET_CPU0, 1062 KL_GPIO_RESET_CPU1, 1063 KL_GPIO_RESET_CPU2, 1064 KL_GPIO_RESET_CPU3 }; 1065 1066 macio = &macio_chips[0]; 1067 if (macio->type != macio_keylargo) 1068 return -ENODEV; 1069 1070 np = find_path_device("/cpus"); 1071 if (np == NULL) 1072 return -ENODEV; 1073 for (np = np->child; np != NULL; np = np->sibling) { 1074 u32 *num = (u32 *)get_property(np, "reg", NULL); 1075 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL); 1076 if (num == NULL || rst == NULL) 1077 continue; 1078 if (param == *num) { 1079 reset_io = *rst; 1080 break; 1081 } 1082 } 1083 if (np == NULL || reset_io == 0) 1084 reset_io = dflt_reset_lines[param]; 1085 1086 LOCK(flags); 1087 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE); 1088 (void)MACIO_IN8(reset_io); 1089 udelay(1); 1090 MACIO_OUT8(reset_io, 0); 1091 (void)MACIO_IN8(reset_io); 1092 UNLOCK(flags); 1093 1094 return 0; 1095 } 1096 #endif /* CONFIG_SMP */ 1097 1098 static long 1099 core99_usb_enable(struct device_node *node, long param, long value) 1100 { 1101 struct macio_chip *macio; 1102 unsigned long flags; 1103 char *prop; 1104 int number; 1105 u32 reg; 1106 1107 macio = &macio_chips[0]; 1108 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1109 macio->type != macio_intrepid) 1110 return -ENODEV; 1111 1112 prop = (char *)get_property(node, "AAPL,clock-id", NULL); 1113 if (!prop) 1114 return -ENODEV; 1115 if (strncmp(prop, "usb0u048", 8) == 0) 1116 number = 0; 1117 else if (strncmp(prop, "usb1u148", 8) == 0) 1118 number = 2; 1119 else if (strncmp(prop, "usb2u248", 8) == 0) 1120 number = 4; 1121 else 1122 return -ENODEV; 1123 1124 /* Sorry for the brute-force locking, but this is only used during 1125 * sleep and the timing seem to be critical 1126 */ 1127 LOCK(flags); 1128 if (value) { 1129 /* Turn ON */ 1130 if (number == 0) { 1131 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1)); 1132 (void)MACIO_IN32(KEYLARGO_FCR0); 1133 UNLOCK(flags); 1134 mdelay(1); 1135 LOCK(flags); 1136 MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE); 1137 } else if (number == 2) { 1138 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1)); 1139 UNLOCK(flags); 1140 (void)MACIO_IN32(KEYLARGO_FCR0); 1141 mdelay(1); 1142 LOCK(flags); 1143 MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE); 1144 } else if (number == 4) { 1145 MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1)); 1146 UNLOCK(flags); 1147 (void)MACIO_IN32(KEYLARGO_FCR1); 1148 mdelay(1); 1149 LOCK(flags); 1150 MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE); 1151 } 1152 if (number < 4) { 1153 reg = MACIO_IN32(KEYLARGO_FCR4); 1154 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) | 1155 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number)); 1156 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) | 1157 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1)); 1158 MACIO_OUT32(KEYLARGO_FCR4, reg); 1159 (void)MACIO_IN32(KEYLARGO_FCR4); 1160 udelay(10); 1161 } else { 1162 reg = MACIO_IN32(KEYLARGO_FCR3); 1163 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) | 1164 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0)); 1165 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) | 1166 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1)); 1167 MACIO_OUT32(KEYLARGO_FCR3, reg); 1168 (void)MACIO_IN32(KEYLARGO_FCR3); 1169 udelay(10); 1170 } 1171 if (macio->type == macio_intrepid) { 1172 /* wait for clock stopped bits to clear */ 1173 u32 test0 = 0, test1 = 0; 1174 u32 status0, status1; 1175 int timeout = 1000; 1176 1177 UNLOCK(flags); 1178 switch (number) { 1179 case 0: 1180 test0 = UNI_N_CLOCK_STOPPED_USB0; 1181 test1 = UNI_N_CLOCK_STOPPED_USB0PCI; 1182 break; 1183 case 2: 1184 test0 = UNI_N_CLOCK_STOPPED_USB1; 1185 test1 = UNI_N_CLOCK_STOPPED_USB1PCI; 1186 break; 1187 case 4: 1188 test0 = UNI_N_CLOCK_STOPPED_USB2; 1189 test1 = UNI_N_CLOCK_STOPPED_USB2PCI; 1190 break; 1191 } 1192 do { 1193 if (--timeout <= 0) { 1194 printk(KERN_ERR "core99_usb_enable: " 1195 "Timeout waiting for clocks\n"); 1196 break; 1197 } 1198 mdelay(1); 1199 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0); 1200 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1); 1201 } while ((status0 & test0) | (status1 & test1)); 1202 LOCK(flags); 1203 } 1204 } else { 1205 /* Turn OFF */ 1206 if (number < 4) { 1207 reg = MACIO_IN32(KEYLARGO_FCR4); 1208 reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) | 1209 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number); 1210 reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) | 1211 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1); 1212 MACIO_OUT32(KEYLARGO_FCR4, reg); 1213 (void)MACIO_IN32(KEYLARGO_FCR4); 1214 udelay(1); 1215 } else { 1216 reg = MACIO_IN32(KEYLARGO_FCR3); 1217 reg |= KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) | 1218 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0); 1219 reg |= KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) | 1220 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1); 1221 MACIO_OUT32(KEYLARGO_FCR3, reg); 1222 (void)MACIO_IN32(KEYLARGO_FCR3); 1223 udelay(1); 1224 } 1225 if (number == 0) { 1226 if (macio->type != macio_intrepid) 1227 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE); 1228 (void)MACIO_IN32(KEYLARGO_FCR0); 1229 udelay(1); 1230 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1)); 1231 (void)MACIO_IN32(KEYLARGO_FCR0); 1232 } else if (number == 2) { 1233 if (macio->type != macio_intrepid) 1234 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE); 1235 (void)MACIO_IN32(KEYLARGO_FCR0); 1236 udelay(1); 1237 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1)); 1238 (void)MACIO_IN32(KEYLARGO_FCR0); 1239 } else if (number == 4) { 1240 udelay(1); 1241 MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1)); 1242 (void)MACIO_IN32(KEYLARGO_FCR1); 1243 } 1244 udelay(1); 1245 } 1246 UNLOCK(flags); 1247 1248 return 0; 1249 } 1250 1251 static long 1252 core99_firewire_enable(struct device_node *node, long param, long value) 1253 { 1254 unsigned long flags; 1255 struct macio_chip *macio; 1256 1257 macio = &macio_chips[0]; 1258 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1259 macio->type != macio_intrepid) 1260 return -ENODEV; 1261 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED)) 1262 return -ENODEV; 1263 1264 LOCK(flags); 1265 if (value) { 1266 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW); 1267 (void)UN_IN(UNI_N_CLOCK_CNTL); 1268 } else { 1269 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW); 1270 (void)UN_IN(UNI_N_CLOCK_CNTL); 1271 } 1272 UNLOCK(flags); 1273 mdelay(1); 1274 1275 return 0; 1276 } 1277 1278 static long 1279 core99_firewire_cable_power(struct device_node *node, long param, long value) 1280 { 1281 unsigned long flags; 1282 struct macio_chip *macio; 1283 1284 /* Trick: we allow NULL node */ 1285 if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0) 1286 return -ENODEV; 1287 macio = &macio_chips[0]; 1288 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1289 macio->type != macio_intrepid) 1290 return -ENODEV; 1291 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED)) 1292 return -ENODEV; 1293 1294 LOCK(flags); 1295 if (value) { 1296 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0); 1297 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); 1298 udelay(10); 1299 } else { 1300 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4); 1301 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10); 1302 } 1303 UNLOCK(flags); 1304 mdelay(1); 1305 1306 return 0; 1307 } 1308 1309 static long 1310 intrepid_aack_delay_enable(struct device_node *node, long param, long value) 1311 { 1312 unsigned long flags; 1313 1314 if (uninorth_rev < 0xd2) 1315 return -ENODEV; 1316 1317 LOCK(flags); 1318 if (param) 1319 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE); 1320 else 1321 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE); 1322 UNLOCK(flags); 1323 1324 return 0; 1325 } 1326 1327 1328 #endif /* CONFIG_POWER4 */ 1329 1330 static long 1331 core99_read_gpio(struct device_node *node, long param, long value) 1332 { 1333 struct macio_chip *macio = &macio_chips[0]; 1334 1335 return MACIO_IN8(param); 1336 } 1337 1338 1339 static long 1340 core99_write_gpio(struct device_node *node, long param, long value) 1341 { 1342 struct macio_chip *macio = &macio_chips[0]; 1343 1344 MACIO_OUT8(param, (u8)(value & 0xff)); 1345 return 0; 1346 } 1347 1348 #ifdef CONFIG_POWER4 1349 static long g5_gmac_enable(struct device_node *node, long param, long value) 1350 { 1351 struct macio_chip *macio = &macio_chips[0]; 1352 unsigned long flags; 1353 1354 if (node == NULL) 1355 return -ENODEV; 1356 1357 LOCK(flags); 1358 if (value) { 1359 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE); 1360 mb(); 1361 k2_skiplist[0] = NULL; 1362 } else { 1363 k2_skiplist[0] = node; 1364 mb(); 1365 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE); 1366 } 1367 1368 UNLOCK(flags); 1369 mdelay(1); 1370 1371 return 0; 1372 } 1373 1374 static long g5_fw_enable(struct device_node *node, long param, long value) 1375 { 1376 struct macio_chip *macio = &macio_chips[0]; 1377 unsigned long flags; 1378 1379 if (node == NULL) 1380 return -ENODEV; 1381 1382 LOCK(flags); 1383 if (value) { 1384 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE); 1385 mb(); 1386 k2_skiplist[1] = NULL; 1387 } else { 1388 k2_skiplist[1] = node; 1389 mb(); 1390 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE); 1391 } 1392 1393 UNLOCK(flags); 1394 mdelay(1); 1395 1396 return 0; 1397 } 1398 1399 static long g5_mpic_enable(struct device_node *node, long param, long value) 1400 { 1401 unsigned long flags; 1402 1403 if (node->parent == NULL || strcmp(node->parent->name, "u3")) 1404 return 0; 1405 1406 LOCK(flags); 1407 UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE); 1408 UNLOCK(flags); 1409 1410 return 0; 1411 } 1412 1413 static long g5_eth_phy_reset(struct device_node *node, long param, long value) 1414 { 1415 struct macio_chip *macio = &macio_chips[0]; 1416 struct device_node *phy; 1417 int need_reset; 1418 1419 /* 1420 * We must not reset the combo PHYs, only the BCM5221 found in 1421 * the iMac G5. 1422 */ 1423 phy = of_get_next_child(node, NULL); 1424 if (!phy) 1425 return -ENODEV; 1426 need_reset = device_is_compatible(phy, "B5221"); 1427 of_node_put(phy); 1428 if (!need_reset) 1429 return 0; 1430 1431 /* PHY reset is GPIO 29, not in device-tree unfortunately */ 1432 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 1433 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA); 1434 /* Thankfully, this is now always called at a time when we can 1435 * schedule by sungem. 1436 */ 1437 msleep(10); 1438 MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0); 1439 1440 return 0; 1441 } 1442 1443 static long g5_i2s_enable(struct device_node *node, long param, long value) 1444 { 1445 /* Very crude implementation for now */ 1446 struct macio_chip *macio = &macio_chips[0]; 1447 unsigned long flags; 1448 1449 if (value == 0) 1450 return 0; /* don't disable yet */ 1451 1452 LOCK(flags); 1453 MACIO_BIS(KEYLARGO_FCR3, KL3_CLK45_ENABLE | KL3_CLK49_ENABLE | 1454 KL3_I2S0_CLK18_ENABLE); 1455 udelay(10); 1456 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_I2S0_CELL_ENABLE | 1457 K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE); 1458 udelay(10); 1459 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_I2S0_RESET); 1460 UNLOCK(flags); 1461 udelay(10); 1462 1463 return 0; 1464 } 1465 1466 1467 #ifdef CONFIG_SMP 1468 static long g5_reset_cpu(struct device_node *node, long param, long value) 1469 { 1470 unsigned int reset_io = 0; 1471 unsigned long flags; 1472 struct macio_chip *macio; 1473 struct device_node *np; 1474 1475 macio = &macio_chips[0]; 1476 if (macio->type != macio_keylargo2) 1477 return -ENODEV; 1478 1479 np = find_path_device("/cpus"); 1480 if (np == NULL) 1481 return -ENODEV; 1482 for (np = np->child; np != NULL; np = np->sibling) { 1483 u32 *num = (u32 *)get_property(np, "reg", NULL); 1484 u32 *rst = (u32 *)get_property(np, "soft-reset", NULL); 1485 if (num == NULL || rst == NULL) 1486 continue; 1487 if (param == *num) { 1488 reset_io = *rst; 1489 break; 1490 } 1491 } 1492 if (np == NULL || reset_io == 0) 1493 return -ENODEV; 1494 1495 LOCK(flags); 1496 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE); 1497 (void)MACIO_IN8(reset_io); 1498 udelay(1); 1499 MACIO_OUT8(reset_io, 0); 1500 (void)MACIO_IN8(reset_io); 1501 UNLOCK(flags); 1502 1503 return 0; 1504 } 1505 #endif /* CONFIG_SMP */ 1506 1507 /* 1508 * This can be called from pmac_smp so isn't static 1509 * 1510 * This takes the second CPU off the bus on dual CPU machines 1511 * running UP 1512 */ 1513 void g5_phy_disable_cpu1(void) 1514 { 1515 UN_OUT(U3_API_PHY_CONFIG_1, 0); 1516 } 1517 #endif /* CONFIG_POWER4 */ 1518 1519 #ifndef CONFIG_POWER4 1520 1521 static void 1522 keylargo_shutdown(struct macio_chip *macio, int sleep_mode) 1523 { 1524 u32 temp; 1525 1526 if (sleep_mode) { 1527 mdelay(1); 1528 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND); 1529 (void)MACIO_IN32(KEYLARGO_FCR0); 1530 mdelay(1); 1531 } 1532 1533 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1534 KL0_SCC_CELL_ENABLE | 1535 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE | 1536 KL0_IRDA_CLK19_ENABLE); 1537 1538 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK); 1539 MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE); 1540 1541 MACIO_BIC(KEYLARGO_FCR1, 1542 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT | 1543 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE | 1544 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1545 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1546 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | 1547 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N | 1548 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N | 1549 KL1_UIDE_ENABLE); 1550 1551 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 1552 MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE); 1553 1554 temp = MACIO_IN32(KEYLARGO_FCR3); 1555 if (macio->rev >= 2) { 1556 temp |= KL3_SHUTDOWN_PLL2X; 1557 if (sleep_mode) 1558 temp |= KL3_SHUTDOWN_PLL_TOTAL; 1559 } 1560 1561 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 | 1562 KL3_SHUTDOWN_PLLKW35; 1563 if (sleep_mode) 1564 temp |= KL3_SHUTDOWN_PLLKW12; 1565 temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE 1566 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE); 1567 if (sleep_mode) 1568 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE); 1569 MACIO_OUT32(KEYLARGO_FCR3, temp); 1570 1571 /* Flush posted writes & wait a bit */ 1572 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1573 } 1574 1575 static void 1576 pangea_shutdown(struct macio_chip *macio, int sleep_mode) 1577 { 1578 u32 temp; 1579 1580 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1581 KL0_SCC_CELL_ENABLE | 1582 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE); 1583 1584 MACIO_BIC(KEYLARGO_FCR1, 1585 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT | 1586 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE | 1587 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1588 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1589 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE | 1590 KL1_UIDE_ENABLE); 1591 if (pmac_mb.board_flags & PMAC_MB_MOBILE) 1592 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N); 1593 1594 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT); 1595 1596 temp = MACIO_IN32(KEYLARGO_FCR3); 1597 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 | 1598 KL3_SHUTDOWN_PLLKW35; 1599 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE 1600 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE); 1601 if (sleep_mode) 1602 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE); 1603 MACIO_OUT32(KEYLARGO_FCR3, temp); 1604 1605 /* Flush posted writes & wait a bit */ 1606 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1607 } 1608 1609 static void 1610 intrepid_shutdown(struct macio_chip *macio, int sleep_mode) 1611 { 1612 u32 temp; 1613 1614 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE | 1615 KL0_SCC_CELL_ENABLE); 1616 1617 MACIO_BIC(KEYLARGO_FCR1, 1618 /*KL1_USB2_CELL_ENABLE |*/ 1619 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT | 1620 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE | 1621 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE); 1622 if (pmac_mb.board_flags & PMAC_MB_MOBILE) 1623 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N); 1624 1625 temp = MACIO_IN32(KEYLARGO_FCR3); 1626 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | 1627 KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE); 1628 if (sleep_mode) 1629 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE); 1630 MACIO_OUT32(KEYLARGO_FCR3, temp); 1631 1632 /* Flush posted writes & wait a bit */ 1633 (void)MACIO_IN32(KEYLARGO_FCR0); 1634 mdelay(10); 1635 } 1636 1637 1638 void pmac_tweak_clock_spreading(int enable) 1639 { 1640 struct macio_chip *macio = &macio_chips[0]; 1641 1642 /* Hack for doing clock spreading on some machines PowerBooks and 1643 * iBooks. This implements the "platform-do-clockspreading" OF 1644 * property as decoded manually on various models. For safety, we also 1645 * check the product ID in the device-tree in cases we'll whack the i2c 1646 * chip to make reasonably sure we won't set wrong values in there 1647 * 1648 * Of course, ultimately, we have to implement a real parser for 1649 * the platform-do-* stuff... 1650 */ 1651 1652 if (macio->type == macio_intrepid) { 1653 if (enable) 1654 UN_OUT(UNI_N_CLOCK_SPREADING, 2); 1655 else 1656 UN_OUT(UNI_N_CLOCK_SPREADING, 0); 1657 mdelay(40); 1658 } 1659 1660 while (machine_is_compatible("PowerBook5,2") || 1661 machine_is_compatible("PowerBook5,3") || 1662 machine_is_compatible("PowerBook6,2") || 1663 machine_is_compatible("PowerBook6,3")) { 1664 struct device_node *ui2c = of_find_node_by_type(NULL, "i2c"); 1665 struct device_node *dt = of_find_node_by_name(NULL, "device-tree"); 1666 u8 buffer[9]; 1667 u32 *productID; 1668 int i, rc, changed = 0; 1669 1670 if (dt == NULL) 1671 break; 1672 productID = (u32 *)get_property(dt, "pid#", NULL); 1673 if (productID == NULL) 1674 break; 1675 while(ui2c) { 1676 struct device_node *p = of_get_parent(ui2c); 1677 if (p && !strcmp(p->name, "uni-n")) 1678 break; 1679 ui2c = of_find_node_by_type(ui2c, "i2c"); 1680 } 1681 if (ui2c == NULL) 1682 break; 1683 DBG("Trying to bump clock speed for PID: %08x...\n", *productID); 1684 rc = pmac_low_i2c_open(ui2c, 1); 1685 if (rc != 0) 1686 break; 1687 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined); 1688 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9); 1689 DBG("read result: %d,", rc); 1690 if (rc != 0) { 1691 pmac_low_i2c_close(ui2c); 1692 break; 1693 } 1694 for (i=0; i<9; i++) 1695 DBG(" %02x", buffer[i]); 1696 DBG("\n"); 1697 1698 switch(*productID) { 1699 case 0x1182: /* AlBook 12" rev 2 */ 1700 case 0x1183: /* iBook G4 12" */ 1701 buffer[0] = (buffer[0] & 0x8f) | 0x70; 1702 buffer[2] = (buffer[2] & 0x7f) | 0x00; 1703 buffer[5] = (buffer[5] & 0x80) | 0x31; 1704 buffer[6] = (buffer[6] & 0x40) | 0xb0; 1705 buffer[7] = (buffer[7] & 0x00) | (enable ? 0xc0 : 0xba); 1706 buffer[8] = (buffer[8] & 0x00) | 0x30; 1707 changed = 1; 1708 break; 1709 case 0x3142: /* AlBook 15" (ATI M10) */ 1710 case 0x3143: /* AlBook 17" (ATI M10) */ 1711 buffer[0] = (buffer[0] & 0xaf) | 0x50; 1712 buffer[2] = (buffer[2] & 0x7f) | 0x00; 1713 buffer[5] = (buffer[5] & 0x80) | 0x31; 1714 buffer[6] = (buffer[6] & 0x40) | 0xb0; 1715 buffer[7] = (buffer[7] & 0x00) | (enable ? 0xd0 : 0xc0); 1716 buffer[8] = (buffer[8] & 0x00) | 0x30; 1717 changed = 1; 1718 break; 1719 default: 1720 DBG("i2c-hwclock: Machine model not handled\n"); 1721 break; 1722 } 1723 if (!changed) { 1724 pmac_low_i2c_close(ui2c); 1725 break; 1726 } 1727 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_stdsub); 1728 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_write, 0x80, buffer, 9); 1729 DBG("write result: %d,", rc); 1730 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined); 1731 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9); 1732 DBG("read result: %d,", rc); 1733 if (rc != 0) { 1734 pmac_low_i2c_close(ui2c); 1735 break; 1736 } 1737 for (i=0; i<9; i++) 1738 DBG(" %02x", buffer[i]); 1739 pmac_low_i2c_close(ui2c); 1740 break; 1741 } 1742 } 1743 1744 1745 static int 1746 core99_sleep(void) 1747 { 1748 struct macio_chip *macio; 1749 int i; 1750 1751 macio = &macio_chips[0]; 1752 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1753 macio->type != macio_intrepid) 1754 return -ENODEV; 1755 1756 /* We power off the wireless slot in case it was not done 1757 * by the driver. We don't power it on automatically however 1758 */ 1759 if (macio->flags & MACIO_FLAG_AIRPORT_ON) 1760 core99_airport_enable(macio->of_node, 0, 0); 1761 1762 /* We power off the FW cable. Should be done by the driver... */ 1763 if (macio->flags & MACIO_FLAG_FW_SUPPORTED) { 1764 core99_firewire_enable(NULL, 0, 0); 1765 core99_firewire_cable_power(NULL, 0, 0); 1766 } 1767 1768 /* We make sure int. modem is off (in case driver lost it) */ 1769 if (macio->type == macio_keylargo) 1770 core99_modem_enable(macio->of_node, 0, 0); 1771 else 1772 pangea_modem_enable(macio->of_node, 0, 0); 1773 1774 /* We make sure the sound is off as well */ 1775 core99_sound_chip_enable(macio->of_node, 0, 0); 1776 1777 /* 1778 * Save various bits of KeyLargo 1779 */ 1780 1781 /* Save the state of the various GPIOs */ 1782 save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0); 1783 save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1); 1784 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++) 1785 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i); 1786 for (i=0; i<KEYLARGO_GPIO_CNT; i++) 1787 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i); 1788 1789 /* Save the FCRs */ 1790 if (macio->type == macio_keylargo) 1791 save_mbcr = MACIO_IN32(KEYLARGO_MBCR); 1792 save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0); 1793 save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1); 1794 save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2); 1795 save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3); 1796 save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4); 1797 if (macio->type == macio_pangea || macio->type == macio_intrepid) 1798 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5); 1799 1800 /* Save state & config of DBDMA channels */ 1801 dbdma_save(macio, save_dbdma); 1802 1803 /* 1804 * Turn off as much as we can 1805 */ 1806 if (macio->type == macio_pangea) 1807 pangea_shutdown(macio, 1); 1808 else if (macio->type == macio_intrepid) 1809 intrepid_shutdown(macio, 1); 1810 else if (macio->type == macio_keylargo) 1811 keylargo_shutdown(macio, 1); 1812 1813 /* 1814 * Put the host bridge to sleep 1815 */ 1816 1817 save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL); 1818 /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it 1819 * enabled ! 1820 */ 1821 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl & 1822 ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/)); 1823 udelay(100); 1824 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING); 1825 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP); 1826 mdelay(10); 1827 1828 /* 1829 * FIXME: A bit of black magic with OpenPIC (don't ask me why) 1830 */ 1831 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) { 1832 MACIO_BIS(0x506e0, 0x00400000); 1833 MACIO_BIS(0x506e0, 0x80000000); 1834 } 1835 return 0; 1836 } 1837 1838 static int 1839 core99_wake_up(void) 1840 { 1841 struct macio_chip *macio; 1842 int i; 1843 1844 macio = &macio_chips[0]; 1845 if (macio->type != macio_keylargo && macio->type != macio_pangea && 1846 macio->type != macio_intrepid) 1847 return -ENODEV; 1848 1849 /* 1850 * Wakeup the host bridge 1851 */ 1852 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL); 1853 udelay(10); 1854 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING); 1855 udelay(10); 1856 1857 /* 1858 * Restore KeyLargo 1859 */ 1860 1861 if (macio->type == macio_keylargo) { 1862 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr); 1863 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10); 1864 } 1865 MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]); 1866 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10); 1867 MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]); 1868 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10); 1869 MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]); 1870 (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10); 1871 MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]); 1872 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10); 1873 MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]); 1874 (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10); 1875 if (macio->type == macio_pangea || macio->type == macio_intrepid) { 1876 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]); 1877 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10); 1878 } 1879 1880 dbdma_restore(macio, save_dbdma); 1881 1882 MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]); 1883 MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]); 1884 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++) 1885 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]); 1886 for (i=0; i<KEYLARGO_GPIO_CNT; i++) 1887 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]); 1888 1889 /* FIXME more black magic with OpenPIC ... */ 1890 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) { 1891 MACIO_BIC(0x506e0, 0x00400000); 1892 MACIO_BIC(0x506e0, 0x80000000); 1893 } 1894 1895 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl); 1896 udelay(100); 1897 1898 return 0; 1899 } 1900 1901 static long 1902 core99_sleep_state(struct device_node *node, long param, long value) 1903 { 1904 /* Param == 1 means to enter the "fake sleep" mode that is 1905 * used for CPU speed switch 1906 */ 1907 if (param == 1) { 1908 if (value == 1) { 1909 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING); 1910 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2); 1911 } else { 1912 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL); 1913 udelay(10); 1914 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING); 1915 udelay(10); 1916 } 1917 return 0; 1918 } 1919 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 1920 return -EPERM; 1921 1922 if (value == 1) 1923 return core99_sleep(); 1924 else if (value == 0) 1925 return core99_wake_up(); 1926 return 0; 1927 } 1928 1929 #endif /* CONFIG_POWER4 */ 1930 1931 static long 1932 generic_dev_can_wake(struct device_node *node, long param, long value) 1933 { 1934 /* Todo: eventually check we are really dealing with on-board 1935 * video device ... 1936 */ 1937 1938 if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP) 1939 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP; 1940 return 0; 1941 } 1942 1943 static long generic_get_mb_info(struct device_node *node, long param, long value) 1944 { 1945 switch(param) { 1946 case PMAC_MB_INFO_MODEL: 1947 return pmac_mb.model_id; 1948 case PMAC_MB_INFO_FLAGS: 1949 return pmac_mb.board_flags; 1950 case PMAC_MB_INFO_NAME: 1951 /* hack hack hack... but should work */ 1952 *((const char **)value) = pmac_mb.model_name; 1953 return 0; 1954 } 1955 return -EINVAL; 1956 } 1957 1958 1959 /* 1960 * Table definitions 1961 */ 1962 1963 /* Used on any machine 1964 */ 1965 static struct feature_table_entry any_features[] = { 1966 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info }, 1967 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake }, 1968 { 0, NULL } 1969 }; 1970 1971 #ifndef CONFIG_POWER4 1972 1973 /* OHare based motherboards. Currently, we only use these on the 1974 * 2400,3400 and 3500 series powerbooks. Some older desktops seem 1975 * to have issues with turning on/off those asic cells 1976 */ 1977 static struct feature_table_entry ohare_features[] = { 1978 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1979 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable }, 1980 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable }, 1981 { PMAC_FTR_IDE_ENABLE, ohare_ide_enable}, 1982 { PMAC_FTR_IDE_RESET, ohare_ide_reset}, 1983 { PMAC_FTR_SLEEP_STATE, ohare_sleep_state }, 1984 { 0, NULL } 1985 }; 1986 1987 /* Heathrow desktop machines (Beige G3). 1988 * Separated as some features couldn't be properly tested 1989 * and the serial port control bits appear to confuse it. 1990 */ 1991 static struct feature_table_entry heathrow_desktop_features[] = { 1992 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1993 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 1994 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 1995 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 1996 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 1997 { 0, NULL } 1998 }; 1999 2000 /* Heathrow based laptop, that is the Wallstreet and mainstreet 2001 * powerbooks. 2002 */ 2003 static struct feature_table_entry heathrow_laptop_features[] = { 2004 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 2005 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 2006 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 2007 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 2008 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 2009 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 2010 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 2011 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable }, 2012 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state }, 2013 { 0, NULL } 2014 }; 2015 2016 /* Paddington based machines 2017 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4. 2018 */ 2019 static struct feature_table_entry paddington_features[] = { 2020 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 2021 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 2022 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 2023 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 2024 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 2025 { PMAC_FTR_IDE_RESET, heathrow_ide_reset }, 2026 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable }, 2027 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable }, 2028 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state }, 2029 { 0, NULL } 2030 }; 2031 2032 /* Core99 & MacRISC 2 machines (all machines released since the 2033 * iBook (included), that is all AGP machines, except pangea 2034 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo 2035 * used on iBook2 & iMac "flow power". 2036 */ 2037 static struct feature_table_entry core99_features[] = { 2038 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2039 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable }, 2040 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2041 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2042 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 2043 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 2044 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 2045 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 2046 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 2047 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 2048 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 2049 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 2050 #ifdef CONFIG_SMP 2051 { PMAC_FTR_RESET_CPU, core99_reset_cpu }, 2052 #endif /* CONFIG_SMP */ 2053 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2054 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2055 { 0, NULL } 2056 }; 2057 2058 /* RackMac 2059 */ 2060 static struct feature_table_entry rackmac_features[] = { 2061 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2062 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2063 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2064 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 2065 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 2066 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 2067 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 2068 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 2069 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 2070 #ifdef CONFIG_SMP 2071 { PMAC_FTR_RESET_CPU, core99_reset_cpu }, 2072 #endif /* CONFIG_SMP */ 2073 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2074 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2075 { 0, NULL } 2076 }; 2077 2078 /* Pangea features 2079 */ 2080 static struct feature_table_entry pangea_features[] = { 2081 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2082 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2083 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2084 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2085 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 2086 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 2087 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 2088 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 2089 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 2090 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 2091 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 2092 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 2093 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2094 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2095 { 0, NULL } 2096 }; 2097 2098 /* Intrepid features 2099 */ 2100 static struct feature_table_entry intrepid_features[] = { 2101 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2102 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2103 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2104 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2105 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable }, 2106 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset }, 2107 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable }, 2108 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable }, 2109 { PMAC_FTR_USB_ENABLE, core99_usb_enable }, 2110 { PMAC_FTR_1394_ENABLE, core99_firewire_enable }, 2111 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power }, 2112 { PMAC_FTR_SLEEP_STATE, core99_sleep_state }, 2113 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2114 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2115 { PMAC_FTR_AACK_DELAY_ENABLE, intrepid_aack_delay_enable }, 2116 { 0, NULL } 2117 }; 2118 2119 #else /* CONFIG_POWER4 */ 2120 2121 /* G5 features 2122 */ 2123 static struct feature_table_entry g5_features[] = { 2124 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable }, 2125 { PMAC_FTR_1394_ENABLE, g5_fw_enable }, 2126 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable }, 2127 { PMAC_FTR_GMAC_PHY_RESET, g5_eth_phy_reset }, 2128 { PMAC_FTR_SOUND_CHIP_ENABLE, g5_i2s_enable }, 2129 #ifdef CONFIG_SMP 2130 { PMAC_FTR_RESET_CPU, g5_reset_cpu }, 2131 #endif /* CONFIG_SMP */ 2132 { PMAC_FTR_READ_GPIO, core99_read_gpio }, 2133 { PMAC_FTR_WRITE_GPIO, core99_write_gpio }, 2134 { 0, NULL } 2135 }; 2136 2137 #endif /* CONFIG_POWER4 */ 2138 2139 static struct pmac_mb_def pmac_mb_defs[] = { 2140 #ifndef CONFIG_POWER4 2141 /* 2142 * Desktops 2143 */ 2144 2145 { "AAPL,8500", "PowerMac 8500/8600", 2146 PMAC_TYPE_PSURGE, NULL, 2147 0 2148 }, 2149 { "AAPL,9500", "PowerMac 9500/9600", 2150 PMAC_TYPE_PSURGE, NULL, 2151 0 2152 }, 2153 { "AAPL,7200", "PowerMac 7200", 2154 PMAC_TYPE_PSURGE, NULL, 2155 0 2156 }, 2157 { "AAPL,7300", "PowerMac 7200/7300", 2158 PMAC_TYPE_PSURGE, NULL, 2159 0 2160 }, 2161 { "AAPL,7500", "PowerMac 7500", 2162 PMAC_TYPE_PSURGE, NULL, 2163 0 2164 }, 2165 { "AAPL,ShinerESB", "Apple Network Server", 2166 PMAC_TYPE_ANS, NULL, 2167 0 2168 }, 2169 { "AAPL,e407", "Alchemy", 2170 PMAC_TYPE_ALCHEMY, NULL, 2171 0 2172 }, 2173 { "AAPL,e411", "Gazelle", 2174 PMAC_TYPE_GAZELLE, NULL, 2175 0 2176 }, 2177 { "AAPL,Gossamer", "PowerMac G3 (Gossamer)", 2178 PMAC_TYPE_GOSSAMER, heathrow_desktop_features, 2179 0 2180 }, 2181 { "AAPL,PowerMac G3", "PowerMac G3 (Silk)", 2182 PMAC_TYPE_SILK, heathrow_desktop_features, 2183 0 2184 }, 2185 { "PowerMac1,1", "Blue&White G3", 2186 PMAC_TYPE_YOSEMITE, paddington_features, 2187 0 2188 }, 2189 { "PowerMac1,2", "PowerMac G4 PCI Graphics", 2190 PMAC_TYPE_YIKES, paddington_features, 2191 0 2192 }, 2193 { "PowerMac2,1", "iMac FireWire", 2194 PMAC_TYPE_FW_IMAC, core99_features, 2195 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2196 }, 2197 { "PowerMac2,2", "iMac FireWire", 2198 PMAC_TYPE_FW_IMAC, core99_features, 2199 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2200 }, 2201 { "PowerMac3,1", "PowerMac G4 AGP Graphics", 2202 PMAC_TYPE_SAWTOOTH, core99_features, 2203 PMAC_MB_OLD_CORE99 2204 }, 2205 { "PowerMac3,2", "PowerMac G4 AGP Graphics", 2206 PMAC_TYPE_SAWTOOTH, core99_features, 2207 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2208 }, 2209 { "PowerMac3,3", "PowerMac G4 AGP Graphics", 2210 PMAC_TYPE_SAWTOOTH, core99_features, 2211 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2212 }, 2213 { "PowerMac3,4", "PowerMac G4 Silver", 2214 PMAC_TYPE_QUICKSILVER, core99_features, 2215 PMAC_MB_MAY_SLEEP 2216 }, 2217 { "PowerMac3,5", "PowerMac G4 Silver", 2218 PMAC_TYPE_QUICKSILVER, core99_features, 2219 PMAC_MB_MAY_SLEEP 2220 }, 2221 { "PowerMac3,6", "PowerMac G4 Windtunnel", 2222 PMAC_TYPE_WINDTUNNEL, core99_features, 2223 PMAC_MB_MAY_SLEEP, 2224 }, 2225 { "PowerMac4,1", "iMac \"Flower Power\"", 2226 PMAC_TYPE_PANGEA_IMAC, pangea_features, 2227 PMAC_MB_MAY_SLEEP 2228 }, 2229 { "PowerMac4,2", "Flat panel iMac", 2230 PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features, 2231 PMAC_MB_CAN_SLEEP 2232 }, 2233 { "PowerMac4,4", "eMac", 2234 PMAC_TYPE_EMAC, core99_features, 2235 PMAC_MB_MAY_SLEEP 2236 }, 2237 { "PowerMac5,1", "PowerMac G4 Cube", 2238 PMAC_TYPE_CUBE, core99_features, 2239 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99 2240 }, 2241 { "PowerMac6,1", "Flat panel iMac", 2242 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2243 PMAC_MB_MAY_SLEEP, 2244 }, 2245 { "PowerMac6,3", "Flat panel iMac", 2246 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2247 PMAC_MB_MAY_SLEEP, 2248 }, 2249 { "PowerMac6,4", "eMac", 2250 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2251 PMAC_MB_MAY_SLEEP, 2252 }, 2253 { "PowerMac10,1", "Mac mini", 2254 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2255 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER, 2256 }, 2257 { "iMac,1", "iMac (first generation)", 2258 PMAC_TYPE_ORIG_IMAC, paddington_features, 2259 0 2260 }, 2261 2262 /* 2263 * Xserve's 2264 */ 2265 2266 { "RackMac1,1", "XServe", 2267 PMAC_TYPE_RACKMAC, rackmac_features, 2268 0, 2269 }, 2270 { "RackMac1,2", "XServe rev. 2", 2271 PMAC_TYPE_RACKMAC, rackmac_features, 2272 0, 2273 }, 2274 2275 /* 2276 * Laptops 2277 */ 2278 2279 { "AAPL,3400/2400", "PowerBook 3400", 2280 PMAC_TYPE_HOOPER, ohare_features, 2281 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2282 }, 2283 { "AAPL,3500", "PowerBook 3500", 2284 PMAC_TYPE_KANGA, ohare_features, 2285 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2286 }, 2287 { "AAPL,PowerBook1998", "PowerBook Wallstreet", 2288 PMAC_TYPE_WALLSTREET, heathrow_laptop_features, 2289 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2290 }, 2291 { "PowerBook1,1", "PowerBook 101 (Lombard)", 2292 PMAC_TYPE_101_PBOOK, paddington_features, 2293 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE 2294 }, 2295 { "PowerBook2,1", "iBook (first generation)", 2296 PMAC_TYPE_ORIG_IBOOK, core99_features, 2297 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE 2298 }, 2299 { "PowerBook2,2", "iBook FireWire", 2300 PMAC_TYPE_FW_IBOOK, core99_features, 2301 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | 2302 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE 2303 }, 2304 { "PowerBook3,1", "PowerBook Pismo", 2305 PMAC_TYPE_PISMO, core99_features, 2306 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | 2307 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE 2308 }, 2309 { "PowerBook3,2", "PowerBook Titanium", 2310 PMAC_TYPE_TITANIUM, core99_features, 2311 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2312 }, 2313 { "PowerBook3,3", "PowerBook Titanium II", 2314 PMAC_TYPE_TITANIUM2, core99_features, 2315 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2316 }, 2317 { "PowerBook3,4", "PowerBook Titanium III", 2318 PMAC_TYPE_TITANIUM3, core99_features, 2319 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2320 }, 2321 { "PowerBook3,5", "PowerBook Titanium IV", 2322 PMAC_TYPE_TITANIUM4, core99_features, 2323 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2324 }, 2325 { "PowerBook4,1", "iBook 2", 2326 PMAC_TYPE_IBOOK2, pangea_features, 2327 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2328 }, 2329 { "PowerBook4,2", "iBook 2", 2330 PMAC_TYPE_IBOOK2, pangea_features, 2331 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2332 }, 2333 { "PowerBook4,3", "iBook 2 rev. 2", 2334 PMAC_TYPE_IBOOK2, pangea_features, 2335 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE 2336 }, 2337 { "PowerBook5,1", "PowerBook G4 17\"", 2338 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2339 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2340 }, 2341 { "PowerBook5,2", "PowerBook G4 15\"", 2342 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2343 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2344 }, 2345 { "PowerBook5,3", "PowerBook G4 17\"", 2346 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2347 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2348 }, 2349 { "PowerBook5,4", "PowerBook G4 15\"", 2350 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2351 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2352 }, 2353 { "PowerBook5,5", "PowerBook G4 17\"", 2354 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2355 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2356 }, 2357 { "PowerBook5,6", "PowerBook G4 15\"", 2358 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2359 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2360 }, 2361 { "PowerBook5,7", "PowerBook G4 17\"", 2362 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2363 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2364 }, 2365 { "PowerBook6,1", "PowerBook G4 12\"", 2366 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2367 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2368 }, 2369 { "PowerBook6,2", "PowerBook G4", 2370 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2371 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2372 }, 2373 { "PowerBook6,3", "iBook G4", 2374 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2375 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2376 }, 2377 { "PowerBook6,4", "PowerBook G4 12\"", 2378 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2379 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2380 }, 2381 { "PowerBook6,5", "iBook G4", 2382 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2383 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2384 }, 2385 { "PowerBook6,7", "iBook G4", 2386 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2387 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2388 }, 2389 { "PowerBook6,8", "PowerBook G4 12\"", 2390 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, 2391 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, 2392 }, 2393 #else /* CONFIG_POWER4 */ 2394 { "PowerMac7,2", "PowerMac G5", 2395 PMAC_TYPE_POWERMAC_G5, g5_features, 2396 0, 2397 }, 2398 #ifdef CONFIG_PPC64 2399 { "PowerMac7,3", "PowerMac G5", 2400 PMAC_TYPE_POWERMAC_G5, g5_features, 2401 0, 2402 }, 2403 { "PowerMac8,1", "iMac G5", 2404 PMAC_TYPE_IMAC_G5, g5_features, 2405 0, 2406 }, 2407 { "PowerMac9,1", "PowerMac G5", 2408 PMAC_TYPE_POWERMAC_G5_U3L, g5_features, 2409 0, 2410 }, 2411 { "RackMac3,1", "XServe G5", 2412 PMAC_TYPE_XSERVE_G5, g5_features, 2413 0, 2414 }, 2415 #endif /* CONFIG_PPC64 */ 2416 #endif /* CONFIG_POWER4 */ 2417 }; 2418 2419 /* 2420 * The toplevel feature_call callback 2421 */ 2422 long pmac_do_feature_call(unsigned int selector, ...) 2423 { 2424 struct device_node *node; 2425 long param, value; 2426 int i; 2427 feature_call func = NULL; 2428 va_list args; 2429 2430 if (pmac_mb.features) 2431 for (i=0; pmac_mb.features[i].function; i++) 2432 if (pmac_mb.features[i].selector == selector) { 2433 func = pmac_mb.features[i].function; 2434 break; 2435 } 2436 if (!func) 2437 for (i=0; any_features[i].function; i++) 2438 if (any_features[i].selector == selector) { 2439 func = any_features[i].function; 2440 break; 2441 } 2442 if (!func) 2443 return -ENODEV; 2444 2445 va_start(args, selector); 2446 node = (struct device_node*)va_arg(args, void*); 2447 param = va_arg(args, long); 2448 value = va_arg(args, long); 2449 va_end(args); 2450 2451 return func(node, param, value); 2452 } 2453 2454 static int __init probe_motherboard(void) 2455 { 2456 int i; 2457 struct macio_chip *macio = &macio_chips[0]; 2458 const char *model = NULL; 2459 struct device_node *dt; 2460 2461 /* Lookup known motherboard type in device-tree. First try an 2462 * exact match on the "model" property, then try a "compatible" 2463 * match is none is found. 2464 */ 2465 dt = find_devices("device-tree"); 2466 if (dt != NULL) 2467 model = (const char *) get_property(dt, "model", NULL); 2468 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) { 2469 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) { 2470 pmac_mb = pmac_mb_defs[i]; 2471 goto found; 2472 } 2473 } 2474 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) { 2475 if (machine_is_compatible(pmac_mb_defs[i].model_string)) { 2476 pmac_mb = pmac_mb_defs[i]; 2477 goto found; 2478 } 2479 } 2480 2481 /* Fallback to selection depending on mac-io chip type */ 2482 switch(macio->type) { 2483 #ifndef CONFIG_POWER4 2484 case macio_grand_central: 2485 pmac_mb.model_id = PMAC_TYPE_PSURGE; 2486 pmac_mb.model_name = "Unknown PowerSurge"; 2487 break; 2488 case macio_ohare: 2489 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE; 2490 pmac_mb.model_name = "Unknown OHare-based"; 2491 break; 2492 case macio_heathrow: 2493 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW; 2494 pmac_mb.model_name = "Unknown Heathrow-based"; 2495 pmac_mb.features = heathrow_desktop_features; 2496 break; 2497 case macio_paddington: 2498 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON; 2499 pmac_mb.model_name = "Unknown Paddington-based"; 2500 pmac_mb.features = paddington_features; 2501 break; 2502 case macio_keylargo: 2503 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99; 2504 pmac_mb.model_name = "Unknown Keylargo-based"; 2505 pmac_mb.features = core99_features; 2506 break; 2507 case macio_pangea: 2508 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA; 2509 pmac_mb.model_name = "Unknown Pangea-based"; 2510 pmac_mb.features = pangea_features; 2511 break; 2512 case macio_intrepid: 2513 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID; 2514 pmac_mb.model_name = "Unknown Intrepid-based"; 2515 pmac_mb.features = intrepid_features; 2516 break; 2517 #else /* CONFIG_POWER4 */ 2518 case macio_keylargo2: 2519 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2; 2520 pmac_mb.model_name = "Unknown K2-based"; 2521 pmac_mb.features = g5_features; 2522 break; 2523 #endif /* CONFIG_POWER4 */ 2524 default: 2525 return -ENODEV; 2526 } 2527 found: 2528 #ifndef CONFIG_POWER4 2529 /* Fixup Hooper vs. Comet */ 2530 if (pmac_mb.model_id == PMAC_TYPE_HOOPER) { 2531 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4); 2532 if (!mach_id_ptr) 2533 return -ENODEV; 2534 /* Here, I used to disable the media-bay on comet. It 2535 * appears this is wrong, the floppy connector is actually 2536 * a kind of media-bay and works with the current driver. 2537 */ 2538 if (__raw_readl(mach_id_ptr) & 0x20000000UL) 2539 pmac_mb.model_id = PMAC_TYPE_COMET; 2540 iounmap(mach_id_ptr); 2541 } 2542 #endif /* CONFIG_POWER4 */ 2543 2544 #ifdef CONFIG_6xx 2545 /* Set default value of powersave_nap on machines that support it. 2546 * It appears that uninorth rev 3 has a problem with it, we don't 2547 * enable it on those. In theory, the flush-on-lock property is 2548 * supposed to be set when not supported, but I'm not very confident 2549 * that all Apple OF revs did it properly, I do it the paranoid way. 2550 */ 2551 while (uninorth_base && uninorth_rev > 3) { 2552 struct device_node *np = find_path_device("/cpus"); 2553 if (!np || !np->child) { 2554 printk(KERN_WARNING "Can't find CPU(s) in device tree !\n"); 2555 break; 2556 } 2557 np = np->child; 2558 /* Nap mode not supported on SMP */ 2559 if (np->sibling) 2560 break; 2561 /* Nap mode not supported if flush-on-lock property is present */ 2562 if (get_property(np, "flush-on-lock", NULL)) 2563 break; 2564 powersave_nap = 1; 2565 printk(KERN_INFO "Processor NAP mode on idle enabled.\n"); 2566 break; 2567 } 2568 2569 /* On CPUs that support it (750FX), lowspeed by default during 2570 * NAP mode 2571 */ 2572 powersave_lowspeed = 1; 2573 #endif /* CONFIG_6xx */ 2574 #ifdef CONFIG_POWER4 2575 powersave_nap = 1; 2576 #endif 2577 /* Check for "mobile" machine */ 2578 if (model && (strncmp(model, "PowerBook", 9) == 0 2579 || strncmp(model, "iBook", 5) == 0)) 2580 pmac_mb.board_flags |= PMAC_MB_MOBILE; 2581 2582 2583 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name); 2584 return 0; 2585 } 2586 2587 /* Initialize the Core99 UniNorth host bridge and memory controller 2588 */ 2589 static void __init probe_uninorth(void) 2590 { 2591 unsigned long actrl; 2592 2593 /* Locate core99 Uni-N */ 2594 uninorth_node = of_find_node_by_name(NULL, "uni-n"); 2595 /* Locate G5 u3 */ 2596 if (uninorth_node == NULL) { 2597 uninorth_node = of_find_node_by_name(NULL, "u3"); 2598 uninorth_u3 = 1; 2599 } 2600 if (uninorth_node && uninorth_node->n_addrs > 0) { 2601 unsigned long address = uninorth_node->addrs[0].address; 2602 uninorth_base = ioremap(address, 0x40000); 2603 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION)); 2604 if (uninorth_u3) 2605 u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000); 2606 } else 2607 uninorth_node = NULL; 2608 2609 if (!uninorth_node) 2610 return; 2611 2612 printk(KERN_INFO "Found %s memory controller & host bridge, revision: %d\n", 2613 uninorth_u3 ? "U3" : "UniNorth", uninorth_rev); 2614 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base); 2615 2616 /* Set the arbitrer QAck delay according to what Apple does 2617 */ 2618 if (uninorth_rev < 0x11) { 2619 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK; 2620 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 : 2621 UNI_N_ARB_CTRL_QACK_DELAY) << UNI_N_ARB_CTRL_QACK_DELAY_SHIFT; 2622 UN_OUT(UNI_N_ARB_CTRL, actrl); 2623 } 2624 2625 /* Some more magic as done by them in recent MacOS X on UniNorth 2626 * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI 2627 * memory timeout 2628 */ 2629 if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) || uninorth_rev == 0xc0) 2630 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff); 2631 } 2632 2633 static void __init probe_one_macio(const char *name, const char *compat, int type) 2634 { 2635 struct device_node* node; 2636 int i; 2637 volatile u32 __iomem * base; 2638 u32* revp; 2639 2640 node = find_devices(name); 2641 if (!node || !node->n_addrs) 2642 return; 2643 if (compat) 2644 do { 2645 if (device_is_compatible(node, compat)) 2646 break; 2647 node = node->next; 2648 } while (node); 2649 if (!node) 2650 return; 2651 for(i=0; i<MAX_MACIO_CHIPS; i++) { 2652 if (!macio_chips[i].of_node) 2653 break; 2654 if (macio_chips[i].of_node == node) 2655 return; 2656 } 2657 if (i >= MAX_MACIO_CHIPS) { 2658 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n"); 2659 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name); 2660 return; 2661 } 2662 base = ioremap(node->addrs[0].address, node->addrs[0].size); 2663 if (!base) { 2664 printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n"); 2665 return; 2666 } 2667 if (type == macio_keylargo) { 2668 u32 *did = (u32 *)get_property(node, "device-id", NULL); 2669 if (*did == 0x00000025) 2670 type = macio_pangea; 2671 if (*did == 0x0000003e) 2672 type = macio_intrepid; 2673 } 2674 macio_chips[i].of_node = node; 2675 macio_chips[i].type = type; 2676 macio_chips[i].base = base; 2677 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON; 2678 macio_chips[i].name = macio_names[type]; 2679 revp = (u32 *)get_property(node, "revision-id", NULL); 2680 if (revp) 2681 macio_chips[i].rev = *revp; 2682 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n", 2683 macio_names[type], macio_chips[i].rev, macio_chips[i].base); 2684 } 2685 2686 static int __init 2687 probe_macios(void) 2688 { 2689 /* Warning, ordering is important */ 2690 probe_one_macio("gc", NULL, macio_grand_central); 2691 probe_one_macio("ohare", NULL, macio_ohare); 2692 probe_one_macio("pci106b,7", NULL, macio_ohareII); 2693 probe_one_macio("mac-io", "keylargo", macio_keylargo); 2694 probe_one_macio("mac-io", "paddington", macio_paddington); 2695 probe_one_macio("mac-io", "gatwick", macio_gatwick); 2696 probe_one_macio("mac-io", "heathrow", macio_heathrow); 2697 probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2); 2698 2699 /* Make sure the "main" macio chip appear first */ 2700 if (macio_chips[0].type == macio_gatwick 2701 && macio_chips[1].type == macio_heathrow) { 2702 struct macio_chip temp = macio_chips[0]; 2703 macio_chips[0] = macio_chips[1]; 2704 macio_chips[1] = temp; 2705 } 2706 if (macio_chips[0].type == macio_ohareII 2707 && macio_chips[1].type == macio_ohare) { 2708 struct macio_chip temp = macio_chips[0]; 2709 macio_chips[0] = macio_chips[1]; 2710 macio_chips[1] = temp; 2711 } 2712 macio_chips[0].lbus.index = 0; 2713 macio_chips[1].lbus.index = 1; 2714 2715 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0; 2716 } 2717 2718 static void __init 2719 initial_serial_shutdown(struct device_node *np) 2720 { 2721 int len; 2722 struct slot_names_prop { 2723 int count; 2724 char name[1]; 2725 } *slots; 2726 char *conn; 2727 int port_type = PMAC_SCC_ASYNC; 2728 int modem = 0; 2729 2730 slots = (struct slot_names_prop *)get_property(np, "slot-names", &len); 2731 conn = get_property(np, "AAPL,connector", &len); 2732 if (conn && (strcmp(conn, "infrared") == 0)) 2733 port_type = PMAC_SCC_IRDA; 2734 else if (device_is_compatible(np, "cobalt")) 2735 modem = 1; 2736 else if (slots && slots->count > 0) { 2737 if (strcmp(slots->name, "IrDA") == 0) 2738 port_type = PMAC_SCC_IRDA; 2739 else if (strcmp(slots->name, "Modem") == 0) 2740 modem = 1; 2741 } 2742 if (modem) 2743 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0); 2744 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0); 2745 } 2746 2747 static void __init 2748 set_initial_features(void) 2749 { 2750 struct device_node *np; 2751 2752 /* That hack appears to be necessary for some StarMax motherboards 2753 * but I'm not too sure it was audited for side-effects on other 2754 * ohare based machines... 2755 * Since I still have difficulties figuring the right way to 2756 * differenciate them all and since that hack was there for a long 2757 * time, I'll keep it around 2758 */ 2759 if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) { 2760 struct macio_chip *macio = &macio_chips[0]; 2761 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES); 2762 } else if (macio_chips[0].type == macio_ohare) { 2763 struct macio_chip *macio = &macio_chips[0]; 2764 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 2765 } else if (macio_chips[1].type == macio_ohare) { 2766 struct macio_chip *macio = &macio_chips[1]; 2767 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE); 2768 } 2769 2770 #ifdef CONFIG_POWER4 2771 if (macio_chips[0].type == macio_keylargo2) { 2772 #ifndef CONFIG_SMP 2773 /* On SMP machines running UP, we have the second CPU eating 2774 * bus cycles. We need to take it off the bus. This is done 2775 * from pmac_smp for SMP kernels running on one CPU 2776 */ 2777 np = of_find_node_by_type(NULL, "cpu"); 2778 if (np != NULL) 2779 np = of_find_node_by_type(np, "cpu"); 2780 if (np != NULL) { 2781 g5_phy_disable_cpu1(); 2782 of_node_put(np); 2783 } 2784 #endif /* CONFIG_SMP */ 2785 /* Enable GMAC for now for PCI probing. It will be disabled 2786 * later on after PCI probe 2787 */ 2788 np = of_find_node_by_name(NULL, "ethernet"); 2789 while(np) { 2790 if (device_is_compatible(np, "K2-GMAC")) 2791 g5_gmac_enable(np, 0, 1); 2792 np = of_find_node_by_name(np, "ethernet"); 2793 } 2794 2795 /* Enable FW before PCI probe. Will be disabled later on 2796 * Note: We should have a batter way to check that we are 2797 * dealing with uninorth internal cell and not a PCI cell 2798 * on the external PCI. The code below works though. 2799 */ 2800 np = of_find_node_by_name(NULL, "firewire"); 2801 while(np) { 2802 if (device_is_compatible(np, "pci106b,5811")) { 2803 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED; 2804 g5_fw_enable(np, 0, 1); 2805 } 2806 np = of_find_node_by_name(np, "firewire"); 2807 } 2808 } 2809 #else /* CONFIG_POWER4 */ 2810 2811 if (macio_chips[0].type == macio_keylargo || 2812 macio_chips[0].type == macio_pangea || 2813 macio_chips[0].type == macio_intrepid) { 2814 /* Enable GMAC for now for PCI probing. It will be disabled 2815 * later on after PCI probe 2816 */ 2817 np = of_find_node_by_name(NULL, "ethernet"); 2818 while(np) { 2819 if (np->parent 2820 && device_is_compatible(np->parent, "uni-north") 2821 && device_is_compatible(np, "gmac")) 2822 core99_gmac_enable(np, 0, 1); 2823 np = of_find_node_by_name(np, "ethernet"); 2824 } 2825 2826 /* Enable FW before PCI probe. Will be disabled later on 2827 * Note: We should have a batter way to check that we are 2828 * dealing with uninorth internal cell and not a PCI cell 2829 * on the external PCI. The code below works though. 2830 */ 2831 np = of_find_node_by_name(NULL, "firewire"); 2832 while(np) { 2833 if (np->parent 2834 && device_is_compatible(np->parent, "uni-north") 2835 && (device_is_compatible(np, "pci106b,18") || 2836 device_is_compatible(np, "pci106b,30") || 2837 device_is_compatible(np, "pci11c1,5811"))) { 2838 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED; 2839 core99_firewire_enable(np, 0, 1); 2840 } 2841 np = of_find_node_by_name(np, "firewire"); 2842 } 2843 2844 /* Enable ATA-100 before PCI probe. */ 2845 np = of_find_node_by_name(NULL, "ata-6"); 2846 while(np) { 2847 if (np->parent 2848 && device_is_compatible(np->parent, "uni-north") 2849 && device_is_compatible(np, "kauai-ata")) { 2850 core99_ata100_enable(np, 1); 2851 } 2852 np = of_find_node_by_name(np, "ata-6"); 2853 } 2854 2855 /* Switch airport off */ 2856 np = find_devices("radio"); 2857 while(np) { 2858 if (np && np->parent == macio_chips[0].of_node) { 2859 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON; 2860 core99_airport_enable(np, 0, 0); 2861 } 2862 np = np->next; 2863 } 2864 } 2865 2866 /* On all machines that support sound PM, switch sound off */ 2867 if (macio_chips[0].of_node) 2868 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE, 2869 macio_chips[0].of_node, 0, 0); 2870 2871 /* While on some desktop G3s, we turn it back on */ 2872 if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow 2873 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER || 2874 pmac_mb.model_id == PMAC_TYPE_SILK)) { 2875 struct macio_chip *macio = &macio_chips[0]; 2876 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE); 2877 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N); 2878 } 2879 2880 /* Some machine models need the clock chip to be properly setup for 2881 * clock spreading now. This should be a platform function but we 2882 * don't do these at the moment 2883 */ 2884 pmac_tweak_clock_spreading(1); 2885 2886 #endif /* CONFIG_POWER4 */ 2887 2888 /* On all machines, switch modem & serial ports off */ 2889 np = find_devices("ch-a"); 2890 while(np) { 2891 initial_serial_shutdown(np); 2892 np = np->next; 2893 } 2894 np = find_devices("ch-b"); 2895 while(np) { 2896 initial_serial_shutdown(np); 2897 np = np->next; 2898 } 2899 } 2900 2901 void __init 2902 pmac_feature_init(void) 2903 { 2904 /* Detect the UniNorth memory controller */ 2905 probe_uninorth(); 2906 2907 /* Probe mac-io controllers */ 2908 if (probe_macios()) { 2909 printk(KERN_WARNING "No mac-io chip found\n"); 2910 return; 2911 } 2912 2913 /* Setup low-level i2c stuffs */ 2914 pmac_init_low_i2c(); 2915 2916 /* Probe machine type */ 2917 if (probe_motherboard()) 2918 printk(KERN_WARNING "Unknown PowerMac !\n"); 2919 2920 /* Set some initial features (turn off some chips that will 2921 * be later turned on) 2922 */ 2923 set_initial_features(); 2924 } 2925 2926 int __init pmac_feature_late_init(void) 2927 { 2928 #if 0 2929 struct device_node *np; 2930 2931 /* Request some resources late */ 2932 if (uninorth_node) 2933 request_OF_resource(uninorth_node, 0, NULL); 2934 np = find_devices("hammerhead"); 2935 if (np) 2936 request_OF_resource(np, 0, NULL); 2937 np = find_devices("interrupt-controller"); 2938 if (np) 2939 request_OF_resource(np, 0, NULL); 2940 #endif 2941 return 0; 2942 } 2943 2944 device_initcall(pmac_feature_late_init); 2945 2946 #if 0 2947 static void dump_HT_speeds(char *name, u32 cfg, u32 frq) 2948 { 2949 int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 }; 2950 int bits[8] = { 8,16,0,32,2,4,0,0 }; 2951 int freq = (frq >> 8) & 0xf; 2952 2953 if (freqs[freq] == 0) 2954 printk("%s: Unknown HT link frequency %x\n", name, freq); 2955 else 2956 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n", 2957 name, freqs[freq], 2958 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]); 2959 } 2960 2961 void __init pmac_check_ht_link(void) 2962 { 2963 u32 ufreq, freq, ucfg, cfg; 2964 struct device_node *pcix_node; 2965 u8 px_bus, px_devfn; 2966 struct pci_controller *px_hose; 2967 2968 (void)in_be32(u3_ht + U3_HT_LINK_COMMAND); 2969 ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG); 2970 ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ); 2971 dump_HT_speeds("U3 HyperTransport", cfg, freq); 2972 2973 pcix_node = of_find_compatible_node(NULL, "pci", "pci-x"); 2974 if (pcix_node == NULL) { 2975 printk("No PCI-X bridge found\n"); 2976 return; 2977 } 2978 if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) { 2979 printk("PCI-X bridge found but not matched to pci\n"); 2980 return; 2981 } 2982 px_hose = pci_find_hose_for_OF_device(pcix_node); 2983 if (px_hose == NULL) { 2984 printk("PCI-X bridge found but not matched to host\n"); 2985 return; 2986 } 2987 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg); 2988 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq); 2989 dump_HT_speeds("PCI-X HT Uplink", cfg, freq); 2990 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg); 2991 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq); 2992 dump_HT_speeds("PCI-X HT Downlink", cfg, freq); 2993 } 2994 #endif /* 0 */ 2995 2996 /* 2997 * Early video resume hook 2998 */ 2999 3000 static void (*pmac_early_vresume_proc)(void *data); 3001 static void *pmac_early_vresume_data; 3002 3003 void pmac_set_early_video_resume(void (*proc)(void *data), void *data) 3004 { 3005 if (_machine != _MACH_Pmac) 3006 return; 3007 preempt_disable(); 3008 pmac_early_vresume_proc = proc; 3009 pmac_early_vresume_data = data; 3010 preempt_enable(); 3011 } 3012 EXPORT_SYMBOL(pmac_set_early_video_resume); 3013 3014 void pmac_call_early_video_resume(void) 3015 { 3016 if (pmac_early_vresume_proc) 3017 pmac_early_vresume_proc(pmac_early_vresume_data); 3018 } 3019 3020 /* 3021 * AGP related suspend/resume code 3022 */ 3023 3024 static struct pci_dev *pmac_agp_bridge; 3025 static int (*pmac_agp_suspend)(struct pci_dev *bridge); 3026 static int (*pmac_agp_resume)(struct pci_dev *bridge); 3027 3028 void pmac_register_agp_pm(struct pci_dev *bridge, 3029 int (*suspend)(struct pci_dev *bridge), 3030 int (*resume)(struct pci_dev *bridge)) 3031 { 3032 if (suspend || resume) { 3033 pmac_agp_bridge = bridge; 3034 pmac_agp_suspend = suspend; 3035 pmac_agp_resume = resume; 3036 return; 3037 } 3038 if (bridge != pmac_agp_bridge) 3039 return; 3040 pmac_agp_suspend = pmac_agp_resume = NULL; 3041 return; 3042 } 3043 EXPORT_SYMBOL(pmac_register_agp_pm); 3044 3045 void pmac_suspend_agp_for_card(struct pci_dev *dev) 3046 { 3047 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL) 3048 return; 3049 if (pmac_agp_bridge->bus != dev->bus) 3050 return; 3051 pmac_agp_suspend(pmac_agp_bridge); 3052 } 3053 EXPORT_SYMBOL(pmac_suspend_agp_for_card); 3054 3055 void pmac_resume_agp_for_card(struct pci_dev *dev) 3056 { 3057 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL) 3058 return; 3059 if (pmac_agp_bridge->bus != dev->bus) 3060 return; 3061 pmac_agp_resume(pmac_agp_bridge); 3062 } 3063 EXPORT_SYMBOL(pmac_resume_agp_for_card); 3064