idle_6xx.S (3d5271f9883cba7b54762bc4fe027d4172f06db7) idle_6xx.S (a0652fc9a28c3ef8cd59264bfcb089c44d1b0e06)
1/*
2 * This file contains the power_save function for 6xx & 7xxx CPUs
3 * rewritten in assembler
4 *
5 * Warning ! This code assumes that if your machine has a 750fx
6 * it will have PLL 1 set to low speed mode (used during NAP/DOZE).
7 * if this is not the case some additional changes will have to
8 * be done to check a runtime var (a bit like powersave-nap)

--- 73 unchanged lines hidden (view full) ---

82 cmpwi 0,r4,0
83 beq 1f
84 lis r3,HID0_NAP@h
851:
86END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
87 cmpwi 0,r3,0
88 beqlr
89
1/*
2 * This file contains the power_save function for 6xx & 7xxx CPUs
3 * rewritten in assembler
4 *
5 * Warning ! This code assumes that if your machine has a 750fx
6 * it will have PLL 1 set to low speed mode (used during NAP/DOZE).
7 * if this is not the case some additional changes will have to
8 * be done to check a runtime var (a bit like powersave-nap)

--- 73 unchanged lines hidden (view full) ---

82 cmpwi 0,r4,0
83 beq 1f
84 lis r3,HID0_NAP@h
851:
86END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
87 cmpwi 0,r3,0
88 beqlr
89
90 /* Clear MSR:EE */
91 mfmsr r7
92 rlwinm r0,r7,0,17,15
93 mtmsr r0
94
95 /* Check current_thread_info()->flags */
96 rlwinm r4,r1,0,0,18
97 lwz r4,TI_FLAGS(r4)
98 andi. r0,r4,_TIF_NEED_RESCHED
99 beq 1f
100 mtmsr r7 /* out of line this ? */
101 blr
1021:
103 /* Some pre-nap cleanups needed on some CPUs */
104 andis. r0,r3,HID0_NAP@h
105 beq 2f
106BEGIN_FTR_SECTION
107 /* Disable L2 prefetch on some 745x and try to ensure
108 * L2 prefetch engines are idle. As explained by errata
109 * text, we can't be sure they are, we just hope very hard
110 * that well be enough (sic !). At least I noticed Apple

--- 104 unchanged lines hidden (view full) ---

215 .data
216
217_GLOBAL(nap_save_msscr0)
218 .space 4*NR_CPUS
219
220_GLOBAL(nap_save_hid1)
221 .space 4*NR_CPUS
222
90 /* Some pre-nap cleanups needed on some CPUs */
91 andis. r0,r3,HID0_NAP@h
92 beq 2f
93BEGIN_FTR_SECTION
94 /* Disable L2 prefetch on some 745x and try to ensure
95 * L2 prefetch engines are idle. As explained by errata
96 * text, we can't be sure they are, we just hope very hard
97 * that well be enough (sic !). At least I noticed Apple

--- 104 unchanged lines hidden (view full) ---

202 .data
203
204_GLOBAL(nap_save_msscr0)
205 .space 4*NR_CPUS
206
207_GLOBAL(nap_save_hid1)
208 .space 4*NR_CPUS
209
223_GLOBAL(powersave_nap)
224 .long 0
225_GLOBAL(powersave_lowspeed)
226 .long 0
227
228#ifdef DEBUG
229_GLOBAL(nap_enter_count)
230 .space 4
231_GLOBAL(nap_return_count)
232 .space 4
233#endif
210_GLOBAL(powersave_lowspeed)
211 .long 0
212
213#ifdef DEBUG
214_GLOBAL(nap_enter_count)
215 .space 4
216_GLOBAL(nap_return_count)
217 .space 4
218#endif