exception-64s.h (d9ada91ae2969ae6b6dc3574fd08a6ebda5df766) exception-64s.h (7230c5644188cd9e3fb380cc97dde00c464a3ba7)
1#ifndef _ASM_POWERPC_EXCEPTION_H
2#define _ASM_POWERPC_EXCEPTION_H
3/*
4 * Extracted from head_64.S
5 *
6 * PowerPC version
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *

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227 . = loc; \
228 .globl label##_hv; \
229label##_hv: \
230 HMT_MEDIUM; \
231 SET_SCRATCH0(r13); /* save r13 */ \
232 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
233 EXC_HV, KVMTEST, vec)
234
1#ifndef _ASM_POWERPC_EXCEPTION_H
2#define _ASM_POWERPC_EXCEPTION_H
3/*
4 * Extracted from head_64.S
5 *
6 * PowerPC version
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *

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227 . = loc; \
228 .globl label##_hv; \
229label##_hv: \
230 HMT_MEDIUM; \
231 SET_SCRATCH0(r13); /* save r13 */ \
232 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
233 EXC_HV, KVMTEST, vec)
234
235#define __SOFTEN_TEST(h) \
235/* This associate vector numbers with bits in paca->irq_happened */
236#define SOFTEN_VALUE_0x500 PACA_IRQ_EE
237#define SOFTEN_VALUE_0x502 PACA_IRQ_EE
238#define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
239#define SOFTEN_VALUE_0x982 PACA_IRQ_DEC
240
241#define __SOFTEN_TEST(h, vec) \
236 lbz r10,PACASOFTIRQEN(r13); \
237 cmpwi r10,0; \
242 lbz r10,PACASOFTIRQEN(r13); \
243 cmpwi r10,0; \
244 li r10,SOFTEN_VALUE_##vec; \
238 beq masked_##h##interrupt
245 beq masked_##h##interrupt
239#define _SOFTEN_TEST(h) __SOFTEN_TEST(h)
246#define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
240
241#define SOFTEN_TEST_PR(vec) \
242 KVMTEST_PR(vec); \
247
248#define SOFTEN_TEST_PR(vec) \
249 KVMTEST_PR(vec); \
243 _SOFTEN_TEST(EXC_STD)
250 _SOFTEN_TEST(EXC_STD, vec)
244
245#define SOFTEN_TEST_HV(vec) \
246 KVMTEST(vec); \
251
252#define SOFTEN_TEST_HV(vec) \
253 KVMTEST(vec); \
247 _SOFTEN_TEST(EXC_HV)
254 _SOFTEN_TEST(EXC_HV, vec)
248
249#define SOFTEN_TEST_HV_201(vec) \
250 KVMTEST(vec); \
255
256#define SOFTEN_TEST_HV_201(vec) \
257 KVMTEST(vec); \
251 _SOFTEN_TEST(EXC_STD)
258 _SOFTEN_TEST(EXC_STD, vec)
252
253#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
254 HMT_MEDIUM; \
255 SET_SCRATCH0(r13); /* save r13 */ \
256 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
257 EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
258#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
259 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)

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274
275/*
276 * Our exception common code can be passed various "additions"
277 * to specify the behaviour of interrupts, whether to kick the
278 * runlatch, etc...
279 */
280
281/* Exception addition: Hard disable interrupts */
259
260#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
261 HMT_MEDIUM; \
262 SET_SCRATCH0(r13); /* save r13 */ \
263 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
264 EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
265#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
266 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)

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281
282/*
283 * Our exception common code can be passed various "additions"
284 * to specify the behaviour of interrupts, whether to kick the
285 * runlatch, etc...
286 */
287
288/* Exception addition: Hard disable interrupts */
282#ifdef CONFIG_TRACE_IRQFLAGS
283#define DISABLE_INTS \
284 lbz r10,PACASOFTIRQEN(r13); \
285 li r11,0; \
286 cmpwi cr0,r10,0; \
287 stb r11,PACAHARDIRQEN(r13); \
288 beq 44f; \
289 stb r11,PACASOFTIRQEN(r13); \
290 TRACE_DISABLE_INTS; \
29144:
292#else
293#define DISABLE_INTS \
294 li r11,0; \
295 stb r11,PACASOFTIRQEN(r13); \
296 stb r11,PACAHARDIRQEN(r13)
297#endif /* CONFIG_TRACE_IRQFLAGS */
289#define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
298
299/* Exception addition: Keep interrupt state */
300#define ENABLE_INTS \
301 ld r11,PACAKMSR(r13); \
302 ld r12,_MSR(r1); \
303 rlwimi r11,r12,0,MSR_EE; \
304 mtmsrd r11,1
305

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290
291/* Exception addition: Keep interrupt state */
292#define ENABLE_INTS \
293 ld r11,PACAKMSR(r13); \
294 ld r12,_MSR(r1); \
295 rlwimi r11,r12,0,MSR_EE; \
296 mtmsrd r11,1
297

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