traps.c (a02001086bbfb4da35d1228bebc2f1b442db455f) | traps.c (4227a2d4efc9c84f35826dc4d1e6dc183f6c1c05) |
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1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle 7 * Copyright (C) 1995, 1996 Paul M. Antoine 8 * Copyright (C) 1998 Ulf Carlsson --- 710 unchanged lines hidden (view full) --- 719 } else if (sig) { 720 force_sig(sig, current); 721 return 1; 722 } else { 723 return 0; 724 } 725} 726 | 1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle 7 * Copyright (C) 1995, 1996 Paul M. Antoine 8 * Copyright (C) 1998 Ulf Carlsson --- 710 unchanged lines hidden (view full) --- 719 } else if (sig) { 720 force_sig(sig, current); 721 return 1; 722 } else { 723 return 0; 724 } 725} 726 |
727static int simulate_fp(struct pt_regs *regs, unsigned int opcode, 728 unsigned long old_epc, unsigned long old_ra) 729{ 730 union mips_instruction inst = { .word = opcode }; 731 void __user *fault_addr = NULL; 732 int sig; 733 734 /* If it's obviously not an FP instruction, skip it */ 735 switch (inst.i_format.opcode) { 736 case cop1_op: 737 case cop1x_op: 738 case lwc1_op: 739 case ldc1_op: 740 case swc1_op: 741 case sdc1_op: 742 break; 743 744 default: 745 return -1; 746 } 747 748 /* 749 * do_ri skipped over the instruction via compute_return_epc, undo 750 * that for the FPU emulator. 751 */ 752 regs->cp0_epc = old_epc; 753 regs->regs[31] = old_ra; 754 755 /* Save the FP context to struct thread_struct */ 756 lose_fpu(1); 757 758 /* Run the emulator */ 759 sig = fpu_emulator_cop1Handler(regs, ¤t->thread.fpu, 1, 760 &fault_addr); 761 762 /* If something went wrong, signal */ 763 process_fpemu_return(sig, fault_addr); 764 765 /* Restore the hardware register state */ 766 own_fpu(1); 767 768 return 0; 769} 770 |
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727/* 728 * XXX Delayed fp exceptions when doing a lazy ctx switch XXX 729 */ 730asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) 731{ 732 enum ctx_state prev_state; 733 siginfo_t info = {0}; 734 --- 276 unchanged lines hidden (view full) --- 1011 if (!cpu_has_llsc && status < 0) 1012 status = simulate_llsc(regs, opcode); 1013 1014 if (status < 0) 1015 status = simulate_rdhwr_normal(regs, opcode); 1016 1017 if (status < 0) 1018 status = simulate_sync(regs, opcode); | 771/* 772 * XXX Delayed fp exceptions when doing a lazy ctx switch XXX 773 */ 774asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) 775{ 776 enum ctx_state prev_state; 777 siginfo_t info = {0}; 778 --- 276 unchanged lines hidden (view full) --- 1055 if (!cpu_has_llsc && status < 0) 1056 status = simulate_llsc(regs, opcode); 1057 1058 if (status < 0) 1059 status = simulate_rdhwr_normal(regs, opcode); 1060 1061 if (status < 0) 1062 status = simulate_sync(regs, opcode); |
1063 1064 if (status < 0) 1065 status = simulate_fp(regs, opcode, old_epc, old31); |
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1019 } 1020 1021 if (status < 0) 1022 status = SIGILL; 1023 1024 if (unlikely(status > 0)) { 1025 regs->cp0_epc = old_epc; /* Undo skip-over. */ 1026 regs->regs[31] = old31; --- 1190 unchanged lines hidden --- | 1066 } 1067 1068 if (status < 0) 1069 status = SIGILL; 1070 1071 if (unlikely(status > 0)) { 1072 regs->cp0_epc = old_epc; /* Undo skip-over. */ 1073 regs->regs[31] = old31; --- 1190 unchanged lines hidden --- |