cpu-probe.c (987cbafe628ae67fe6cad0ce1dcc41743147ef3e) cpu-probe.c (34e3c4500cdc06094b37a41b622598098308ba8f)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Processor capabilities determination functions.
4 *
5 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
6 */
7#include <linux/init.h>
8#include <linux/kernel.h>

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86 }
87}
88
89static void cpu_probe_common(struct cpuinfo_loongarch *c)
90{
91 unsigned int config;
92 unsigned long asid_mask;
93
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Processor capabilities determination functions.
4 *
5 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
6 */
7#include <linux/init.h>
8#include <linux/kernel.h>

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86 }
87}
88
89static void cpu_probe_common(struct cpuinfo_loongarch *c)
90{
91 unsigned int config;
92 unsigned long asid_mask;
93
94 c->options = LOONGARCH_CPU_CPUCFG | LOONGARCH_CPU_CSR |
95 LOONGARCH_CPU_TLB | LOONGARCH_CPU_VINT | LOONGARCH_CPU_WATCH;
94 c->options = LOONGARCH_CPU_CPUCFG | LOONGARCH_CPU_CSR | LOONGARCH_CPU_VINT;
96
97 elf_hwcap = HWCAP_LOONGARCH_CPUCFG;
98
99 config = read_cpucfg(LOONGARCH_CPUCFG1);
95
96 elf_hwcap = HWCAP_LOONGARCH_CPUCFG;
97
98 config = read_cpucfg(LOONGARCH_CPUCFG1);
99
100 switch (config & CPUCFG1_ISA) {
101 case 0:
102 set_isa(c, LOONGARCH_CPU_ISA_LA32R);
103 break;
104 case 1:
105 set_isa(c, LOONGARCH_CPU_ISA_LA32S);
106 break;
107 case 2:
108 set_isa(c, LOONGARCH_CPU_ISA_LA64);
109 break;
110 default:
111 pr_warn("Warning: unknown ISA level\n");
112 }
113
114 if (config & CPUCFG1_PAGING)
115 c->options |= LOONGARCH_CPU_TLB;
116 if (config & CPUCFG1_IOCSR)
117 c->options |= LOONGARCH_CPU_IOCSR;
100 if (config & CPUCFG1_UAL) {
101 c->options |= LOONGARCH_CPU_UAL;
102 elf_hwcap |= HWCAP_LOONGARCH_UAL;
103 }
104 if (config & CPUCFG1_CRC32) {
105 c->options |= LOONGARCH_CPU_CRC32;
106 elf_hwcap |= HWCAP_LOONGARCH_CRC32;
107 }

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134 if (config & CPUCFG2_CRYPTO) {
135 c->options |= LOONGARCH_CPU_CRYPTO;
136 elf_hwcap |= HWCAP_LOONGARCH_CRYPTO;
137 }
138 if (config & CPUCFG2_PTW) {
139 c->options |= LOONGARCH_CPU_PTW;
140 elf_hwcap |= HWCAP_LOONGARCH_PTW;
141 }
118 if (config & CPUCFG1_UAL) {
119 c->options |= LOONGARCH_CPU_UAL;
120 elf_hwcap |= HWCAP_LOONGARCH_UAL;
121 }
122 if (config & CPUCFG1_CRC32) {
123 c->options |= LOONGARCH_CPU_CRC32;
124 elf_hwcap |= HWCAP_LOONGARCH_CRC32;
125 }

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152 if (config & CPUCFG2_CRYPTO) {
153 c->options |= LOONGARCH_CPU_CRYPTO;
154 elf_hwcap |= HWCAP_LOONGARCH_CRYPTO;
155 }
156 if (config & CPUCFG2_PTW) {
157 c->options |= LOONGARCH_CPU_PTW;
158 elf_hwcap |= HWCAP_LOONGARCH_PTW;
159 }
160 if (config & CPUCFG2_LSPW) {
161 c->options |= LOONGARCH_CPU_LSPW;
162 elf_hwcap |= HWCAP_LOONGARCH_LSPW;
163 }
142 if (config & CPUCFG2_LVZP) {
143 c->options |= LOONGARCH_CPU_LVZ;
144 elf_hwcap |= HWCAP_LOONGARCH_LVZ;
145 }
146#ifdef CONFIG_CPU_HAS_LBT
147 if (config & CPUCFG2_X86BT) {
148 c->options |= LOONGARCH_CPU_LBT_X86;
149 elf_hwcap |= HWCAP_LOONGARCH_LBT_X86;

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157 elf_hwcap |= HWCAP_LOONGARCH_LBT_MIPS;
158 }
159#endif
160
161 config = read_cpucfg(LOONGARCH_CPUCFG6);
162 if (config & CPUCFG6_PMP)
163 c->options |= LOONGARCH_CPU_PMP;
164
164 if (config & CPUCFG2_LVZP) {
165 c->options |= LOONGARCH_CPU_LVZ;
166 elf_hwcap |= HWCAP_LOONGARCH_LVZ;
167 }
168#ifdef CONFIG_CPU_HAS_LBT
169 if (config & CPUCFG2_X86BT) {
170 c->options |= LOONGARCH_CPU_LBT_X86;
171 elf_hwcap |= HWCAP_LOONGARCH_LBT_X86;

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179 elf_hwcap |= HWCAP_LOONGARCH_LBT_MIPS;
180 }
181#endif
182
183 config = read_cpucfg(LOONGARCH_CPUCFG6);
184 if (config & CPUCFG6_PMP)
185 c->options |= LOONGARCH_CPU_PMP;
186
165 config = iocsr_read32(LOONGARCH_IOCSR_FEATURES);
166 if (config & IOCSRF_CSRIPI)
167 c->options |= LOONGARCH_CPU_CSRIPI;
168 if (config & IOCSRF_EXTIOI)
169 c->options |= LOONGARCH_CPU_EXTIOI;
170 if (config & IOCSRF_FREQSCALE)
171 c->options |= LOONGARCH_CPU_SCALEFREQ;
172 if (config & IOCSRF_FLATMODE)
173 c->options |= LOONGARCH_CPU_FLATMODE;
174 if (config & IOCSRF_EIODECODE)
175 c->options |= LOONGARCH_CPU_EIODECODE;
176 if (config & IOCSRF_AVEC)
177 c->options |= LOONGARCH_CPU_AVECINT;
178 if (config & IOCSRF_VM)
179 c->options |= LOONGARCH_CPU_HYPERVISOR;
180
181 config = csr_read32(LOONGARCH_CSR_ASID);
182 config = (config & CSR_ASID_BIT) >> CSR_ASID_BIT_SHIFT;
183 asid_mask = GENMASK(config - 1, 0);
184 set_cpu_asid_mask(c, asid_mask);
185
186 config = read_csr_prcfg1();
187 c->ksave_mask = GENMASK((config & CSR_CONF1_KSNUM) - 1, 0);
188 c->ksave_mask &= ~(EXC_KSAVE_MASK | PERCPU_KSAVE_MASK | KVM_KSAVE_MASK);

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205 c->tlbsizemtlb = ((config & CSR_CONF3_MTLBSIZE) >> CSR_CONF3_MTLBSIZE_SHIFT) + 1;
206 c->tlbsizestlbsets = 1 << ((config & CSR_CONF3_STLBIDX) >> CSR_CONF3_STLBIDX_SHIFT);
207 c->tlbsizestlbways = ((config & CSR_CONF3_STLBWAYS) >> CSR_CONF3_STLBWAYS_SHIFT) + 1;
208 c->tlbsize = c->tlbsizemtlb + c->tlbsizestlbsets * c->tlbsizestlbways;
209 break;
210 default:
211 pr_warn("Warning: unknown TLB type\n");
212 }
187 config = csr_read32(LOONGARCH_CSR_ASID);
188 config = (config & CSR_ASID_BIT) >> CSR_ASID_BIT_SHIFT;
189 asid_mask = GENMASK(config - 1, 0);
190 set_cpu_asid_mask(c, asid_mask);
191
192 config = read_csr_prcfg1();
193 c->ksave_mask = GENMASK((config & CSR_CONF1_KSNUM) - 1, 0);
194 c->ksave_mask &= ~(EXC_KSAVE_MASK | PERCPU_KSAVE_MASK | KVM_KSAVE_MASK);

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211 c->tlbsizemtlb = ((config & CSR_CONF3_MTLBSIZE) >> CSR_CONF3_MTLBSIZE_SHIFT) + 1;
212 c->tlbsizestlbsets = 1 << ((config & CSR_CONF3_STLBIDX) >> CSR_CONF3_STLBIDX_SHIFT);
213 c->tlbsizestlbways = ((config & CSR_CONF3_STLBWAYS) >> CSR_CONF3_STLBWAYS_SHIFT) + 1;
214 c->tlbsize = c->tlbsizemtlb + c->tlbsizestlbsets * c->tlbsizestlbways;
215 break;
216 default:
217 pr_warn("Warning: unknown TLB type\n");
218 }
219
220 if (get_num_brps() + get_num_wrps())
221 c->options |= LOONGARCH_CPU_WATCH;
213}
214
215#define MAX_NAME_LEN 32
216#define VENDOR_OFFSET 0
217#define CPUNAME_OFFSET 9
218
219static char cpu_full_name[MAX_NAME_LEN] = " - ";
220
221static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int cpu)
222{
222}
223
224#define MAX_NAME_LEN 32
225#define VENDOR_OFFSET 0
226#define CPUNAME_OFFSET 9
227
228static char cpu_full_name[MAX_NAME_LEN] = " - ";
229
230static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int cpu)
231{
232 uint32_t config;
223 uint64_t *vendor = (void *)(&cpu_full_name[VENDOR_OFFSET]);
224 uint64_t *cpuname = (void *)(&cpu_full_name[CPUNAME_OFFSET]);
233 uint64_t *vendor = (void *)(&cpu_full_name[VENDOR_OFFSET]);
234 uint64_t *cpuname = (void *)(&cpu_full_name[CPUNAME_OFFSET]);
235 const char *core_name = "Unknown";
225
236
226 if (!__cpu_full_name[cpu])
227 __cpu_full_name[cpu] = cpu_full_name;
228
229 *vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR);
230 *cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME);
231
232 switch (c->processor_id & PRID_SERIES_MASK) {
233 case PRID_SERIES_LA132:
237 switch (BIT(fls(c->isa_level) - 1)) {
238 case LOONGARCH_CPU_ISA_LA32R:
239 case LOONGARCH_CPU_ISA_LA32S:
234 c->cputype = CPU_LOONGSON32;
240 c->cputype = CPU_LOONGSON32;
235 set_isa(c, LOONGARCH_CPU_ISA_LA32S);
236 __cpu_family[cpu] = "Loongson-32bit";
241 __cpu_family[cpu] = "Loongson-32bit";
237 pr_info("32-bit Loongson Processor probed (LA132 Core)\n");
238 break;
242 break;
239 case PRID_SERIES_LA264:
243 case LOONGARCH_CPU_ISA_LA64:
240 c->cputype = CPU_LOONGSON64;
244 c->cputype = CPU_LOONGSON64;
241 set_isa(c, LOONGARCH_CPU_ISA_LA64);
242 __cpu_family[cpu] = "Loongson-64bit";
245 __cpu_family[cpu] = "Loongson-64bit";
243 pr_info("64-bit Loongson Processor probed (LA264 Core)\n");
244 break;
246 break;
247 }
248
249 switch (c->processor_id & PRID_SERIES_MASK) {
250 case PRID_SERIES_LA132:
251 core_name = "LA132";
252 break;
253 case PRID_SERIES_LA264:
254 core_name = "LA264";
255 break;
245 case PRID_SERIES_LA364:
256 case PRID_SERIES_LA364:
246 c->cputype = CPU_LOONGSON64;
247 set_isa(c, LOONGARCH_CPU_ISA_LA64);
248 __cpu_family[cpu] = "Loongson-64bit";
249 pr_info("64-bit Loongson Processor probed (LA364 Core)\n");
257 core_name = "LA364";
250 break;
251 case PRID_SERIES_LA464:
258 break;
259 case PRID_SERIES_LA464:
252 c->cputype = CPU_LOONGSON64;
253 set_isa(c, LOONGARCH_CPU_ISA_LA64);
254 __cpu_family[cpu] = "Loongson-64bit";
255 pr_info("64-bit Loongson Processor probed (LA464 Core)\n");
260 core_name = "LA464";
256 break;
257 case PRID_SERIES_LA664:
261 break;
262 case PRID_SERIES_LA664:
258 c->cputype = CPU_LOONGSON64;
259 set_isa(c, LOONGARCH_CPU_ISA_LA64);
260 __cpu_family[cpu] = "Loongson-64bit";
261 pr_info("64-bit Loongson Processor probed (LA664 Core)\n");
263 core_name = "LA664";
262 break;
264 break;
263 default: /* Default to 64 bit */
264 c->cputype = CPU_LOONGSON64;
265 set_isa(c, LOONGARCH_CPU_ISA_LA64);
266 __cpu_family[cpu] = "Loongson-64bit";
267 pr_info("64-bit Loongson Processor probed (Unknown Core)\n");
268 }
265 }
266
267 pr_info("%s Processor probed (%s Core)\n", __cpu_family[cpu], core_name);
268
269 if (!cpu_has_iocsr)
270 return;
271
272 if (!__cpu_full_name[cpu])
273 __cpu_full_name[cpu] = cpu_full_name;
274
275 *vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR);
276 *cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME);
277
278 config = iocsr_read32(LOONGARCH_IOCSR_FEATURES);
279 if (config & IOCSRF_CSRIPI)
280 c->options |= LOONGARCH_CPU_CSRIPI;
281 if (config & IOCSRF_EXTIOI)
282 c->options |= LOONGARCH_CPU_EXTIOI;
283 if (config & IOCSRF_FREQSCALE)
284 c->options |= LOONGARCH_CPU_SCALEFREQ;
285 if (config & IOCSRF_FLATMODE)
286 c->options |= LOONGARCH_CPU_FLATMODE;
287 if (config & IOCSRF_EIODECODE)
288 c->options |= LOONGARCH_CPU_EIODECODE;
289 if (config & IOCSRF_AVEC)
290 c->options |= LOONGARCH_CPU_AVECINT;
291 if (config & IOCSRF_VM)
292 c->options |= LOONGARCH_CPU_HYPERVISOR;
269}
270
271#ifdef CONFIG_64BIT
272/* For use by uaccess.h */
273u64 __ua_limit;
274EXPORT_SYMBOL(__ua_limit);
275#endif
276

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294
295#ifdef CONFIG_64BIT
296/* For use by uaccess.h */
297u64 __ua_limit;
298EXPORT_SYMBOL(__ua_limit);
299#endif
300

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